Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
Type:
Application
Filed:
February 13, 2015
Publication date:
June 4, 2015
Applicant:
SUNEDISON, INC.
Inventors:
Puneet Gupta, Henry F. Erk, Alexis Grabbe
Abstract: A thermal solar system having a fire rating of at least A. In a specific embodiment, the system includes a thermal solar module having an aperture region and a backside region. The system has a shaped thickness of material having a first side and a second side. In a preferred embodiment, the shaped thickness of material is characterized by a fire rating of at least A. The material has a thickness suitable to be free from penetration of moisture according to one or more embodiments. The thickness of material also has a structural characteristic capable of maintaining a shape and coupling to the backside region of the thermal solar module according to one or more embodiments. The system also has an air plenum provided between the thermal solar module and the thickness shaped thickness of material. In a preferred embodiment, the system further has a frame assembly operably coupled to the shaped thickness of material to support the shaped thickness of material and the thermal solar module.
Abstract: A method for preparing a semiconductor structure for use in the manufacture of three dimensional transistors, the structure comprising a silicon substrate and an epitaxial layer, the epitaxial layer comprising an endpoint detection epitaxial region comprising an endpoint detection impurity selected from the group consisting of carbon, germanium, or a combination.
Abstract: Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates.
Abstract: Production of polycrystalline silicon in substantially closed-loop processes and systems is disclosed. The processes and systems generally involve disproportionation of trichlorosilane to produce silane or dichlorosilane and thermal decomposition of silane or dichlorosilane to produce polycrystalline silicon.
Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
Type:
Grant
Filed:
December 14, 2012
Date of Patent:
April 21, 2015
Assignee:
SunEdison, Inc.
Inventors:
Puneet Gupta, Henry F. Erk, Alexis Grabbe
Abstract: Transformers and methods of constructing transformers are disclosed. In one embodiment, a method of constructing a transformer includes wrapping a first primary winding around a core, wrapping a secondary winding around the core, and wrapping a second primary winding around the core. The first primary winding traverses substantially an entire circumference of the core in a first circumferential direction. The secondary winding includes a first half and a second half. The first half traverses substantially the entire circumference of the core in the first circumferential direction, and the second half traverses substantially the entire circumference of the core in a second circumferential direction opposite the first circumferential direction. The second primary winding traverses substantially the entire circumference of the core in the second circumferential direction.
Abstract: Processes and systems for purifying silane-containing streams and, in particular, for purifying silane-containing streams that also contain ethylene are disclosed. The processes and systems may be arranged such that one or more ethylene reactors are downstream of light-end distillation operations.
Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
Type:
Grant
Filed:
July 18, 2014
Date of Patent:
March 10, 2015
Assignee:
SunEdison, Inc.
Inventors:
Puneet Gupta, Henry F. Erk, Alexis Grabbe
Abstract: Systems and methods are disclosed for connecting an ingot to a wire saw with an ingot holder, a bond beam, and a bar. The bar has an angled mating surface that engages a recessed surface formed in a slot of the bond beam. Mechanical fasteners are used to connect the tee bar to the ingot holder. The angle of the mating surface with respect to the recessed surface of the slot prevents deformation of the bond beam and prevents compromising the integrity of the adhesive bond between the ingot and the bond beam.
Abstract: Production of polycrystalline silicon in substantially closed-loop processes and systems is disclosed. The processes and systems generally involve disproportionation of trichlorosilane to produce silane or dichlorosilane and thermal decomposition of silane or dichlorosilane to produce polycrystalline silicon.
Abstract: Photovoltaic power converter systems and methods are described. In one example, a method for use in operating a solar power converter includes sampling a DC link voltage of a DC link during a first cycle of an alternating output voltage of a second stage at one instance when the alternating output voltage is crossing zero volts in a first direction. A voltage difference a voltage difference between the DC link voltage sampled during the first cycle and a DC link voltage sampled during a previous cycle when the alternating output voltage was crossing zero volts in the first direction is determined. A DC link power is estimated based at least in part on the determined voltage difference. The AC power output by the second stage in a second cycle is controlled based at least in part on the estimated DC link power.
Abstract: A pan structure for bonding solar modules installed on a target position is provided. The pan structure includes a plate member configured to be disposed across a spacing between two rail structures for mounting one or more solar modules. Additionally, the pan structure includes a pair of edge members configured to couple the plate member respectively with the two rail structures. Each of the pair of edge members has a first ledge characterized to be electrically conductive and configured to be supported by one of the two rail structures and a second ledge connected the first ledge to the plate member to keep the plate member a distance below the first ledge. Moreover, the pan structure includes a plurality of contact elements spatially distributed along the first ledge for bonding both the one or more solar modules and the rail structures for electric grounding.
Type:
Grant
Filed:
June 25, 2012
Date of Patent:
February 3, 2015
Assignee:
SunEdison, Inc.
Inventors:
Samuel Truthseeker, Charles Wade Albritton, Ramachandran Narayanamurthy, Joshua Reed Plaisted
Abstract: A method of fabricating a semiconductor processing device includes providing a susceptor including a substantially cylindrical body portion having opposing upper and lower surfaces. The body portion has a diameter larger than a wafer diameter. The method also includes providing a set of holes circumferentially disposed at a first susceptor diameter, the set of holes being evenly spaced with respect to adjacent holes and extending through the upper and lower surfaces in an area. The first susceptor diameter is larger than the wafer diameter, and holes are omitted along the first diameter in a set of predetermined orientations.
Abstract: Gas distribution units of fluidized bed reactors are configured to direct thermally decomposable compounds to the center portion of the reactor and away from the reactor wall to prevent deposition of material on the reactor wall and process for producing polycrystalline silicon product in a reactor that reduce the amount of silicon which deposits on the reactor wall.
Abstract: The invention generally related to a method for preparing a layer of graphene directly on the surface of a semiconductor substrate. The method includes forming a carbon-containing layer on a front surface of a semiconductor substrate and depositing a metal film on the carbon layer. A thermal cycle degrades the carbon-containing layer, which forms graphene directly upon the semiconductor substrate upon cooling. In some embodiments, the carbon source is a carbon-containing gas, and the thermal cycle causes diffusion of carbon atoms into the metal film, which, upon cooling, segregate and precipitate into a layer of graphene directly on the semiconductor substrate.
Type:
Grant
Filed:
October 16, 2012
Date of Patent:
November 11, 2014
Assignees:
SunEdison Semiconductor Limited (UEN201334164H), KSU Research Foundation
Abstract: Process for detecting grown-in-defects in a semiconductor silicon substrate. The process includes contacting a surface of the semiconductor silicon substrate with a gaseous acid in a reducing atmosphere at a temperature and duration sufficient to grow grown-in -defects disposed in the semiconductor silicon substrate to a size capable of being detected by an optical detection device.
Abstract: Methods and systems for producing silane that use electrolysis to regenerate reactive components therein are disclosed. The methods and systems may be substantially closed-loop with respect to halogen, an alkali or alkaline earth metal and/or hydrogen.
Type:
Application
Filed:
July 18, 2014
Publication date:
November 6, 2014
Applicant:
SUNEDISON LLC
Inventors:
Puneet Gupta, Henry F. Erk, Alexis Grabbe
Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.
Abstract: Methods for producing crucibles for holding molten material that contain a reduced amount of gas pockets are disclosed. The methods may involve use of molten silica that may be outgassed prior to or during formation of the crucible. Crucibles produced from such methods and ingots and wafers that are produced from crucibles with a reduced amount of gas pockets are also disclosed.
Type:
Grant
Filed:
November 18, 2011
Date of Patent:
October 14, 2014
Assignee:
SunEdison Semiconductor Limited
Inventors:
Steven L. Kimbel, Harold W. Korb, Richard J. Phillips, Shailendra B. Rathod