Patents Assigned to Tamura Corporation
  • Crystal laminate structure and method for producing same
    Patent number: 9716004
    Abstract: A crystal laminate structure, in which crystals can be epitaxially grown on a ?-Ga2O3-based substrate with high efficiency to produce a high-quality ?-Ga2O3-based crystal film on the substrate; and a method for producing the crystal laminate structure are provided. The crystal laminate structure includes: a ?-Ga2O3-based substrate, of which the major face is a face that is rotated by 50 to 90° inclusive with respect to face; and a ?-Ga2O3-based crystal film which is formed by the epitaxial crystal growth on the major face of the ?-Ga2O3-based substrate.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: July 25, 2017
    Assignee: TAMURA CORPORATION
    Inventor: Kohei Sasaki
  • LIGHT EMITTING DEVICE
    Publication number: 20170186923
    Abstract: According to one embodiment of the present invention, the light emitting device includes an LED element, a side wall which surrounds the LED element, a phosphor layer which is fixed to the side wall with an adhesive layer therebetween, and is positioned above the LED element, and a metal pad as a heat dissipating member. The side wall includes an insulating base which surrounds the LED element and a metal layer which is formed on a side surface at the LED element side of the base, and is in contact with the metal pad and the adhesive layer. The adhesive layer includes a resin layer that includes a resin containing particles which have higher thermal conductivity than the resin or a layer that includes solder.
    Type: Application
    Filed: March 16, 2017
    Publication date: June 29, 2017
    Applicants: KOHA CO., LTD., TAMURA CORPORATION, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Daisuke INOMATA, Hiroaki SANO, Seitaro YOSHIDA, Kazuo AOKI, Kiyoshi SHIMAMURA, Encarnacion Antonia GARCIA VILLORA
  • Substrate for epitaxial growth, and crystal laminate structure
    Patent number: 9685515
    Abstract: A crystal laminate structure includes an epitaxial growth substrate including a ?-Ga2O3-based single crystal and a (010) plane or a plane inclined at an angle not more than 37.5° with respect to the (010) plane as a main surface thereof and a high electrical resistance, and an epitaxial crystal formed on the main surface of the epitaxial growth substrate. The epitaxial crystal includes a Ga-containing oxide.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: June 20, 2017
    Assignee: TAMURA CORPORATION
    Inventor: Kohei Sasaki
  • BETA-Ga2O3 SINGLE-CRYSTAL SUBSTRATE
    Publication number: 20170152610
    Abstract: A ?-Ga2O3-based single-crystal substrate includes a ?-Ga2O3-based single crystal, and a principal surface being a plane parallel to a b-axis of the ?-Ga2O3-based single crystal. A maximum value of ?? on an arbitrary straight line on the principal surface that passes through a center of the principal surface is not more than 0.7264. The ?? is a difference between a maximum value and a minimum value of values obtained by subtracting ?a from ?s at each of measurement positions, where ?s represents an angle defined by an X-ray incident direction and the principal surface at a peak position of an X-ray rocking curve on the straight line and ?a represents an angle on an approximated straight line obtained by using least-squares method to linearly approximate a curve representing a relationship between the ?s and the measurement positions thereof.
    Type: Application
    Filed: June 29, 2015
    Publication date: June 1, 2017
    Applicants: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Shinya WATANABE, Kimiyoshi KOSHI, Yu YAMAOKA, Kazuyuki IIZUKA, Masaru TAKIZAWA, Takekazu MASUI
  • SEMICONDUCTOR SUBSTRATE, EPITAXIAL WAFER, AND METHOD FOR MANUFACTURING EPITAXIAL WAFER
    Publication number: 20170145590
    Abstract: A semiconductor substrate for being used as a base substrate for epitaxial crystal growth by HVPE method includes a ?-Ga2O3-based single crystal, and a principal surface that is a plane parallel to a [010] axis of the ?-Ga2O3-based single crystal. An epitaxial wafer includes the semiconductor substrate, and an epitaxial layer that includes a ?-Ga2O3-based single crystal and is formed on the principal surface of the semiconductor substrate by epitaxial crystal growth using the HVPE method. A method for manufacturing the epitaxial wafer includes forming the epitaxial layer by epitaxial crystal growth using the HVPE method on the semiconductor substrate.
    Type: Application
    Filed: May 11, 2015
    Publication date: May 25, 2017
    Applicants: TAMURA CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGY
    Inventors: Ken GOTO, Akinori KOUKITU, Yoshinao KUMAGAI, Hisashi MURAKAMI
  • Method for producing GaObased crystal film
    Patent number: 9657410
    Abstract: A Ga2O3 crystal film is epitaxially grown on a Ga2O3 crystal substrate using an MBE method, while controlling the n-type conductivity with high accuracy. Provided is a method for producing a Ga2O3 crystal film, wherein a conductive Ga2O3 crystal film is formed by epitaxial growth using an MBE method. This method for producing a Ga2O3 crystal film comprises a step wherein a Ga2O3 single crystal film containing Sn is grown by producing a Ga vapor and an Sn vapor and supplying the Ga vapor and the Sn vapor to the surface of a Ga2O3 crystal substrate as molecular beams. The Sn vapor is produced by heating Sn oxide that is filled in a cell of an MBE apparatus.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: May 23, 2017
    Assignee: TAMURA CORPORATION
    Inventor: Kohei Sasaki
  • GALLIUM OXIDE SUBSTRATE
    Publication number: 20170137965
    Abstract: Provided is a gallium oxide substrate which has less linear pits. Obtained is a gallium oxide substrate wherein the average density of linear pits in a single crystal surface is 1,000 pits/cm2 or less.
    Type: Application
    Filed: July 1, 2015
    Publication date: May 18, 2017
    Applicants: TAMURA CORPORATION, KOHA CO., LTD.
    Inventors: Kimiyoshi KOSHI, Shinya WATANABE, Yu YAMAOKA, Makoto WATANABE
  • Light emitting device
    Patent number: 9634216
    Abstract: According to one embodiment of the present invention, the light emitting device includes an LED element, a side wall which surrounds the LED element, a phosphor layer which is fixed to the side wall with an adhesive layer therebetween, and is positioned above the LED element, and a metal pad as a heat dissipating member. The side wall includes an insulating base which surrounds the LED element and a metal layer which is formed on a side surface at the LED element side of the base, and is in contact with the metal pad and the adhesive layer. The adhesive layer includes a resin layer that includes a resin containing particles which have higher thermal conductivity than the resin or a layer that includes solder.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: April 25, 2017
    Assignees: Koha Co., Ltd., Tamura Corporation, National Institute for Materials Science
    Inventors: Daisuke Inomata, Hiroaki Sano, Seitaro Yoshida, Kazuo Aoki, Kiyoshi Shimamura, Encarnacion Antonia Garcia Villora
  • Method for controlling donor concentration in GaO-based and method for forming ohmic contact
    Patent number: 9611567
    Abstract: Provided is a method for controlling a donor concentration in a Ga2O3-based single crystal body. In addition, an ohmic contact having a low resistance is formed between a Ga2O3-based single crystal body and an electrode. A donor concentration in a Ga2O3-based single crystal body is controlled by a method which includes a step wherein Si, which serves as a donor impurity, is introduced into the Ga2O3-based single crystal body by an ion implantation method at an implantation concentration of 1×1020 cm?3 or less, so that a donor impurity implanted region is formed in the Ga2O3-based single crystal body, the donor impurity implanted region having a higher donor impurity concentration than the regions into which Si is not implanted, and a step wherein Si in the donor impurity implanted region is activated by annealing, so that a high donor concentration region is formed.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 4, 2017
    Assignees: TAMURA CORPORATION, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Kohei Sasaki, Masataka Higashiwaki
  • Schottky barrier diode
    Patent number: 9595586
    Abstract: A semiconductor device, includes an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration, an electrode that is in Schottky-contact with a surface of the first semiconductor layer, and an ohmic electrode formed on a surface of the second semiconductor layer. The n-type semiconductor layer is formed of a Ga2O3-based single crystal. The first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the Ga2O3-based single crystal.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: March 14, 2017
    Assignee: TAMURA CORPORATION
    Inventors: Masaru Takizawa, Akito Kuramata
  • Method of manufacturing a reactor
    Patent number: 9589717
    Abstract: Divided cores 11, 12 includes left and right leg portions and a yoke portion and formed by molding a yoke portion side core material within resin. The leg portions of the divided core are formed by tubular core mounting portions 41, 42. I-shaped leg portion side core materials 51-53 and spacers 6 are mounted in the tubular core mounting portions. A ring-shaped molded core 1 is formed by abutting and integrating the respective leg portions of two divided cores, and a coil 100 is wound around the molded core.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: March 7, 2017
    Assignee: TAMURA CORPORATION
    Inventors: Kotaro Suzuki, Kensuke Maeno, Ryo Nakatsu
  • NITRIDE SEMICONDUCTOR TEMPLATE AND ULTRAVIOLET LED
    Publication number: 20160380152
    Abstract: A nitride semiconductor template includes a Ga2O3 substrate, a buffer layer that includes as a main component AlN and is formed on the Ga2O3 substrate, a first nitride semiconductor layer that includes as a main component AlxGa1-xN (0.2<x?1) and is formed on the buffer layer, a second nitride semiconductor layer that includes as a main component AlyGa1-yN (0.2?y?0.55, y<x) and is formed on the first nitride semiconductor layer, and a third nitride semiconductor layer that is formed on the second nitride semiconductor layer and includes a multilayer structure including an Inu1Alv1Gaw1N (0.02?u1?0.03, u1+v1+w1=1) layer and Inu2Alv2Gaw2N (0.02?u2?0.03, u2+v2+w2=1, v1+0.05?v2?v1+0.2) layers on both sides of the Inu1Alv1Gaw1N layer.
    Type: Application
    Filed: February 23, 2016
    Publication date: December 29, 2016
    Applicants: TAMURA CORPORATION, RIKEN
    Inventors: Yoshikatsu MORISHIMA, Hideki HIRAYAMA
  • Nitride semiconductor template and ultraviolet LED
    Patent number: 9520527
    Abstract: A nitride semiconductor template includes a Ga2O3 substrate, a buffer layer that includes as a main component AlN and is formed on the Ga2O3 substrate, a first nitride semiconductor layer that includes as a main component AlxGa1-xN (0.2<x?1) and is formed on the buffer layer, a second nitride semiconductor layer that includes as a main component AlyGa1-yN (0.2?y?0.55, y<x) and is formed on the first nitride semiconductor layer, and a third nitride semiconductor layer that is formed on the second nitride semiconductor layer and includes a multilayer structure including an Inu1Alv1Gaw1N (0.02?u1?0.03, u1+v1+w1=1) layer and Inu2Alv2Gaw2N (0.02?u2?0.03, u2+v2+w2=1, v1+0.05?v2?v1+0.2) layers on both sides of the Inu1Alv1Gaw1N layer.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: December 13, 2016
    Assignees: RIKEN, TAMURA CORPORATION
    Inventors: Yoshikatsu Morishima, Hideki Hirayama
  • Coil and manufacturing method for same, and reactor
    Patent number: 9514878
    Abstract: A coil includes a coil unit provided with a wire and a self-melting layer formed on surfaces of the wire, and a resin member affixed to the wire. The wire is adhered and affixed to the resin member by the self-melting layer.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: December 6, 2016
    Assignee: TAMURA Corporation
    Inventors: Ryo Nakatsu, Toshikazu Ninomiya, Kensuke Maeno, Masashi Yamada, Ryotaro Tanaka
  • Reactor
    Patent number: 9508482
    Abstract: U-shaped cores and fasteners are embedded in resin members, and brackets provided at respective ends of the fasteners protrude from the resin members. By fixing the brackets and a casing with screws, a reactor main body and the casing are fixed together. Openings formed by a partition wall that suppresses a direct application of a resin flowing from resin-filling portions to the fasteners are provided between the respective fasteners and the respective resin-filling portions. A protrusion extending in an opposite direction to a core and in parallel with the partition wall is provided between the resin-filling portions and the partition wall. The resin flowing from the resin-filling portion flows in between a core upper face and the fastener, and between a fastener surface located behind the partition wall and the internal surface of a die.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: November 29, 2016
    Assignee: TAMURA CORPORATION
    Inventor: Kotaro Suzuki
  • REACTOR
    Publication number: 20160329144
    Abstract: A reactor includes a core made of a magnetic material; a resin mold that encloses the core; a coil that is wound around the core through the resin mold; a plurality of fasteners located on the resin mold; and a supporting member that is secured to the resin mold through the fasteners. At least one of the plurality of fasteners is a flexible fastener.
    Type: Application
    Filed: July 19, 2016
    Publication date: November 10, 2016
    Applicant: TAMURA CORPORATION
    Inventor: Kotaro SUZUKI
  • Ga2O3 BASED CRYSTAL FILM FORMING METHOD, AND CRYSTAL LAMINATED STRUCTURE
    Publication number: 20160312380
    Abstract: A Ga2O3 based crystal film forming method includes epitaxially growing a Ga2O3 based crystal film over a Ga2O3 based substrate. A growth temperature for the crystal film is not lower than 560 degrees Celsius. A VI/III ratio in an atmosphere adjacent to a growing surface when the crystal film is grown is smaller than ½, or greater than 2. A crystal laminated structure includes a Ga2O3 based substrate including a first group IV element, and a Ga2O3 based crystal film including a second group IV element, the crystal film being formed over the substrate, and having a surface roughness (RMS) of smaller than 1 nm, and a thickness of not smaller than 300 nm. A coefficient of variation of a concentration distribution of the second group IV element in a depth direction in the crystal film is not more than 20 percent.
    Type: Application
    Filed: April 22, 2016
    Publication date: October 27, 2016
    Applicant: TAMURA CORPORATION
    Inventor: Kohei SASAKI
  • GaOsemiconductor element
    Patent number: 9461124
    Abstract: A Ga2O3 semiconductor element, includes: an n-type ?-Ga2O3 substrate; a ?-Ga2O3 single crystal film, which is formed on the n-type ?-Ga2O3 substrate; source electrodes, which are formed on the ?-Ga2O3 single crystal film; a drain electrode, which is formed on the n-type ?-Ga2O3 substrate surface on the reverse side of the ?-Ga2O3 single crystal film; n-type contact regions, which are formed in the ?-Ga2O3 single crystal film, and have the source electrodes connected thereto, respectively; and a gate electrode, which is formed on the ?-Ga2O3 single crystal film with the gate insulating film therebetween.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: October 4, 2016
    Assignees: TAMURA CORPORATION, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Kohei Sasaki, Masataka Higashiwaki
  • LEAD-FREE SOLDER ALLOY, ELECTRONIC CIRCUIT BOARD, AND ELECTRONIC CONTROL DEVICE
    Publication number: 20160279741
    Abstract: A lead-free solder alloy includes: 1 wt % to 4 wt % of Ag; 0.5 wt % to 1 wt % of Cu; 1 wt % to 5 wt % of Sb; 0.05 wt % to 0.25 wt % of at least one of Ni and Co; and Sn.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 29, 2016
    Applicant: TAMURA Corporation
    Inventors: Tsuyoshi UKYO, Tatsuya KIYOTA, Masaya ARAI, Naoko MATSUO, Tsukasa KATSUYAMA, Kota HATTORI
  • Ga2O3 semiconductor element
    Patent number: 9437689
    Abstract: A Ga2O3 semiconductor element includes: an n-type ?-Ga2O3 single crystal film, which is formed on a high-resistance ?-Ga2O3 substrate directly or with other layer therebetween; a source electrode and a drain electrode, which are formed on the n-type ?-Ga2O3 single crystal film; and a gate electrode, which is formed on the n-type ?-Ga2O3 single crystal film between the source electrode and the drain electrode.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: September 6, 2016
    Assignees: TAMURA CORPORATION, NATIONAI INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Kohei Sasaki, Masataka Higashiwaki