Patents Assigned to Tamura Corporation
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Patent number: 10825935Abstract: A trench MOS-type Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer laminated on the first semiconductor layer and that includes a Ga2O3-based single crystal and a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer opposite to the first semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer opposite to the second semiconductor layer, an insulating film covering the inner surface of the trench of the second semiconductor layer, and a trench MOS gate that is embedded in the trench of the second semiconductor layer so as to be covered with the insulating film and is in contact with the anode electrode.Type: GrantFiled: April 20, 2017Date of Patent: November 3, 2020Assignees: TAMURA CORPORATION, National Institute of Information and Communications TechnologyInventors: Kohei Sasaki, Masataka Higashiwaki
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Publication number: 20200296845Abstract: A gate driver includes: driver boards mountable on an IGBT module which is a driving-target external device; gate driver circuits which are formed on the driver boards and each apply a drive signal generated using power and a signal which are externally input through an input connector, to semiconductor elements of the IGBT module; and an insulating surrounding member disposed to surround a peripheral edge of the input-side driver board.Type: ApplicationFiled: March 12, 2020Publication date: September 17, 2020Applicant: TAMURA CORPORATIONInventors: Hirotoshi AOKI, Kiyotaka YOSHIDA, Tomohiko YOSHINO
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Publication number: 20200243332Abstract: A semiconductor substrate that is used as an underlying substrate for epitaxial crystal growth carried out by the HVPE method includes a ?-Ga2O3-based single crystal, and a principal plane that is a plane parallel to a [100] axis of the ?-Ga2O3-based single crystal. An epitaxial wafer includes the semiconductor substrate, and an epitaxial layer including a ?-Ga2O3-based single crystal and formed on the principal plane of the semiconductor substrate by epitaxial crystal growth using the HVPE method. A method for producing an epitaxial wafer includes by using the HVPE method, epitaxially growing an epitaxial layer including a ?-Ga2O3-based single crystal on a semiconductor substrate that includes a ?-Ga2O3-based single crystal and has a principal plane parallel to a [100] axis of the ?-Ga2O3-based single crystal.Type: ApplicationFiled: November 16, 2016Publication date: July 30, 2020Applicants: TAMURA CORPORATION, National University Corporation Tokyo University of Agriculture and TechnologyInventors: Ken GOTO, Yoshinao KUMAGAI, Hisashi MURAKAMI
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Publication number: 20200235234Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.Type: ApplicationFiled: September 26, 2018Publication date: July 23, 2020Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.Inventor: Kohei SASAKI
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Publication number: 20200200347Abstract: A light emitting device includes a laser diode that emits a blue light, and a wavelength conversion part that absorbs a part of light emitted from the laser diode and converts a wavelength thereof. The wavelength conversion part includes a YAG-based single crystal phosphor. Irradiance of light emitted from the laser diode and irradiated on the wavelength conversion part is not less than 80 W/mm2.Type: ApplicationFiled: December 27, 2016Publication date: June 25, 2020Applicants: TAMURA CORPORATION, KOHA CO., LTD.Inventors: Mikihiko UWANI, Akira ITO, Hiroyuki SAWANO, Kentaro TONE, Hiroaki SANO, Daisuke INOMATA, Kazuyuki IIZUKA
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Patent number: 10676841Abstract: A semiconductor substrate for being used as a base substrate for epitaxial crystal growth by HVPE method includes a ?-Ga2O3-based single crystal, and a principal surface that is a plane parallel to a [010] axis of the ?-Ga2O3-based single crystal. An epitaxial wafer includes the semiconductor substrate, and an epitaxial layer that includes a ?-Ga2O3-based single crystal and is formed on the principal surface of the semiconductor substrate by epitaxial crystal growth using the HVPE method. A method for manufacturing the epitaxial wafer includes forming the epitaxial layer by epitaxial crystal growth using the HVPE method on the semiconductor substrate.Type: GrantFiled: May 11, 2015Date of Patent: June 9, 2020Assignees: TAMURA CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGYInventors: Ken Goto, Akinori Koukitu, Yoshinao Kumagai, Hisashi Murakami
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Publication number: 20200168460Abstract: A semiconductor substrate includes a single crystal Ga2O3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga2O3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga2O3-based substrate.Type: ApplicationFiled: July 9, 2018Publication date: May 28, 2020Applicants: TAMURA CORPORATION, SICOXS Corporation, National Institute of Information and Communications TechnologyInventors: Akito KURAMATA, Shinya WATANABE, Kohei SASAKI, Kuniaki YAGI, Naoki HATTA, Masataka HIGASHIWAKI, Keita KONISHI
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Publication number: 20200168711Abstract: A diode includes an n-type semiconductor layer including an n-type Ga2O3-based single crystal, and a p-type semiconductor layer including a p-type semiconductor in which a volume of an amorphous portion is higher than a volume of a crystalline portion. The n-type semiconductor layer and the p-type semiconductor layer form a pn junction.Type: ApplicationFiled: July 23, 2018Publication date: May 28, 2020Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.Inventor: Kohei SASAKI
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Publication number: 20200144377Abstract: A Ga2O3-based semiconductor device includes a Ga2O3-based crystal layer including a donor, and an N-doped region formed in at least a part of the Ga2O3-based crystal layer.Type: ApplicationFiled: April 26, 2018Publication date: May 7, 2020Applicants: NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY, TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Masataka HIGASHIWAKI, Yoshiaki NAKATA, Takafumi KAMIMURA, Man Hoi WONG, Kohei SASAKI, Daiki WAKIMOTO
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Patent number: 10633761Abstract: Provided are a Ga2O3-based single crystal substrate including a Ga2O3-based single crystal which has a high resistance while preventing a lowering of crystal quality and a production method therefor. According to one embodiment of the present invention, the production method includes growing the Ga2O3-based single crystal while adding a Fe to a Ga2O3-based raw material, the Ga2O3-based single crystal (5) including the Fe at a concentration higher than that of a donor impurity mixed in the Ga2O3-based raw material, and cutting out the Ga2O3-based single crystal substrate from the Ga2O3-based single crystal (5).Type: GrantFiled: October 26, 2018Date of Patent: April 28, 2020Assignee: TAMURA CORPORATIONInventor: Kohei Sasaki
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Publication number: 20200102667Abstract: [Problem] To provide a crystal laminate structure having a ?-Ga2O3 based single crystal film in which a dopant is included throughout the crystal and the concentration of the dopant can be set across a broad range. [Solution] In one embodiment of the present invention, provided is a crystal laminate structure 1 which includes: a Ga2O3 based substrate 10; and a ?-Ga2O3 based single crystal film 12 formed by epitaxial crystal growth on a primary face 11 of the Ga2O3 based substrate 10 and including Cl and a dopant doped in parallel with the crystal growth at a concentration of 1×1013 to 5.0×1020 atoms/cm3.Type: ApplicationFiled: December 3, 2019Publication date: April 2, 2020Applicants: TAMURA CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGYInventors: Ken GOTO, Akinori KOUKITU, Yoshinao KUMAGAI, Hisashi MURAKAMI
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Publication number: 20200101567Abstract: Molded solder includes first metal powder and second metal powder. The first metal powder has a first solidus temperature and a first liquidus temperature and includes an alloy containing metal elements. The second metal powder has a melting temperature or a second solidus temperature and a second liquidus temperature and includes single metal element or an alloy containing metal elements. The melting temperature and the second liquidus temperature are higher than the first liquidus temperature. The molded solder is so constructed that a mixture of the first metal powder and the second metal powder are press-molded. The molded solder is so constructed that a first solidus temperature of a solder becomes higher when the molded solder becomes the solder after the first metal powder has been melted by heating the molded solder at a temperature equal to or higher than the first liquidus temperature.Type: ApplicationFiled: September 19, 2019Publication date: April 2, 2020Applicant: TAMURA CORPORATIONInventors: Isao SAKAMOTO, Akira KITAMURA, Hiroaki TANIGUCHI
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Patent number: 10600874Abstract: A semiconductor device includes a semiconductor layer including a Ga2O3-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the Ga2O3-based single crystal.Type: GrantFiled: February 17, 2017Date of Patent: March 24, 2020Assignee: TAMURA CORPORATIONInventors: Masaru Takizawa, Akito Kuramata
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Publication number: 20200072875Abstract: A current sensor 100 includes: a magnetic core 104 which focuses a magnetic field generated by continuity of a current to be sensed IP; an element 108 which outputs a sensing signal according to an intensity of the magnetic field focused by the magnetic core 104; a circuit 116 which applies a feedback current to a winding 118 based on the sensing signal from the element 108 and balances magnetism; and a coupling circuit 124 which couples supply paths 123, 124 of a power supply 122 to the circuit 116 and an application path 117 of a feedback current to the winding 118 via capacitors C1, C2.Type: ApplicationFiled: August 12, 2019Publication date: March 5, 2020Applicant: TAMURA CORPORATIONInventor: Kiyotaka MORITA
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Patent number: 10580569Abstract: An electronic component 100 includes: a circuit board module 104 which is composed of a plurality of layers, and in which a primary circuit 120 and secondary circuits 122, 124 are each formed using wring patterns of a first layer L1 to an eighth layer L8; and a magnetic core 106 which magnetically couples the primary circuit 120 and the secondary circuits 122, 124. The circuit board module 104 includes: cutout portions 104b which are formed in a cutout shape from side edge portions toward an inner side and which position the magnetic core 106 at a predetermined attachment position in a state of housing the magnetic core 106; and widened portions 104c which continue from the cutout portions 104b and are formed in a cutout shape from the side edge portions toward the inner side of the circuit board module 104, and which are formed on sides of the magnetic core 106 so as to be larger than a width W1 for housing of the cutout portions 104b.Type: GrantFiled: May 16, 2019Date of Patent: March 3, 2020Assignee: TAMURA CORPORATIONInventors: Hiroo Ogawa, Tomohiko Yoshino
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Publication number: 20200066921Abstract: A trench MOS Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer laminated on the first semiconductor layer and that includes a Ga2O3-based single crystal and a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer, an insulating film covering an inner surface of the trench, and a trench MOS gate that is buried in the trench so as to be covered with the insulating film and is in contact with the anode electrode. The second semiconductor layer includes a lower layer on a side of the first semiconductor layer and an upper layer on a side of the anode electrode having a higher donor concentration than the lower layer.Type: ApplicationFiled: February 27, 2018Publication date: February 27, 2020Applicants: TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Kohei SASAKI, Masataka HIGASHIWAKI
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Patent number: 10538862Abstract: A crystal laminate structure includes a Ga2O3-based substrate, and a ?-Ga2O3-based single crystal film formed by epitaxial crystal growth on a principal surface of the Ga2O3-based substrate. The ?-Ga2O3-based single crystal film includes Cl and a dopant doped in parallel with the crystal growth at a concentration of not less than 1×1013 atoms/cm3 and not more than 5.0×1020 atoms/cm3.Type: GrantFiled: February 17, 2016Date of Patent: January 21, 2020Assignees: TAMURA CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGYInventors: Ken Goto, Akinori Koukitu, Yoshinao Kumagai, Hisashi Murakami
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Patent number: 10526721Abstract: Provided is a method for growing a ?-Ga2O3-based single crystal, whereby it becomes possible to grow a ?-Ga2O3-based single crystal having a small variation in crystal structure and also having a high quality in the direction of a b axis. In one embodiment, a method for growing a ?-Ga2O3-based single crystal includes growing a plate-shaped Sn doped ?-Ga2O3-based single crystal in the direction of the b axis using a seed crystal.Type: GrantFiled: March 31, 2014Date of Patent: January 7, 2020Assignees: KOHA CO., LTD., TAMURA CORPORATIONInventors: Shinya Watanabe, Kazuyuki Iizuka, Kei Doioka, Haruka Matsubara, Takekazu Masui
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Publication number: 20190371514Abstract: An electronic component 100 includes: a circuit board module 104 which is composed of a plurality of layers, and in which a primary circuit 120 and secondary circuits 122, 124 are each formed using wring patterns of a first layer L1 to an eighth layer L8; and a magnetic core 106 which magnetically couples the primary circuit 120 and the secondary circuits 122, 124. The circuit board module 104 includes: a primary winding 120b and secondary windings 122b, 124b which are formed spirally around the magnetic core 106; and a third layer L3 and a sixth layer L6 interposed between a fourth layer L4 of the primary winding 120b and a second layer L2 of the secondary winding 122b and between a fifth layer L5 of the primary winding 120b and a seventh layer L7 of the secondary winding 124b.Type: ApplicationFiled: May 16, 2019Publication date: December 5, 2019Applicant: TAMURA CORPORATIONInventors: Hiroo OGAWA, Tomohiko YOSHINO
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Publication number: 20190371516Abstract: An electronic component 100 includes: a circuit board module 104 which is composed of a plurality of layers, and in which a primary circuit 120 and secondary circuits 122, 124 are each formed using wring patterns of a first layer L1 to an eighth layer L8; and a magnetic core 106 which magnetically couples the primary circuit 120 and the secondary circuits 122, 124. The circuit board module 104 includes: cutout portions 104b which are formed in a cutout shape from side edge portions toward an inner side and which position the magnetic core 106 at a predetermined attachment position in a state of housing the magnetic core 106; and widened portions 104c which continue from the cutout portions 104b and are formed in a cutout shape from the side edge portions toward the inner side of the circuit board module 104, and which are formed on sides of the magnetic core 106 so as to be larger than a width W1 for housing of the cutout portions 104b.Type: ApplicationFiled: May 16, 2019Publication date: December 5, 2019Applicant: TAMURA CORPORATIONInventors: Hiroo OGAWA, Tomohiko YOSHINO