Patents Assigned to TECHNOLOGIES INC.
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Publication number: 20220293611Abstract: A method for manufacturing a semiconductor structure and a semiconductor structure can improve performance of the semiconductor structure. The method for manufacturing the semiconductor structure includes: forming bit line structures on a substrate, each of the bit line structures including a conductive layer, a transition layer and a covering layer stacked sequentially, and a width of the transition layer being smaller than a width of the conductive layer; and forming air gaps on a top surface of the conductive layer and side surfaces of the transition layer. The air gaps not only can reduce influence of the covering layer on the conductive layer to prevent the resistance of the conductive layer from increasing, but also can reduce the parasitic capacitance between the bit line structures and the surrounding structures thereof, thereby improving the performance of the semiconductor structure.Type: ApplicationFiled: December 7, 2021Publication date: September 15, 2022Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: ER-XUAN PING, JIE BAI, Juanjuan HUANG
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Publication number: 20220293586Abstract: An electro-static discharge (ESD) protection circuit is electrically connected to a first pad and a second pad. The ESD protection circuit includes an ESD transistor having a control terminal, a first terminal electrically connected to the first pad, a second terminal electrically connected to the second pad, and a substrate end; and an electro-static pulse detection circuit having an upper terminal electrically connected to the first pad, a lower terminal electrically connected to the second pad, and an output terminal electrically connected to the control terminal and the substrate end of the ESD transistor.Type: ApplicationFiled: November 8, 2021Publication date: September 15, 2022Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Qian XU
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Publication number: 20220294684Abstract: According to one aspect of the present disclosure, there is provided a device that includes: a first quadrature modulator configured to receive an in-phase portion of a baseband signal and a quadrature portion of the baseband signal, and to produce a first portion of an output signal according to the in-phase and quadrature portions of the baseband signal; a second quadrature modulator configured to receive a first modified signal and a second modified signal, and to produce a second portion of the output signal according to the first and second modified signals; an output circuit configured to sum the first and second portions of the output signal, and to transmit the output signal to an antenna; and a mode selection circuit configured to turn on the first quadrature modulator, to receive a control signal, and to determine whether to turn on the second quadrature modulator according to the control signal.Type: ApplicationFiled: December 23, 2021Publication date: September 15, 2022Applicant: FUTUREWEI TECHNOLOGIES, INC.Inventors: Hong Jiang, Zhihang Zhang, Jamil Mark Forrester, Wael Al-Qaq
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Publication number: 20220293718Abstract: A semiconductor structure manufacturing method includes: providing a substrate; forming, on the substrate, a stack structure including a sacrificial layer and a support layer which are alternately stacked on each other; forming a capacitance hole in the stack structure; forming a first electrode layer on a side wall and a bottom of each capacitance hole; forming a first dielectric layer on an inner surface of the first electrode layer; forming, on the stack structure, an opening from which the sacrificial layer is exposed, and removing the sacrificial layer through the opening; forming a second dielectric layer on an inner surface of the first dielectric layer and an outer surface of the first electrode layer; and forming a second electrode layer on an inner surface and an outer surface of the second dielectric layer.Type: ApplicationFiled: January 20, 2022Publication date: September 15, 2022Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: CHIH-CHENG LIU
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Publication number: 20220288461Abstract: A method includes receiving first data pertaining to a first user using a treatment apparatus to perform a treatment plan, wherein the first data comprises an attribute of the first user and an occupational task associated with the first user; receiving second data pertaining to a second user, wherein the second data comprises an attribute of the second user and an occupational task associated with the second user; determining whether an attribute and occupational task of the second user matches an attribute and occupational task of the first user; and responsive to determining that the attribute and the occupational task of the second user matches the attribute and occupational task of the first user, predicting, via an artificial intelligence engine, an estimate of when the second user performing the treatment plan would be capable of performing the occupational task associated with the second user.Type: ApplicationFiled: May 27, 2022Publication date: September 15, 2022Applicant: ROM TECHNOLOGIES, INC.Inventors: John Ashley, Steven Mason
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Patent number: 11442106Abstract: A circuit debug apparatus for debugging an integrated circuit that causes a functional fault may include a processor configured to extract a scan pattern of a scan chain of the integrated circuit while the integrated circuit is in a scan mode. The scan pattern includes a plurality of logic states for a corresponding plurality of logic circuits of the integrated circuit. The processor may also be configured to apply a modified scan pattern to the integrated circuit while the integrated circuit is in the scan mode, where the modified scan pattern includes a test pattern configured to eliminate the functional fault. The processor may be further configured to determine whether the integrated circuit with the modified scan pattern produces the functional fault while the integrated circuit is in a functional mode.Type: GrantFiled: February 24, 2021Date of Patent: September 13, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Amir Segev, Shay Benisty
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Patent number: 11441586Abstract: An additively manufactured node is disclosed. A node is an additively manufactured (AM) structure that includes a feature, e.g., a socket, a receptacle, etc., for accepting another structure, e.g., a tube, a panel, etc. An additively manufactured node can include a surface with an opening to a feed channel through the node. A second surface of the node can include with a plurality of openings to an array of outlet channels. Each of the outlet channels can extend through the node and can connect to the feed channel. Tortuous paths can be used between channels created by the node surface and adjacent structures as well as node interior surfaces. These tortuous paths can be tuned to allow for optimal fluid flow processes.Type: GrantFiled: May 25, 2018Date of Patent: September 13, 2022Assignee: DIVERGENT TECHNOLOGIES, INC.Inventors: Eahab Nagi El Naga, David Brian TenHouten, Eli Rogers, Kenneth James Goodstein
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Patent number: 11442463Abstract: An autonomous mobile device moves through a physical space using simultaneous localization and mapping (SLAM) techniques. SLAM processes images from cameras to determine localization and trajectory of the device based on features that are assumed to be stationary. SLAM performance is improved by removing moving features from consideration. A first position of a feature at a first time and data from an inertial sensor are used to determine a predicted position at a second time. The predicted position is compared to a second position of the feature at the second time. This comparison takes into consideration an assumed Gaussian error distribution of how the positions are determined. If the predicted position differs from the second position by less than a threshold value, the feature may be determined to be stationary. The stationary features are then processed using SLAM to determine the localization and trajectory information.Type: GrantFiled: September 23, 2019Date of Patent: September 13, 2022Assignee: AMAZON TECHNOLOGIES, INC.Inventors: David Allen Fotland, Ishan Ankur Patil, Yan Lu, Joydeep Biswas
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Patent number: 11439305Abstract: A system and kit for capturing a 3D image of a body a user includes a plurality of pillar segments being configurable between an assembled configuration and a disassembled configuration. In the assembled configuration, the pillar segments are joined to form one or more upstanding sensing pillars. A plurality of sensors operable to capture image data are distributed along the one or more sensing pillars. The plurality of sensors have fields of view that are overlapping when supported on the sensing pillars. In the disassembled configuration, transportation of the pillar segments is facilitated. The system and kit may be suitable for use at a remote location. Additional functionalities may include a power storage unit, solar charging panels, climate control subsystem, and wireless communication submodule. In operation, the sensing pillars may be enclosed within an enclosure.Type: GrantFiled: June 21, 2018Date of Patent: September 13, 2022Assignee: H3ALTH TECHNOLOGIES INC.Inventor: Elias Gedamu
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Patent number: 11439058Abstract: A system and method for monitoring and controlling operation of an autonomous robot. In one aspect, the autonomous robot is a lawnmower and the system comprises: an autonomous robot lawnmower comprising a housing, a transceiver, and a central processing unit; an external device in operable communication with the autonomous robot lawnmower, the external device having a transceiver for sending signals to the autonomous robot lawnmower and a display; and wherein in response to user input, the external device is configured to modify settings related to operation of the autonomous robot lawnmower.Type: GrantFiled: October 22, 2019Date of Patent: September 13, 2022Assignee: FUTUREGEN TECHNOLOGIES INC.Inventor: Michael Todd Letsky
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Patent number: 11439117Abstract: A milker unit detacher with an adjustable and releasable hose support and a support arm that pivots about a tilted axis to bias the support arm toward a milking position to maintain engagement with the adjustable hose support member.Type: GrantFiled: November 7, 2018Date of Patent: September 13, 2022Assignee: GEA FARM TECHNOLOGIES, INC.Inventor: Jonathan V. Shore
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Patent number: 11444831Abstract: A method for measuring a schedule update time of a time aware shaper DUT includes configuring the DUT with a first configuration that blocks traffic from at least one gate of the DUT. The method further includes transmitting traffic from an emulated talker to an emulated listener via the DUT. The method further includes confirming blocking of the traffic from the at least one gate of the DUT and transmitting a second configuration from an emulated CNC node to the DUT, where the second configuration opens the at least one gate of the DUT, recording a time T1 of transmission of the second configuration to the DUT, detecting traffic from the at least one gate of the DUT at the listener, recording a time T2 of receipt of the traffic at the listener, and calculating a response time of the DUT to the second configuration based on T1 and T2.Type: GrantFiled: January 17, 2020Date of Patent: September 13, 2022Assignee: KEYSIGHT TECHNOLOGIES, INC.Inventor: Tanuman Bhaduri
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Patent number: 11444936Abstract: Disclosed are various embodiments for managing security credentials. In one embodiment, knowledge-based questions are selected in response to failing to receive a valid master security credential in a request to authenticate a user account for access to account data. In response to receiving the request, the plurality of knowledge-based questions are provided to an application. Answers to the knowledge-based questions are received and scored. Access is granted to establish a new master security credential based at least in part on the score meeting or exceeding a predetermined threshold.Type: GrantFiled: June 14, 2019Date of Patent: September 13, 2022Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Darren Ernest Canavor, Jesper Mikael Johannson
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Patent number: 11444619Abstract: A driving circuit, including: a pull-up transistor and a pull-down transistor, where a first terminal of the pull-up transistor is connected with a power source, a second terminal of the pull-up transistor is connected with a first terminal of the pull-down transistor to together output a driving signal, and a second terminal of the pull-down transistor is connected to ground; and a control circuit connected with a control terminal of the pull-up transistor and/or the pull-down transistor respectively and configured to control the on or off switching of the pull-up transistor and/or the pull-down transistor so as to change the driving signal. The pull-up transistor and the pull-down transistor are not switched on at the same time under the control of the control circuit.Type: GrantFiled: August 16, 2021Date of Patent: September 13, 2022Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Liang Zhang
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Patent number: 11444764Abstract: An underwater vehicle system includes a data security system. The data security system includes a data pod including persistent storage. The persistent storage stores encrypted data. The security system includes a watchdog. The watchdog includes at least one processor. The security system includes a watchdog key. The watchdog key is stored in volatile storage. The watchdog key is configured to be used to decrypt the encrypted data. The data security system is configured to remove the watchdog key from the underwater vehicle system, thereby preventing access to the encrypted data on the data pod.Type: GrantFiled: May 18, 2020Date of Patent: September 13, 2022Assignee: L3HARRIS TECHNOLOGIES, INC.Inventors: Jason D. Aiello, Jeffery A. DeArruda, Kevin W. Ludlam, Daryl B. Slocum, Cagdas Altin
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Patent number: 11442824Abstract: Disclosed are various embodiments for distributing data items. A plurality of nodes forms a distributed data store. A new master candidate is determined through an election among the plurality of nodes. Before performing a failover from a failed master to the new master candidate, a consensus is reached among a locality-based failover quorum of the nodes. The quorum excludes any of the nodes that are in a failover quorum ineligibility mode.Type: GrantFiled: July 14, 2017Date of Patent: September 13, 2022Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Michael T. Helmick, Jakub Kulesza, Stefano Stefani, David A. Lutz
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Patent number: 11443790Abstract: A magnetoresistive memory device includes a first electrode, a second electrode that is spaced from the first electrode, and a perpendicular magnetic tunnel junction layer stack located between the first electrode and the second electrode. The perpendicular magnetic tunnel junction layer stack includes, from one side to another: a reference layer having a fixed reference magnetization direction, a first spinel layer located including a first polycrystalline spinel material having (001) texture along an axial direction that is perpendicular to an interface with the reference layer, a magnesium oxide layer including a polycrystalline magnesium oxide material having (001) texture along the axial direction, a second spinel layer including a second polycrystalline spinel material having (001) texture along the axial direction, and a ferromagnetic free layer.Type: GrantFiled: March 4, 2021Date of Patent: September 13, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Bhagwati Prasad, Derek Stewart, Matthew Carey, Tiffany Santos
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Patent number: 11444108Abstract: Examples of the disclosed subject matter propose disposing deep trench isolation structure around the perimeter of the pixel transistor region of the pixel cell. In some example embodiments, the deep trench isolation structure extends into the semiconductor substrate from the back side of the semiconductor substrate and abuts against or contacts the bottom of shallow trench isolation structure disposed in the front side of the semiconductor substrate. Together, the trench isolating structure isolates the transistor channel of the pixel transistor region. The formation and arrangement of the trench isolation structure in the pixel transistor region forms a floating doped well region, such as a floating P-doped well region (P-well), containing a floating diffusion (FD) and source/drains (e.g., (N) doped regions) of the pixel transistors. This floating P-well region aims to reduce junction leakage associated with the floating diffusion region of the pixel cell.Type: GrantFiled: July 8, 2020Date of Patent: September 13, 2022Assignee: OMNIVISION TECHNOLOGIES, INC.Inventors: Seong Yeol Mun, Bill Phan
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Patent number: D963366Type: GrantFiled: September 20, 2019Date of Patent: September 13, 2022Assignee: CANOO TECHNOLOGIES INC.Inventors: Richard Kim, Taeho Kim, Arthur Henrique Martins, Jr., Cameron Bresn, Jarrad Adams
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Patent number: D963872Type: GrantFiled: January 19, 2021Date of Patent: September 13, 2022Assignee: R2 TECHNOLOGIES, INC.Inventors: Wolfgang Günter Zender, James Edward Hastings, Timothy Dwaine Holt, Scott Janis, Madison Nicole Berger, Andrew Leonard Zee, Lea Sandra Kobeli, Steven Mardis Bagley