Patents Assigned to TECHNOLOGIES INC.
  • Patent number: 12260886
    Abstract: Disclosed herein is a magnetic storage device that comprises a suspension arm co-movably fixed to a carriage arm. The suspension arm comprises a slider attachment side and at least one first electrical contact pad on the slider attachment side. The suspension arm also comprises a slider co-movably fixed to the suspension arm. The slider comprises a suspension attachment side, a non-head side facing the suspension arm and intersecting the suspension attachment side at a first slider edge of the slider, a head side facing away from the suspension arm, and at least one electrical contact component on the suspension attachment side up to the first slider edge. At least one solder weldment is directly coupled to the at least one first electrical contact pad and the at least one electrical contact component. Additionally, a read-write head is coupled to the head side of the slider.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: March 25, 2025
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Kohichiroh Naka, Yuhsuke Matsumoto, Hiroto Sato
  • Patent number: 12260933
    Abstract: The present disclosure provides a data receiving circuit, a data receiving system, and a memory device. The data receiving circuit includes: a receiving module, configured to receive a data signal and a reference signal, compare the data signal and the reference signal in response to a sampling clock signal, and output a first output signal and a second output signal; and a decision feedback equalization module, connected to a feedback node of the receiving module, and configured to perform a decision feedback equalization on the receiving module on the basis of a feedback signal to adjust the first output signal and the second output signal, wherein the feedback signal is obtained on the basis of data received previously, and an adjustment capability of the decision feedback equalization module to the first output signal and the second output signal is adjustable.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Feng Lin
  • Patent number: 12257115
    Abstract: Devices and head components that include a band component and one or more rotational components are provided. Devices and head components that include one or more fluid driven rotational components are provided. Related methods are also provided.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: March 25, 2025
    Assignee: AIVIA TECHNOLOGIES, INC.
    Inventor: Christopher C Sappenfield
  • Patent number: 12259092
    Abstract: An energy storage system has a pressure vessel that is exposed to ambient temperatures and that contains a working fluid which is condensable at ambient temperatures (CWF); a liquid reservoir in communication with one of the vessels and containing a liquid that is unvaporizable in the reservoir and in the vessel; and apparatus for delivering the liquid from the reservoir to the vessel. The CWF is compressible within the vessel upon direct contact with the liquid and is storable in a liquid state after being compressed to its saturation pressure. In a method, at least some of the liquid located in the vessel is propelled by the CWF towards a turbine to produce power. In one embodiment, a module has a first vessel having at least four ports, a second vessel at ambient temperatures, and a flow control component operatively connected to a corresponding conduit for selectively controlling fluid flow.
    Type: Grant
    Filed: April 24, 2024
    Date of Patent: March 25, 2025
    Assignee: ORMAT TECHNOLOGIES INC.
    Inventors: Eduard Katz, Omri Meshulam, Anton Fiterman, Nirit Grushko, Oren Ram, Elad Zlotnik, Tal Shofrony
  • Patent number: 12262529
    Abstract: A semiconductor device includes a semiconductor substrate, a word line trench and a word line structure. The word line trench includes a first word line trench and a second word line trench. The word line structure includes a first word line structure part and a second word line structure part connected to each other. The first word line structure part is formed in the first word line trench, and the second word line structure part is formed in the second word line trench; and the first word line structure part includes an avoidance region, and the top surface of the avoidance region is aligned with the top surface of the second word line structure part, and the avoidance region is provided with insulating material.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Xiaobo Mei
  • Patent number: 12261137
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate, and a first bonding structure and a first conductive via which are formed in the first substrate. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than a melting point of the first metal layer. The first metal layer includes a first surface and a second surface arranged opposite to each other. The first surface of the first metal layer is provided with a first groove, and the second metal layer is arranged in the first groove. The first conductive via is in contact with the second surface of the first metal layer. A projection of the first conductive via coincides with a projection of the first groove in a direction perpendicular to the first surface of the first metal layer.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Ling-Yi Chuang
  • Patent number: 12259648
    Abstract: A photomask protection device, a photomask protection system, and a use method of a photomask protection system are provided. The photomask protection device includes a frame and a pellicle. The frame is disposed on a substrate of a photomask and is provided with a clamping space. Edges of the pellicle are fixed in the clamping space.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Fei Sun
  • Patent number: 12262522
    Abstract: Embodiments provide method for fabricating a semiconductor structure, and a semiconductor structure. The method includes: providing a substrate, a thin-film stack structure being formed on the substrate; forming a first groove and a second groove in the thin-film stack structure, and forming write transistors in the first groove, the second groove extending along a first direction, and the second groove being positioned between adjacent two of the write transistors in a second direction; removing a part of the thin-film stack structure by etching using the second groove to form a first hole and a second hole respectively, forming a write word line in the first hole, and forming a write bit line in the second hole; forming a first via on an upper surface of the thin-film stack structure, and forming a storage node in the first via; and forming a read transistor, a read bit line and a lead.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shuai Guo, Mingguang Zuo
  • Patent number: 12259067
    Abstract: A pipe fitting having a first body and a second body that together at least partially define a fluid flow passage. The first body defines a first portion of the fluid flow passage that extends from a first end of the fluid flow passage to a first internal opening. The second body defines a second portion of the fluid flow passage that extends from a second internal opening to a second end of the fluid flow passage. The first body has a first interface surface that surrounds the first internal opening, the first interface surface having a plurality of anti-rotation grooves. The second body has a second interface surface that surrounds the second internal opening and engages with the first interface surface. The first internal opening is in fluid communication with the second internal opening. The second interface surface has a plurality of anti-rotation fingers that are each received by and engage with a corresponding one of the anti-rotation grooves.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: March 25, 2025
    Assignee: IPEX TECHNOLOGIES INC.
    Inventors: Jeffrey Vincent Littlefield, Qing Li, Filippo Martino
  • Patent number: 12260086
    Abstract: Codebook data compaction using a universal codebook and mismatch probability estimations to improve entropy encoding methods. Training data sets are analyzed to determine the frequency of occurrence of each sourceblock in the training data sets. A mismatch probability estimate is calculated comprising an estimated frequency at which any given data sourceblock received during encoding will not have a codeword in the codebook. Entropy encoding is used to generate codebooks comprising codewords for data sourceblocks based on the frequency of occurrence of each sourceblock. A “mismatch codeword” is inserted into the codebook based on the mismatch probability estimate to represent those cases when a block of data to be encoded does not have a codeword in the codebook.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: March 25, 2025
    Assignee: ATOMBEAM TECHNOLOGIES INC
    Inventors: Joshua Cooper, Aliasghar Riahi, Charles Yeomans
  • Patent number: 12257551
    Abstract: A bipolar electrodialysis (BPED) cell is able to bipolar convert salt solutions into acid and base solutions. However, protons migrate through the anion exchange membranes and tend to neutralize the base solution. In a bipolar electrodialysis system described herein, multiple BPED cells are arranged to provide a multi-stage treatment system. Up to half, or up to one third, of the stages have cells with acid block anion membranes. The one or more stages with acid block anion membranes are located at the acid product output end of the system, where the acid concentration in the system is the highest. Replacing the traditional anion membranes in some of the stages with acid block anion membranes allows higher concentration products to be produced with moderate increase in energy consumption.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: March 25, 2025
    Assignee: BL TECHNOLOGIES, INC.
    Inventors: Chengqian Zhang, Wei Lu, Jiyang Xia, Yongchang Zheng, Bruce Batchelder, John H. Barber
  • Patent number: 12257864
    Abstract: Methods, system, apparatuses, and computer program products for securely pairing a vehicle-mounted wireless sensor with a central device are disclosed. In a particular embodiment, securely pairing a vehicle-mounted wireless sensor with a central device in accordance with the present disclosure includes a vehicle sensor device pairing with a vehicle control system (VCS) using a pre-shared passkey. The pre-shared passkey is shared between the vehicle sensor device and the VCS via an out-of-band exchange. This embodiment also includes the vehicle sensor device transmitting an identifier for a resolvable private address (RPA) to the VCS. In addition, the vehicle sensor device communicates with the VCS using the RPA. In this example embodiment, the RPA is periodically regenerated by the vehicle sensor device.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: March 25, 2025
    Assignee: SENSATA TECHNOLOGIES, INC.
    Inventors: Samuel D. Houston, Mark Duffy, Samuel K. Strahan
  • Patent number: 12262523
    Abstract: The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method of a semiconductor structure includes: providing a substrate; forming a plurality of silicon pillars on the substrate, where the silicon pillars are arranged as an array; preprocessing the silicon pillar to form an active pillar, where the active pillar includes a first segment, a second segment, and a third segment; forming a first gate oxide layer on sidewalls of the second segment and the third segment; and forming a second gate oxide layer on the first gate oxide layer, where a length of the second gate oxide layer is less than that of the first gate oxide layer, and a thickness of the second gate oxide layer is greater than that of the first gate oxide layer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: March 25, 2025
    Assignees: CHANGXIN MEMORY TECHNOLOGIES, INC., BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
    Inventors: Deyuan Xiao, Yong Yu, Guangsu Shao
  • Patent number: 12262562
    Abstract: An image sensor comprises a first photodiode, a second photodiode, and a deep trench isolation structure. The first photodiode and the second photodiode are each disposed within a semiconductor substrate. The first photodiode is adjacent to the second photodiode. The deep trench isolation structure has a varying depth disposed within the semiconductor substrate between the first photodiode and the second photodiode. The DTI structure extends the varying depth from a first side of the semiconductor substrate towards a second side of the semiconductor substrate. The first side of the semiconductor substrate is opposite of the second side of the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 25, 2025
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Seong Yeol Mun
  • Patent number: 12261632
    Abstract: A system and method for efficient data storage, transfer, synchronization, and security using automated model monitoring and training. The system analyzes test datasets to detect data drift, retraining encoding and decoding algorithms as needed. New data sourceblocks are created and assigned codewords, compiling an updated codebook for distribution to connected devices. A novel dyadic distribution subsystem simultaneously compresses and encrypts data by transforming input streams into a dyadic distribution. This process generates a compressed main data stream and a secondary stream of transformation information, which are combined into a secure output. The system includes a network device manager for optimizing codebook distribution based on device resource usage. Operating in both lossless and lossy modes, the system offers flexible, efficient, and secure data handling across various network configurations.
    Type: Grant
    Filed: November 7, 2024
    Date of Patent: March 25, 2025
    Assignee: ATOMBEAM TECHNOLOGIES INC
    Inventors: Joshua Cooper, Grant Fickes, Charles Yeomans
  • Patent number: 12260900
    Abstract: An in-memory computing circuit includes an initial computing circuit and a target computing circuit. Herein, the initial computing circuit is configured to perform first operation processing on first data and second data to output a first operation result, and perform second operation processing on the first data and the second data to output a second operation result. The target computing circuit is configured to perform the first operation processing on the second operation result and the first operation result to output a first target result, and perform the second operation processing on the first data and the second operation result to output a second target result.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Heng-Chia Chang
  • Patent number: 12259306
    Abstract: A sensor head assembly for a measurement system for powderised agent includes: an elongate body having a proximal end configured to receive a fibre optic cable, and a distal end; a sensing chamber provided within the elongate body, a first window provided at a proximal side of the sensing chamber and a second window provided at a distal end of the sensing chamber; and a concave mirror mounted within the elongate body at a distal side of the second window, wherein the concave mirror is mounted such that its position within the elongate body is adjustable.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 25, 2025
    Assignee: KIDDE TECHNOLOGIES, INC.
    Inventors: Modest Adam Reszewicz, Adrian Tarnowski, Mark P. Fazzio, Emil F. Baran, Jr., James Varnell
  • Patent number: 12260124
    Abstract: A method for programming a memory device having a plurality of planes is provided. Program commands and addresses are received. Each of the addresses associated with one of the program commands. A first plane of the plurality of planes are determined according to a first address of the addresses. A page register of the first plane is reset. A second plane of the plurality of planes is determined according to a second address of the addresses. A page register of the second plane is reset.
    Type: Grant
    Filed: January 3, 2024
    Date of Patent: March 25, 2025
    Assignee: YANGTZE MEMORY TECHNOLOGIES, INC.
    Inventors: Xiang Ming Zhi, Augustus Tsai
  • Patent number: 12261195
    Abstract: The present disclosure provides a manufacturing method of a semiconductor structure, and a semiconductor structure. The manufacturing method of a semiconductor structure includes: forming a plurality of cylindrical capacitors in an initial structure; removing part of the initial structure to form trenches, the trenches expose partial sidewalls of the cylindrical capacitors and a substrate of the initial structure; forming a dielectric layer, the dielectric layer at least covers an exposed surface of each of the cylindrical capacitors; forming a first top electrode, the first top electrode covers a surface of the dielectric layer; and forming a second top electrode, the second top electrode covers a surface of the first top electrode. In an axial direction of each of the cylindrical capacitors, the second top electrode formed in each of the trenches has a discontinuous part, and an air gap is formed in the discontinuous part of the second top electrode.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yulei Wu, Bin Yang
  • Patent number: 12262525
    Abstract: Provided are a method for preparing a semiconductor structure, a semiconductor structure and a semiconductor memory. The method includes the following operations. An initial semiconductor structure is formed on a substrate. The initial semiconductor structure is etched to form an array area structure and a peripheral area structure including a peripheral area gate structure. An isolation wall surrounding the peripheral area gate structure is formed on the substrate where the peripheral area structure locates. A second dielectric layer is deposited on the peripheral area gate structure including the isolation wall and on the array area structure. The second dielectric layer, the first dielectric layer and the isolation wall are etched to form the semiconductor structure with a flat surface.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Xiaojie Li, Pan Yuan