Patents Assigned to TECHNOLOGIES INC.
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Patent number: 12267363Abstract: Systems and methods for an identity management router to allow application clients/servers to communicate via an identity management protocol to facilitate communication of identity management artifacts with a simplified topology. Specifically, embodiments of an IM router may adhere to various data protection requirements, including, but not limited to, local data protection regulations, when routing identity management information. The identity management router is location aware and applies data compliance policies for areas of data compliance to selectively route or not route identity management data based on location.Type: GrantFiled: April 12, 2021Date of Patent: April 1, 2025Assignee: SAILPOINT TECHNOLOGIES, INC.Inventor: Christian Cairney
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Patent number: 12265104Abstract: A voltage detection circuit including a threshold setting module and a voltage conversion module, and a voltage detection method are provided. In the threshold setting module, a first input end is configured to receive a voltage to be detected, a second input end is configured to receive a threshold regulation signal, a power supply end is connected to a first voltage and is configured to set a voltage regulation range according to the threshold regulation signal, determine a first voltage regulation value in the voltage regulation range according to the voltage to be detected, and generate a control voltage according to the first voltage and the first voltage regulation value. The voltage conversion module is configured to output a first level when the control voltage is greater than a preset value and output a second level when the control voltage is less than or equal to the preset value.Type: GrantFiled: March 20, 2023Date of Patent: April 1, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Anping Qiu
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Patent number: 12263458Abstract: The present disclosure provides a chemical solution preparation system and method. The chemical solution preparation system includes: a first mixing system, configured to mix a first chemical solution and a first diluent to obtain a first mixture; a second mixing system, configured to mix a second chemical solution and a second diluent to obtain a second mixture; a third mixing system, configured to mix the first mixture, the second mixture, and a third diluent to obtain a third mixture; an output system, configured to output the third mixture to a spray apparatus of the chemical mechanical polishing device; a sampling system, configured to collect a sample of the third mixture output from the output system; and a monitoring system, configured to monitor a status of the first mixture, a status of the second mixture, and a status of the third mixture.Type: GrantFiled: October 29, 2021Date of Patent: April 1, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Po-Chang Tseng, Chang-Yi Tsai
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Publication number: 20250100499Abstract: Airbags deployable along a height of a traveler in a vehicle and methods for using the same are provided.Type: ApplicationFiled: October 4, 2024Publication date: March 27, 2025Applicant: MULLEN TECHNOLOGIES, INC.Inventors: Kedar Deshmukh, Robert Huotari, Marc Papakyriakou
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Publication number: 20250103220Abstract: A storage device optimizes performance and operates under a predefined power ceiling. The storage device determines its power usage and when the power usage is below a power ceiling threshold, the storage device operates according to a first random-access memory (RAM) usage policy and uses an internal RAM in processing host data. When the power usage is above the power ceiling threshold, the storage device operates according to a second RAM usage policy and uses an external RAM or the external RAM and portions of the internal RAM in processing the host data. The storage device switches to the first RAM usage policy when it determines that the host device is operating in a high-performance mode, there is a drop in cache hits on the external RAM, or a congestion level on a link between the host device and the storage device is above a congestion threshold.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: RAMANATHAN MUTHIAH, JUDAH GAMLIEL HAHN
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Publication number: 20250103030Abstract: A system and method for monitoring and controlling an industrial process using a data model extensible to different industry applications. The system is configured to: receive data describing the industrial process from one or more data sources in a first format; contextualize and transform the data by determining one or more tags for the data, the one or more tags comprising context information describing characteristics of the entities involved in the industrial process; generate a data model describing the industrial process based on the one or more tags; receive a first indication from a user indicating a first industry application to which the data model will be applied; and extend the data model to include a second plurality of nodes representing entities associated with the first industry application and a second plurality of edges connecting the second plurality of nodes and describing relationships between the second plurality of nodes.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Applicant: ROCKWELL AUTOMATION TECHNOLOGIES, INC.Inventors: Abhishek Negi, Douglas D. Fisher, Jennifer M. Kite, Ajai Singh
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Publication number: 20250105843Abstract: A transmitter controls the fall time on an open-drain link including multiple components. The transmitter includes an input driver to receive data and transmit the data on the open-drain link, thereby activating the open-drain link. The transmitter also includes a feedback mechanism to keep track of a pad when the open-drain link is activated and to determine when the pad reaches a predetermined amount of a supply voltage. When the pad reaches the predetermined amount of a supply voltage, the feedback mechanism triggers an appropriate main pull-down driver to control the fall time.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: ASHISH SAVADI, TEJASWINI KERAGODU
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Publication number: 20250103017Abstract: A system and method for monitoring and controlling energy use in an industrial process. The method includes: receiving, by a processing circuit, data describing energy use in an industrial process from one or more data sources; contextualizing, by the processing circuit, the data describing the energy use in an industrial process; generating, by the processing circuit, an energy data model based on the contextualized data; executing, by the processing circuit, the energy data model to determine key performance indicators for the energy use in an industrial process; displaying, by the processing circuit, the key performance indicators to a user; determining, by the processing circuit, if the key performance indicators are above one or more pre-determined thresholds; and taking a corrective action in response to the key performance indicators being above the one or more pre-determined thresholds.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Applicant: ROCKWELL AUTOMATION TECHNOLOGIES, INC.Inventors: Frank Schirra, Abhishek Negi, Douglas D. Fisher, John S. Ivey, JR., Jennifer M. Kite, Alexandra L. Schwertner, Sinethemba Zulu
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Publication number: 20250103043Abstract: A system and method for monitoring and controlling production of batches of products in an industrial process, the method comprising: receiving, by a processing circuit, data describing a batch of products generated in an industrial process from one or more data sources; contextualizing, by the processing circuit, the data describing the batch of products generated in the industrial process; generating, by the processing circuit, a batch data model based on the contextualized data; executing, by the processing circuit, the batch data model to determine key performance indicators for the batch of products; comparing, by the processing circuit, the key performance indicators to pre-determined key performance indicators; and performing an automated action based on a result of the comparison.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Applicant: ROCKWELL AUTOMATION TECHNOLOGIES, INC.Inventors: Fatime Ly Seymour, Abhishek Negi, Douglas D. Fisher, Jennifer M. Kite
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Publication number: 20250103039Abstract: A system and method for monitoring and controlling assets to mitigate predicted future faults. The method includes receiving, by a processing circuit, data describing an asset from one or more data sources; generating, by the processing circuit, an asset data model based on the received data; receiving, by the processing circuit, an extensible data model describing an organizational structure of an enterprise associated with the asset; extending, by the processing circuit, the extensible data model to include the asset models executing, by the processing circuit, the extensible data model including the asset models to determine one or more key performance indicators for the asset; predicting, by the processing circuit, a future fault for the asset based on the key performance indicators; sending, by the processing circuit, an informed and prioritized notification to plant personnel regarding the predicted fault; and taking a corrective action to mitigate the predicted future fault.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Applicant: ROCKWELL AUTOMATION TECHNOLOGIES, INC.Inventors: Scott Bromfield, Abhishek Negi, Douglas D. Fisher, Jennifer M. Kite
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Publication number: 20250103481Abstract: A storage device processes deferred unmap operations while maintaining instructions in a write command. A controller in a storage device receives an unmap command and a write command from a host, determines that a logical page in the write command overlaps with a range in the unmap command with deferred unmap operations, and processes the write command. In processing the write command, an L2P translation manager sets a collision bit for the logical page and updates a L2P table. When processing the deferred unmap operations, the controller selects the range and if, based on collision bits in the range the controller determines that there is no overlap between the write command and the range, the controller performs the deferred unmap operations for the range. If the controller determines that there is an overlap, the controller processes the deferred unmap operations to not override the write command.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: NAGA SHANKAR VADALAMANI, NAGI REDDY CHODEM, RAMDAS JAYANT SINGATHIYA
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Publication number: 20250103482Abstract: A storage device minimizes HPB entry inactivation resulting from data associated with hot reads being retrieved from multiple HPB sub-regions covering a logical-to-physical table. The storage device may support the HPB feature and a multiple HPB sub-region mode. The storage device includes a controller that tracks a hit count associated with a logical block address in a read command. The controller determines that the hit count has reached a hit threshold and updates a hit table to identify logical block address pages associated with hit counts that have reached the hit threshold across HPB sub-regions covering a logical-to-physical table. The controller transmits the hit table to a host device to be stored in an HPB cache on the host device and to be used by the host device for read commands sent from the host device to the storage device.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: SAVITA NEELANNAVAR, LAXMI BHOOPALI
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Publication number: 20250102728Abstract: System and methods for aligning optical elements to form adiabatic couplings are disclosed. An alignment device includes a common platform and a plurality of electrically-controlled mounts affixed to the common platform. Individual fibers of a first set of fibers that are to be aligned with a second set of fibers are coupled into respective ones of the plurality of electrically-controlled mounts. The platform as a whole is positioned in 3D space to align the first set of fibers with the second set of fibers, within a threshold level of alignment. Then, individual ones of the electrically-controlled mounts are adjusted to further align respective fibers of the first set of fibers with a corresponding fiber of the second set. In some embodiments, scattered light and/or signal strength are used as feedback measurements to guide the alignment process.Type: ApplicationFiled: July 27, 2023Publication date: March 27, 2025Applicant: LIGHTSYNQ TECHNOLOGIES INC.Inventors: Bartholomeus Johannes Machielse, Beibei Zeng, Chawina De-Eknamkul, Denis Sukachev, Daniel Riedel
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Patent number: 12262036Abstract: Image series transformation for optimal compressibility is performed with neural upsampling and error resilience. It incorporates a novel correlation network composed of convolutional layers for feature extraction and a channel-wise transformer with attention to capture complex inter-channel dependencies. The system includes an angle optimizer to further enhance the compressibility of an image and an error resilience subsystem to improve robustness against transmission errors and data loss. The convolutional layers extract multi-dimensional features from the image, while the channel-wise transformer learns global inter-channel relationships. The error resilience subsystem applies forward error correction coding, data partitioning based on importance, and embeds error concealment hints. This hybrid approach addresses both local and global features, mitigates compression artifacts, improves image quality, and enhances data integrity during transmission.Type: GrantFiled: October 14, 2024Date of Patent: March 25, 2025Assignee: ATOMBEAM TECHNOLOGIES INCInventor: Brian Galvin
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Patent number: 12262530Abstract: The present disclosure provides a semiconductor structure and a forming method thereof, including: providing a substrate and a plurality of discrete bit line structures, the bit line structures being located on the substrate, capacitor contact windows being provided between adjacent bit line structures; forming first isolation layers, the first isolation layers covering sidewalls of the bit line structures; forming a sacrificial layer, the sacrificial layer covering sidewalls of the first isolation layers; forming second isolation layers, the second isolation layers covering sidewalls of the sacrificial layer and exposing the top surfaces and bottoms of the sacrificial layer; etching the exposed bottoms of the sacrificial layer to form bottom gaps between the first isolation layers and the second isolation layers; etching the exposed top surfaces of the sacrificial layer to remove the remaining of the sacrificial layer so as to form gaps between the layers.Type: GrantFiled: November 3, 2021Date of Patent: March 25, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Shih-Hung Lee
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Patent number: 12259186Abstract: All of a cast-iron or cast-copper stave cooler's weight is supported inside a furnace containment shell by single gas-tight steel collar on the backside. All the coolant piping in each cooler has every external connection collected and routed together through the one steel collar. A wear protection barrier is disposed on the hot face. Such is limited to include at least one of horizontal rows of ribs and channels that retain metal inserts or refractory bricks, or pockets that assist in the retention of castable cement and/or accretions frozen in place from a melt, or an application of an area of hardfacing that is welded on in bead, crosshatch, or weave pattern.Type: GrantFiled: September 14, 2018Date of Patent: March 25, 2025Assignee: MACRAE TECHNOLOGIES, INC.Inventor: Allan J. MacRae
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Patent number: 12261631Abstract: A system and method for deep learning using a large codeword model with homomorphically compressed and dyadically encrypted data is disclosed. The system preprocesses input data, applies homomorphic-dyadic compression and encryption, tokenizes the compressed data into sourceblocks, and assigns codewords using a codebook. These codewords are processed through a machine learning core, which can be either a conventional transformer-based architecture or a latent transformer core utilizing a variational autoencoder. The system enables secure operations on encrypted data, preserving privacy while allowing complex computations. The processed output is decrypted, decompressed, and translated to match the input modality. A neural upsampler may further enhance the output. The machine learning core is continuously trained using the processed data and additional training data, improving performance over time.Type: GrantFiled: October 9, 2024Date of Patent: March 25, 2025Assignee: ATOMBEAM TECHNOLOGIES INCInventor: Brian Galvin
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Patent number: 12260899Abstract: Embodiments relate to a decoder driver circuit and a memory chip. The decoder driver circuit includes: a plurality of sub drive units configured to generate a main word line drive signal according to a power supply voltage signal, a first decoding input signal and an intermediate decoding output signal; and a plurality of decoding control circuits connected to the plurality of sub drive units, where the plurality of decoding control circuits are configured to generate the intermediate decoding output signal according to an enable control signal and a second decoding input signal. When the intermediate decoding output signal is in a first state, the main word line drive signal is in a non-drive state.Type: GrantFiled: January 17, 2023Date of Patent: March 25, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Weibing Shang, Xianjun Wu, Minghao Li
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Patent number: 12262531Abstract: Provided are a memory cell structure, a memory array structure, a semiconductor structure and a manufacturing method thereof. The memory cell structure includes: a substrate, an active region, a word line structure, an insulating dielectric layer, and a capacitor structure. The substrate has a bit line structure therein, and the active region is positioned on the bit line structure. In a direction perpendicular to the substrate, the active region includes a first connection terminal, a second connection terminal away from the first connection terminal, and a channel region positioned between the first connection terminal and the second connection terminal. In the direction perpendicular to the substrate, the word line structure covers a sidewall of the channel region. The insulating dielectric layer covers an outer side of the word line structure, an outer side of the first connection terminal, and an outer side of the second connection terminal.Type: GrantFiled: May 26, 2022Date of Patent: March 25, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Guangsu Shao
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Patent number: D1068902Type: GrantFiled: December 22, 2022Date of Patent: April 1, 2025Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Wen-Yo Lu, Oleksii Shekolian, Matthew J. England, James Siminoff, Yen-Chi Tsai