Abstract: A translinear f.sub.T multiplier has a pair of differential transistor amplifiers, each pair having commonly coupled emitters, with the base of one transistor of one pair being coupled to the base of one transistor of the other pair and the collectors of the pair being cross-coupled. A diode network provides three parallel diode paths from a reference voltage, two paths being coupled to receive an input signal and to the bases of the other transistors of each pair and the third path being coupled to a constant current source and to the bases of the first transistors of each pair. The resulting circuit configuration accommodates varying transition times.

Abstract: A fully differential CMOS peak detection circuit has a differential input stage and a negative feedback loop that form a differential unity gain feedback amplifier. The differential output of the differential input stage is applied to a differential peak detect circuit having a pair of series diode/capacitor combinations. The diode/capacitor junctions are applied to differential inputs of the negative feedback loop. A common mode correction circuit is coupled to the differential CMOS peak detection circuit to minimize differences between the common mode voltages of the differential input stage and the negative feedback loop. The differential peak voltage is held at the differential output of the differential input stage for sampling by a sampling circuit during a readback interval, and then tracks a differential input signal applied to the differential input of the differential input stage during a tracking interval.

Abstract: A mulltiformat television switcher adds an up-converter, a down-converter and an auxiliary selector to an existing master control switcher to provide the ability to provide both a standard format output video signal (NTSC, PAL, SECAM, etc.) and a HDTV format output video signal corresponding to a selected input video signal from a plurality of input video sources which include both standard and HDTV formats. The master control switcher provides a selected one of the standard format input video signals to a standard format input of the auxiliary selector and to the up-converter, and provides a control signal to the auxiliary selector. The HDTV format input video signals and the HDTV format video signal output from the up-converter are applied to HDTV inputs of the auxiliary selector.

Abstract: A CMOS-compatible peak detection circuit includes a differential amplifier stage (10), an active peak holding circuit (12), and a passive peak holding circuit (14). The differential amplifier stage (10) produces an amplifier output signal that is responsive to the difference between an input signal being monitored and feedback from the active peak holding circuit (12). Both the active peak holding circuit (12) and the passive peak holding circuit (14) store a charge representing a voltage level that is indicative of the peak amplitude of the amplifier output signal during a time interval, the time interval occurring while a disable signal is inactive. The active peak holding circuit (12) provides the maximum value signal as feedback to the differential amplifier stage (10). The passive peak holding circuit (14) provides a max signal output corresponding to the maximum value to a voltage follower stage (16) that makes it available as an output when a readback enable signal goes active.

Abstract: A stereoscopic imaging system (10) includes a display (14) and stereoscopic glasses (18) having right-and left-eye pieces (20 and 22). A photodetector (28) in the glasses receives electromagnetic radiation including IR pulses, having fast rise times, from a transmitter (26), and noise from ambient light and other electromagnetic radiation. An ambient light filter (34) filters out low frequency and low amplitude noise created by ambient light and other electromagnetic signals. The ambient light filter employs a high pass filter cancellation loop (42) that cancels low frequency components, a high frequency amplifier (50) that provides unity gain to low frequency components, and a high pass filter (C3 and R9). The ambient light filter also employs a threshold adjusting circuit (64) that temporarily adjusts the threshold voltage of a comparator (60) in response to reception of the IR pulses.

Abstract: An inverse scattering processing method with enhanced noise immunity and resolution capabilities for use in modeling multi-layer acoustic, electromagnetic or other propagating media. A time bounded filtering step is incorporated within a peeling method for use in processing TDR characteristic waveforms of the propagating media.

Abstract: A fast, CMOS-based peak detection cell circuit and related methods can be used to determine maximum and minimum excursions of a signal being monitored during the very short intervals between high speed sampling points. Two nodes, "a" and "b", of such a circuit are precharged. Node "a" is then connected to the signal to be monitored. A PMOS transistor, with node "a" on its gate and node "b" on its drain, then causes a capacitance at node "b" to discharge to the voltage level of node "a" plus a constant offset voltage. Node "b" thus tracks downward excursions of the signal to be monitored, but not upward ones. Therefore, the voltage level at node "b" at the end of the acquisition interval is a function of the lowest voltage level assumed by the signal. A trio of such minimum detection cell circuits can be used together to find minimum and maximum behaviors of a differential complementary pair of signals.

Abstract: A plasma addressing structure functioning as a display panel (52) includes an ionizable gas captured within a network (110) of intersecting channels formed by multiple spaced-apart islands (60) arranged in substantially parallel rows (62) projecting from the major surface (104) of an underlying substrate (64). The network of channels includes elongated channels (112) that are positioned between adjacent rows of islands, and spur channels (114) that extend between individual islands in each row and couple adjacent elongated channels. The gas in the network of channels is selectively ionized to address display elements (54), which are aligned with the islands positioned along each of the island rows. Each island has a top surface or plateau (128) that is spaced-apart from and substantially parallel to the major surface from which the island projects.

Abstract: An integrated oscillator includes an amplifier having first and second voltage inputs, and first and second current outputs, and a current mirror having an input coupled to the second current output of the amplifier and an output coupled to the first current output of the amplifier. The output of the current mirror and the first current output of the amplifier are coupled through a bonding pad to an external capacitor. A first comparator has a first input coupled to the first current output of the amplifier and a second input for receiving a first threshold voltage, and a second comparator has a first input coupled to the first current output of the amplifier and a second input for receiving a second threshold voltage. A flip-flop has a first input coupled to the output of the first comparator, a second input, and an output coupled to the second voltage input of the amplifier.

Abstract: Addressing apparatus that electronically address data sites of a digital array include electrodes (36, 38) manufactured with consistent electrical contact quality on the surfaces of projections (30) from a substrate (14). This is accomplished by providing such electrodes with portions that are offset to follow regions of more equal slope on the projections. The offset electrodes are of more consistent structural and electrical contact quality and thereby facilitate an increase in the yield of the manufacturing process.

Abstract: An RGB display of a transcoded serial digital video signal is produced by converting the serial digital video signal to a parallel digital video signal, separating the digital luminance component signal and the two digital difference component signals from the parallel digital video signal, converting the digital luminance and color difference component signals into analog encoded color component signals, transcoding the analog encoded color component signals into RGB component signals, and routing the RGB component signals to a waveform display device. The RGB component signals also are routed to a gamut detection circuit where each component is compared with nominal plus and minus limit levels to determine if there is a gamut error.

Abstract: An equipment test program, stored and processed in a computer system, defines device termination procedures used for terminating devices used in a plurality of sets for performing a plurality of tests. The termination procedure for each device is associated with an ensemble, or group data structure. Each ensemble contains a set of termination task data structures for implementing the device terminations. Each task represents a device that operates with other devices in a test program module. Each task is linked to zero or more predecessor tasks in the ensemble. This linking represents the need to turn off the predecessor tasks' devices first before turning off any task's device. Within each test module, and before any device in the group is instructed to operate, the ensemble optimization procedure is invoked to pass a pointer to the module's ensemble data structure. The ensemble optimization procedure is used to optimally decide which device termination procedures should be invoked.

Abstract: An all NPN transistor level-shifting differential amplifier has first and second identical amplifier halves, in which each amplifier half includes a passive voltage-shifting network coupled between a load and a current source. A main amplifier has a single-ended voltage input and an output coupled to the first node of the voltage shifting network. An output amplifier has a single-ended current output and an input coupled to the second node of the voltage shifting network. The main amplifier and output amplifiers are coupled together such that a portion of the bias and signal currents flowing through the output amplifier is reused and flows through the main amplifier, reducing bias current and power requirements. The first and second amplifier halves are coupled together with a gain-setting emitter resistor. In addition to reducing the power requirements of the amplifier, the feedback configuration of the level-shifting amplifier also increases linearity over prior art level-shifting amplifiers.

Abstract: A three-dimensional display for characterizing red, green and blue components of a video signal combines the three components to form two pairs of combination signals, one pair combining the green and blue components and the other pair combining the green and red components. The two pairs of combination signals are input alternately to the inputs of a vector display device to provide a symmetrical display about an axis of symmetry where one half characterizes the blue component, the other half characterizes the red component, and both halves characterize the green component. A diamond-shaped graticule is displayed for each half of the symmetrical display to define a color gamut region for the red, green and blue components.

Abstract: A thermal transfer printer (10) includes multiple media trays (16, 120, 126) each encoded to communicate to a printer controller (46) via sensors (132, 134, 136) a print medium size and type contained in the tray, and a pair of thermal transfer ribbon (24) sensors (44,45) to communicate whether the ribbon includes a pre-coat material panel (34). A printer driver responsive to the media size and type sensors and the thermal transfer ribbon sensors to causes pre-coat material to be applied to coated or plain paper print media but not to transparency print media. Post-rendering color correction is provided for color images printed on various media type and pre-coat combinations. The printer driver prevents an image from printing when potentially wasteful conditions are detected in response to a print job request, forced tray selection, or automatic tray switching selection.

Abstract: A cylindrical drum is rotatable about a drum axis for supporting a print medium during printing. A print head has a plurality of printing elements for printing image elements of a predetermined color at a predetermined image-element printing rate. The drum is rotated about the drum axis at a predetermined speed such that alternate image-element locations are addressed by each printing element during each rotation of the drum at the predetermined printing rate. The drum rotates two revolutions at each print-head location along the axis, and all image-element locations are addressed.

Abstract: A multi-channel analog-to-digital converter includes a counter (20) and a plurality of analog-to-digital conversion cells (10), each of which contain incremental discharge means (11-16) that store a charge proportional to the voltage value of an analog input signal and discharge that charge in increments upon the occurrence of the clock signal, also producing an active signal after the charge has been stored and before the incremental discharge is complete. A register (17) receives a count signal from the counter (20) and stores its value when the active signal goes inactive. A multiplexer (18) selects among the outputs of the plurality of analog-to-digital conversion cells (10) and supplies the selected output as a digital output signal.

Abstract: A bidirectional chopper transconductance amplifier for driving a motor winding provides a duty cycle signal as an input to an H bridge circuit that provides a voltage output across the motor winding. The amplifier also provides a direction input that determines the polarity of the voltage output across the motor winding. An RS flip-flop is set by the pulses of a cyclical chopper sync input signal and is reset as a function of the current in the motor winding and a command current input to produce the duty cycle signal. A first pair of flip-flops, one clocked by the trailing edges of the chopper sync input signal pulses and the other clocked by the trailing edges of the chopper sync input signal pulses delayed by a specified time, detects whether the RS flip-flop is reset prior to pulse trailing edge of the current cycle and prior to the specified time of the prior cycle.