Abstract: A cathode drive circuit couples a video drive signal from a cathode output amplifier to the cathode of a cathode ray tube along a first matched transmission line. Any signal energy not absorbed by the cathode is coupled along a second matched transmission line to a power dissipating load. The use of matched transmission lines avoids reflections in the system and eliminates attendant signal degradation. The power dissipating load can be located at any distance remote from both the cathode output amplifier and the cathode so as to minimize heat dissipation problems.

Abstract: The distribution with respect to time of an event defined by the waveform of a repetitive input signal having a magnitude that lies within a predetermined range of values is observed by generating a sample signal at least once during each repetition of the input signal, generating an n-bit digital timing signal representative of the time of occurrence of a sample signal relative to the time of occurrence of the trigger signal, and sampling the repetitive input signal and generating a memory enable signal in the event that the magnitude of the input signal at the time of sampling falls within the predetermined range of values. The memory locations of a memory having 2.sup.n separately addressable memory locations are allocated respectively to the 2.sup.

Abstract: An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

Abstract: An injector/ejector mechanism for urging a circuit board plug-in module into and out of a card cage mainframe has a bearing member for transferring rotational pressure from a handle to the mainframe for seating and unseating the plug-in in the mainframe. The handle is extendable to provide additional mechanical advantage at the bearing end of the mechanism.

Abstract: An M-element waveform data sequence representative of an analog input signal during a period of interest is produced by first amplifying the input signal with a linear amplifier and periodically digitizing the amplifier output signal to produce a first data sequence having M+N-1 elements. The first N-1 elements of the first data sequence represent magnitudes of the amplifier output signal preceding the period of interest, and the remaining M elements of the first data sequence represent magnitudes of the amplifier output signal during the period of interest. The first data sequence is applied as input to a digital filter which produces an output second data sequence wherein each element of the second data sequence corresponds to an element of the first data sequence and is a linear combination of its corresponding first data sequence element and N-1 data preceding data elements of the first data sequence.

Abstract: A state element having a pair of parallel-connected, inversely-enabled latches forms the basic state-machine building block. A flip-latch is formed by combining this basic element with a multiplexer for selectively outputting alternate outputs of the latches. A litch-latch is formed by using the basic element alone with the two inputs fed from one of a pair of identical logic elements and feeding back the output from each latch to the logic element from which the input is not received. Other outputs of the logic elements are input into a multiplexer for alternately selecting the outputs from the respective logic elements to be the state machine output. These state elements function similarly to a flip-flop but generally produce less propagation delay and require a lower clocking signal frequency for a given state frequency.

Abstract: A sample and hold circuit made entirely of NPN transistors, capacitors and resistors uses double emitter-follower transistors for gating an input signal onto a charging capacitor. A transistor connected in parallel to the first of the emitter-follower transistors is controlled to conduct blow-by current away from the second emitter-follower transistor in the hold state. A step voltage is applied to the charge capacitor in the hold state to prevent turn on of the emitter-follower transistors. The circuit is configured with complementary components so that a differential output signal eliminating the step voltage is provided.

Abstract: Methods and circuits for implementing them determine the phase angle of a complex electrical signal from the in-phase and quadrature components of the signal by truncating the magnitudes of the real and imaginary components of the signal and combining them to form an address which is then used to access a lookup table containing angular values. However, if both of the values are small, before they are truncated they are both expressed in terms of a lowest common exponent, i.e., shifted left as much as possible without affecting their ratio. The phase angle from -180 to +180 degrees may be found directly from the lookup table, or, in an alternative variation on the method, a single-quadrant angle is looked up in a shorter table and then supplemented according to quadrant information contained in the signs of the values to produce the total phase angle. Circuits are disclosed for implementing both methods for inputs in 2's complement or sign and magnitude form.

Abstract: A ferroelectric liquid crystal matrix display drive waveform scheme and circuit are disclosed which produce a resultant waveform at each pixel defined by the intersections of row and column electrodes that varies among three levels during each strobe interval. In a matrix of N rows and M columns, the rows are serially strobed with a strobe waveform that varies through three levels to provide select and non-select strobe signals. During each strobe interval, the column driver circuitry generates three-level and three-phase, time-variant drive waveforms. The circuit can provide up (write) and down (erase) pulses selectively to each pixel of the display using standard twisted-nematic type liquid crystal display drivers. A complex waveform generator provides three-level, three-phase control signals to the supply voltage inputs of the drivers.

Abstract: An apparatus and method of using markers for identifying particular points on a quasi-3-dimensional display, such as a color spectrogram display or a waterfall display of multiple frequency spectra on an electronic spectrum analyzer, so that amplitude, time, and frequency values associated with a particular point can be conveniently read out, and so that differences in amplitude, time, and frequency between two points can be easily calculated and presented to the user. Two markers whose positions are ascertainable are generated on the quasi-3-dimensional display and are made subject to operator control. One of these markers is positioned by the operator on a particular point of interest and the values associated with that location are then displayed for readout with greater precision and convenience than would otherwise be possible. A second marker is placed at a second point of interest and the differences in the values of amplitude, time, and frequency between the two points are calculated and displayed.

Abstract: A block diagram editor system and method is implemented in a computer workstation that includes a Cathode Ray Tube (CRT) and a mouse, graphics and windowing software, and an external communications interface for test instruments. The computer is programmed for constructing, interconnecting and displaying block diagrams of functional elements on the CRT. From prestored routines for each functional element, the software assembles and executes a program that emulates the functional operations of each element and transfers data from output from each element in turn to an input of a succeeding block, as determined by the block diagram configuration. The block functions include signal generating and analysis functions, and functions for control of various types of test instruments, which can be interactively controlled through the CRT and mouse. The computer converts desired outputs of the instruments into control settings and receives, analyzes and displays data from the instruments.

Abstract: An optical waveguide photocathode for converting optical signals to electrical signals has an optical waveguide, a semiconductor covering the end of the optical waveguide, a first transparent electrode disposed between the end of the waveguide and the semiconductor, and a second electrode disposed adjacent to and spaced from the semiconductor. An electric potential is applied between the first electrode and the second electrode. The waveguide, first conductor, and semiconductor are relatively pointed at the end to produce high electric field strength at the semiconductor thereby enabling semiconductors with high work functions to be used. The relatively small area of the semiconductor illuminated by the waveguide reduces the dark current, making the device more sensitive to low level signals. The device may be used in a streak tube or a photomultiplier.

Abstract: A delay time between the start of a trace on an oscilloscope screen and a point along the trace is computed based on measured "sweep gain" and "sweep start" parameters characterizing a triggered sweep signal controlling the horizontal position of an electron beam creating the trace, the sweep signal increasing when triggered from a starting level at a constant slew rate to move the beam at a constant speed across the screen. The sweep start parameter is the value of input data applied to a digital-to-analog converter (DAC) which would cause the DAC to produce an output voltage equal to the sweep signal starting level, and the sweep gain indicates the rate of increase in DAC input data required to produce a DAC output signal with a rate of increase similar to the slew rate of the sweep signal. The horizontal position of the point along the trace is the beam position on the screen at the moment the sweep signal magnitude reaches the magnitude of the DAC output signal.

Abstract: A high-speed electrical circuit (10) provides an output signal that is a delayed version of a digital input signal. The circuit includes two subcircuits (20 and 22) which receive the input signal and whose outputs (52 and 56) are summed together. The subcircuits provide two different paths for the digital input signal to travel, one path providing a long time delay and the other path providing a short time delay. Each of the subcircuits comprises a pair of emitter-coupled transistors (24 and 26; 28 and 30). The subcircuit providing the long delay time includes transistors which have large areas and collector resistors that promote relatively slow transistor switching response time. The subcircuit providing the short delay time is optimized for high speed operation.

Abstract: An apparatus for and a method of addressing data storage locations (80) employs an electron beam (76) to address such storage locations and thereby store data in and read data out of them. The storage locations are defined by the overlapping areas of multiple column electrodes (62) extending in a common direction on a first substrate (82) and rows (120) addressed by an electron beam (76) and extending in a common direction on a second substrate (54). A layer of dielectric material (52) separates the first and the second substrates, which are positioned face-to-face and spaced-apart with the direction of the addressed rows transverse to that of the column electrodes. The column electrodes receive data drive signals. The addressing apparatus is configured so that for each storage location secondary electrons emitted by the electron beam striking the location function as an electrical switch that changes between a conducting state and a nonconducting state in response to the presence of the electron beam.

Abstract: An integrated support structure provides for improved mounting of components such as circuit boards, disk drives, power supplies, and the like. The structure includes an upper frame and a lower frame hinged together and having cooperative elements for capturing components therebetween as the upper frame and lower frame are brought adjacent to one another in parallel relation. A sliding guide and bridge beam clip secure a disk drive to the structure while a hook and spring latch mount a power supply. The frames are suitably formed by structural foam injection molding and the components are secured to the structure without the need for screws. The entire assembly may be inserted in a shell or case for protection thereof. The overall configuration allows rapid assembly for production and rapid disassembly for service.

Abstract: A dual function peak metering circuit provides both monitoring and measuring functions for a composite signal having both modulated and unmodulated components. A full-wave rectified version of the composite signal is input to an envelope detector that drives a peak weighting circuit and a variable limiter. The output of the peak weighting circuit controls a threshold level for the variable limiter. The peaks of the signal at the output of the variable limiter are detected with an instantaneous peak-hold circuit that is periodically sampled and reset under microprocessor control. The microprocessor then displays the sampled value both graphically and numerically.

Abstract: A base drive compensation circuit for a power amplifier samples a fixed saturation voltage level on the output of a power transistor and couples the sampled output to an inverting input of an error amplifier having a sawtooth signal on its non-inverting input. The output of the error amplifier is a negative going signal whose duty cycle is established by the voltage level on the inverting input. The negative going signal is coupled to a switching power supply that develops a voltage which controls the base drive current to the power transistor.

Abstract: A double display mode for differential gain provides the capability of accurately determining the differential gain of a video system in response to a video test signal without using graticules on a display device. A detected chrominance peak level signal is displayed as a positive and a negative trace on the display device. An offset signal is added to the detected chrominance peak level signal to obtain an overlay on the display device of a first selected point of the traces, and then the offset signal is varied to obtain an overlay on the display device of a second selected point of the traces. The difference in values of the offset signal between the two selected points are used to determine the differential gain of the video system.

Abstract: A method and apparatus for minimizing the self heating distortion of a compensated differential transconductance amplifier having an error voltage generator is provided. In a preferred embodiment, the bases of a first pair of transistors are coupled together and to an adjustment voltage source. The bases of a second pair of transistors are coupled together and to a reference voltage source. The collectors of the transistor pairs are coupled together to form a differential current output. The output currents of the compensated amplifier are segregated into two currents, one originating in the error voltage generator, a second current being the remainder. The first current is directed to flow through the first pair of transistors, the second current is directed to flow through the second pair of transistors.