Patents Assigned to Tektronix, Inc.
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Publication number: 20220034967Abstract: A calibrated test and measurement cable for connecting one or more devices under test and a test and measurement instrument, including a first port structured to electrically connect to a first signal lane, a second port structured to electrically connect to a second signal lane, a third port structured to electrically connect to a test and measurement instrument, and a multiplexer configured to switch between electrically connecting the first port to the third port and connected the second port to the third port. The first and second signal lanes can be included on the same device under test or different devices under test. An input can receive instructions to operate the multiplexer.Type: ApplicationFiled: July 14, 2021Publication date: February 3, 2022Applicant: Tektronix, Inc.Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen, Shane A. Hazzard
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Patent number: 11237204Abstract: A test and measurement device having a signal source, including an impairment generator configured to output an impairment and a waveform synthesizer. The waveform synthesizer receives an input digital signal to be synthesized, receives the impairment, and synthesizes a synthesized digital signal based on the input digital signal and the impairment. The test and measurement instrument also includes a fixed sample rate digital-to-analog converter configured to receive a clock signal and the synthesized digital signal and output an analog signal.Type: GrantFiled: August 12, 2019Date of Patent: February 1, 2022Assignee: Tektronix, Inc.Inventors: Gregory A. Martin, Patrick Satarzadeh, Karen Hovakimyan, Hungming Chang
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Patent number: 11237190Abstract: A test and measurement instrument, including a memory configured to store a waveform data record; one or more processors, and a display. The one or more processors are configured to receive the waveform data record, determine a measurement value and location for a plurality of occurrences of a measurement event in the waveform data record, detect one or more logical path segments in the plurality of occurrences, and generating a visual representation of each measurement value and overlaying each of the visual representations of each measurement value. The visual representations of each measurement value and/or the one or more logical path segments may be displayed on the display.Type: GrantFiled: January 6, 2020Date of Patent: February 1, 2022Assignee: Tektronix, Inc.Inventors: Keith D. Rule, Sean T. Marty
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Publication number: 20220026483Abstract: A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.Type: ApplicationFiled: July 8, 2021Publication date: January 27, 2022Applicant: Tektronix, Inc.Inventor: David Everett Burgess
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Patent number: 11231444Abstract: A test and measurement instrument, comprising a display and one or more processors configured to display a waveform viewing area, receive a selection of a viewing mode. When an overlay viewing mode is selected, display two or more waveforms overlaid in a single graticule in the waveform viewing area, and when a stacked viewing mode is selected, display a first waveform in a first slice having a first graticule in the waveform viewing area and display a second waveform in a second slice having a second graticule below the first slice in the waveform viewing area.Type: GrantFiled: June 4, 2019Date of Patent: January 25, 2022Assignee: Tektronix, Inc.Inventors: Gary J. Waldo, Stephen LaFrance
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Publication number: 20220018896Abstract: A new test system includes a programmed device having an input port for receiving a signal for testing or measuring on the programmed device, and a reprogrammable test accessory having an output coupled to the input port of the programmed device. The reprogrammable test accessory further includes a test port structured to accept one or more test signals from a Device Under Test (DUT), and a reprogrammable processor. The reprogrammable processor may further include reprogrammable standards and protocols, reprogrammable triggers and margin detection, reprogrammable link training, reprogrammable handshaking, and reprogrammable setup and control facilities for either or both of the DUT and the programmed device.Type: ApplicationFiled: July 19, 2021Publication date: January 20, 2022Applicant: Tektronix, Inc.Inventors: Charles W. Case, Daniel G. Knierim, Joshua J. O'Brien, Josiah A. Bartlett, Julie A. Campbell
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Publication number: 20220012397Abstract: A method comprising categorizing nodes of a fabricated circuit as being priority nodes and nodes as being inferior nodes; evaluating a first priority node by automatically designating for verification the first priority node, and ascertaining whether a measured signal from the first priority node meets a pass-fail criterion for the first priority node; evaluating, when the measured signal from the first priority node meets the pass-fail criterion, a second priority node by automatically designating for verification the second priority node, and ascertaining whether a measured signal from the second priority node meets a pass-fail criterion for the second priority node; and evaluating, when the measured signal from the first priority node does not meet the pass-fail criterion, a first inferior node, by automatically designating for verification the first inferior node, and ascertaining whether a measured signal from the first inferior node meets a pass-fail criterion for the first inferior node.Type: ApplicationFiled: July 8, 2021Publication date: January 13, 2022Applicant: Tektronix, Inc.Inventor: David Everett Burgess
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Publication number: 20220012394Abstract: A system for verifying signals in electronic circuits that includes a waveform translator and a test-and-measurement instrument. The waveform translator is configured to receive a simulated waveform for a node of a simulated prototype circuit and to translate the simulated waveform into a translated waveform. The test-and-measurement instrument is configured to obtain a measured waveform and to determine a deviation of the measured waveform from the simulated waveform using the translated waveform.Type: ApplicationFiled: July 8, 2021Publication date: January 13, 2022Applicant: Tektronix, Inc.Inventor: David Everett Burgess
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Publication number: 20220011361Abstract: A method of securing a probe tip to a device under test (DUT), the method comprising: positioning the probe tip near a test point of the DUT, the probe tip comprising a connection point on a signal-path portion of the probe tip and an attachment tab, the connection point making an electrical connection with the test point of the DUT, the attachment tab extending away from the signal-path portion of the probe tip; applying an adhesive to the DUT through a hole in the attachment tab of the probe tip; and curing the adhesive to secure the probe tip to the DUT.Type: ApplicationFiled: June 4, 2021Publication date: January 13, 2022Applicant: Tektronix, Inc.Inventor: Julie A. Campbell
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Publication number: 20210405108Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link with a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.Type: ApplicationFiled: September 9, 2021Publication date: December 30, 2021Applicant: Tektronix, Inc.Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
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Publication number: 20210406144Abstract: A test and measurement system for analyzing a device under test, including a database configured to store test results related to tests performed with one or more prior devices under test, a receiver to receive new test results about a new device under test, a data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.Type: ApplicationFiled: June 25, 2021Publication date: December 30, 2021Applicant: Tektronix, Inc.Inventors: Sam J. Strickling, Daniel S. Froelich, Michelle L. Baldwin, Jonathan San, Lin-Yung Chen
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Publication number: 20210389349Abstract: A test and measurement instrument includes an input to receive a non-return-to-zero (NRZ) waveform signal from a device under test, a ramp generator to use the NRZ waveform signal to generate a ramp sweep signal, a gate to gate the ramp sweep signal and the NRZ waveform signal to produce gated X-axis and Y-axis data, and a display to display the gated X-axis and Y-axis data as a cyclic loop image. A method of generating a cyclic loop image includes receiving an input waveform, using the input waveform to generate a ramp sweep signal, gating the ramp sweep signal and the input waveform to produce gated X-axis and Y-axis data, and displaying the gated X-axis and Y-axis data as a cyclic loop image.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: Tektronix, Inc.Inventor: John J. Pickerd
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Publication number: 20210390456Abstract: A system to classify signals includes an input to receive incoming waveform data; a memory, and one or more processors configured to execute code to cause the one or more processors to: generate a ramp sweep signal from the incoming waveform data, locate a data burst in the incoming waveform data using a burst detector, receive a signal from the burst detector to cause the memory to store cyclic loop image data in the form of the incoming waveform data as y-axis data and the ramp sweep signal as x-axis data, and employ a machine learning system to receive the cyclic loop image data and classify the data burst. A method of classifying signals includes generating a ramp sweep signal from incoming waveform data, locating a data burst in the incoming waveform data, storing cyclic loop image data for the data burst in the form of the incoming waveform data as Y-axis data and the ramp sweep signal as X-axis data, and using a machine learning system to receive the cyclic loop image and classify the data burst.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: Tektronix, Inc.Inventors: John J. Pickerd, Saifee F. Jasdanwala
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Publication number: 20210389373Abstract: A system includes an input to receive a digital waveform signal, a memory, and one or more processors configured to execute code to cause the one or more processors to: generate a horizontal ramp sweep signal based on the digital waveform signal; receive a selection input to identify a segment of the digital waveform signal; gate the horizontal ramp sweep signal and the digital waveform signal based on the selection input to produce cyclic loop image data for the segment of the digital waveform; store the cyclic loop image data in the memory; and provide the cyclic loop image data as one or more inputs into a machine learning system.Type: ApplicationFiled: June 11, 2021Publication date: December 16, 2021Applicant: Tektronix, Inc.Inventors: John J. Pickerd, Fabricio Flores
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Patent number: 11187720Abstract: A test and measurement system can include a data store configured to store augmentation settings for dynamically augmenting a physical testing environment and a computing device coupled to the data store. The computing device can be configured to receive an input feed from the physical testing environment, create an augmentation image based on the augmentation settings and the input feed, and output the augmented image to be overlaid on the physical testing environment to augment a user's view of the physical testing environment.Type: GrantFiled: June 18, 2018Date of Patent: November 30, 2021Assignee: Tektronix, Inc.Inventors: Tyler B. Niles, Daniel G. Knierim, Michael J. Wadzita, Joshua J. O'Brien, David Everett Burgess
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Patent number: 11188493Abstract: A test and measurement instrument including a digital down converter configured to receive a bus signal and output in-phase and quadrature-phase baseband component waveform data, a trace generator configured to receive the in-phase and quadrature-phase baseband component waveform data and generate at least one radio frequency versus time trace, a decoder configured to receive the at least one radio frequency versus time trace and decode the bus signal based on the at least one radio frequency versus time trace and a wireless modulation scheme, and a trigger configured to capture at least a portion of the bus signal based on the decoded bus signal.Type: GrantFiled: January 3, 2020Date of Patent: November 30, 2021Assignee: Tektronix, Inc.Inventors: James D. Alley, Gary J. Waldo
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Patent number: 11181552Abstract: A method of classifying waveform data includes receiving input waveform data at a test and measurement system, accessing a repository of reference waveform data and corresponding classes, analyzing the input waveform data and the reference waveform data to designate a class of the input waveform data, and using the class designation to provide information to a user. A test and measurement system has a user interface, at least one input port, a communications port, a processor, the processor configured to execute instructions causing the processor to: receive input waveform data through at least one of the input port or the user interface; access a repository of reference waveform data; analyze the input waveform data using the reference waveform data; designate a class of the input waveform data; and use the class to provide information to the user about the input waveform.Type: GrantFiled: November 26, 2019Date of Patent: November 23, 2021Assignee: Tektronix, Inc.Inventors: Joshua J. O'Brien, Brian S. Mantel
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Patent number: 11181553Abstract: An oscilloscope including an input port for receiving training data including waveforms and corresponding known classifications and a processor for training a plurality of classifiers on the training data. Training includes iteratively applying each classifier to each waveform of the training data to obtain corresponding predicted waveform classifications and comparing the predicted waveform classifications with the known classifications. Classifiers are corrected when predicted waveform classifications does not match the known classifications. Models for each classification are constructed with suggested measurements or actions. Subsequently, live waveform data is captured by the oscilloscope and the classifiers are applied to the live data. When a confidence value for a single classification exceeds a threshold, the waveform data is classified, and suggested measurements or actions are implemented in the oscilloscope based on the classification.Type: GrantFiled: March 6, 2020Date of Patent: November 23, 2021Assignee: TEKTRONIX, INC.Inventors: Ian R. Absher, Kraig M. Strong
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Patent number: 11181581Abstract: The disclosed technology relates to a method and apparatus for graphically displaying a switching cycle of a switching device. A switching voltage and a switching current are acquired for a device under test via a voltage probe and a current probe, respectively, for a plurality of switching cycles of the device under test. The switching current versus the switching voltage is plotted on a current versus voltage plot as a curve for each of the switching cycles. Each of the curves on the current versus voltage plot overlap each other and are displayed to a user.Type: GrantFiled: April 21, 2014Date of Patent: November 23, 2021Assignee: TEKTRONIX, INC.Inventors: Krishna N H Sri, Gajendra Kumar Patro, Abhinav Bal, Gurushiddappa M N
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Publication number: 20210358685Abstract: A test and measurement instrument for determining magnetic core losses of a device under test during in circuit operation. The test and measurement instrument receives a primary current signal from a primary winding of a device under test and receives a primary voltage signal measured across a magnetic core of the device under test. Based on the primary electric current signal and the primary voltage signal, the test and measurement instrument determines a magnetic loss of the device under test. In some examples, the test and measurement instrument can use primary and secondary voltage and current inputs to determine the magnetic loss of the device under test. The magnetic loss of the device under test can be displayed on a display of the test and measurement instrument. The magnetic loss can include a total magnetic loss, a hysteresis loss, a copper loss, and/or other losses.Type: ApplicationFiled: May 7, 2021Publication date: November 18, 2021Applicant: Tektronix, Inc.Inventors: Shubha B, Niranjan R Hegde, Yogesh M Pai, Gajendra Kumar Patro, Krishna N H Sri