Patents Assigned to TSMC Solid State Lighting Ltd.
  • Patent number: 8653542
    Abstract: The present disclosure provides a method of fabricating a light emitting diode (LED) package. The method includes bonding a plurality of separated light emitting diode (LED) dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer; depositing an isolation layer over the plurality of separated LED dies and the substrate; etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate; forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and dicing the plurality of separated LED dies and the substrate into a plurality of LED packages.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: February 18, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu
  • Patent number: 8647900
    Abstract: An optical emitter includes micro-structure phosphor coating on a light-emitting diode die mounted on a package substrate. The micro-structures are transferred onto a micro-structure phosphor coating precursor by patterning and curing the precursor or by curing the precursor through a mold. The micro-structures are half spheroids, three-sided pyramids, or six-sided pyramids.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: February 11, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chi Xiang Tseng, Hsiao-Wen Lee
  • Publication number: 20140021483
    Abstract: A seed layer for growing a group 111-V semiconductor structure 1s embedded in a dielectric material on a carrier substrate. After the group 111-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group 111-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure.
    Type: Application
    Filed: September 27, 2013
    Publication date: January 23, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Jung-Tang Chu, Ching-Hua Chiu, Hung-Wen Huang, Yea-Chen Lee, Hsing-Kuo Hsia
  • Patent number: 8628984
    Abstract: A package system includes a substrate having at least one first thermally conductive structure through the substrate. At least one second thermally conductive structure is disposed over the at least one first thermally conductive structure. At least one light-emitting diode (LED) is disposed over the at least one second thermally conductive structure.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: January 14, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventor: Chung Yu Wang
  • Patent number: 8624505
    Abstract: An integrated photonic device includes a number of LEDs and a feedback mechanism that measures individual LED light outputs using a photo sensor via a light transmitter disposed in the vicinity of individual LEDs. A controller or driver adjusts a current driven to each LED using the detected values according to various logic based on the device application.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: January 7, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventor: Hsin-Chieh Huang
  • Patent number: 8618564
    Abstract: The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: December 31, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Jung-Tang Chu, Hsing-Kuo Hsia, Ching-Hua Chiu
  • Patent number: 8610161
    Abstract: An optical emitter includes a Light-Emitting Diode (LED) on a package wafer, transparent insulators, and one or more transparent electrical connectors between the LED die and one or more contact pads on the packaging wafer. The transparent insulators are deposited on the package wafer with LED dies attached using a lithography or a screen printing method. The transparent electrical connectors are deposited using physical vapor deposition, chemical vapor deposition, spin coating, spray coating, or screen printing and may be patterned using a lithography process and etching.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: December 17, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Yung-Chang Chen, Hsin-Hsien Wu, Ming Shing Lee, Huai-En Lai, Fu-Wen Liu, Andy Wu
  • Patent number: 8609446
    Abstract: A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: December 17, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chyi Shyuan Chern, Hsin-Hsien Wu, Chih-Kuang Yu, Hung-Yi Kuo
  • Patent number: 8604498
    Abstract: A photonic device generates light from a full spectrum of lights including white light. The device includes two or more LEDs grown on a substrate, each generating light of a different wavelength and separately controlled. A light-emitting structure is formed on the substrate and apportioned into the two or more LEDs by etching to separate the light-emitting structure into different portions. At least one of the LEDs is coated with a phosphor material so that different wavelengths of light are generated by the LEDs while the same wavelength of light is emitted from the light-emitting structure.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: December 10, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsin-Chieh Huang, Chao-Hsiung Wang
  • Patent number: 8604491
    Abstract: A vertical Light Emitting Diode (LED) device includes an epi structure with a first-type-doped portion, a second-type-doped portion, and a quantum well structure between the first-type-doped and second-type-doped portions and a carrier structure with a plurality of conductive contact pads in electrical contact with the epi structure and a plurality of bonding pads on a side of the carrier structure distal the epi structure, in which the conductive contact pads are in electrical communication with the bonding pads using at least one of vias and a Redistribution Layer (RDL). The vertical LED device further includes a first insulating film on a side of the carrier structure proximal the epi structure and a second insulating film on a side of the carrier structure distal the epi structure.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: December 10, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Hung-Yi Kuo
  • Patent number: 8598617
    Abstract: An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: December 3, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern, Hsing-Kuo Hsia, Hung-Yi Kuo
  • Patent number: 8591251
    Abstract: The present disclosure relates to methods for fabricating electrical connectors of a waterproof connector-heat sink assembly of a LED light bar module using injection molding. The methods include matching the coefficient of thermal expansion (CTE) of injection molding materials for the connectors and heat sinks. A heat sink and conductor pins are inserted into an injection mold and the injection molding materials are injected into the injection mold. An integrated connector-heat sink assembly is formed when the injection molding materials of the connectors form a waterproof seal with the heat sink when the injection molding materials solidify. Placement of the heat sink and conductor pins inside the injection mold is controlled to ensure that adhesive bonding between the injection molding materials and the heat sink is stronger than a maximum shear force.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: November 26, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsiao-Wen Lee, Chih-Hsuan Sun, Wei-Yu Yeh
  • Patent number: 8592242
    Abstract: The present disclosure relates to methods for fabricating LEDs by patterning and etching an n-doped epitaxial layer to form regions of roughened surface of the n-doped layer and mesa structures adjacent to the roughened surface regions before depositing an active layer and the rest of the epitaxial layers on the mesa structures. The method includes growing epitaxial layers of an LED including an un-doped layer and an n-doped layer on a wafer of growth substrate. The method also includes patterning the n-doped layer to form a first region of the n-doped layer and a mesa region of the n-doped layer adjacent to the first region. The method further includes etching the first region of the n-doped layer to create a roughened surface. The method further includes growing additional epitaxial layers of the LED including an active layer and a p-doped layer on the mesa region of the n-doped layer.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: November 26, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hung-Wen Huang, Hsing-Kuo Hsia, Ching-Hua Chiu
  • Patent number: 8587018
    Abstract: A light emitting diode (LED) structure comprises a first dopant region, a dielectric layer on top of the first dopant region, a bond pad layer on top of a first portion the dielectric layer, and an LED layer having a first LED region and a second LED region. The bond pad layer is electrically connected to the first dopant region. The first LED region is electrically connected to the bond pad layer.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: November 19, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Shouli Steve Hsia, Chih-Kuang Yu, Ken Wen-Chien Fu, Hung-Yi Kuo, Hung-Chao Kao, Ming-Feng Wu, Fu-Chih Yang
  • Patent number: 8563334
    Abstract: A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: October 22, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hung-Wen Huang, Hsing-Kuo Hsia, Ching-Hua Chiu
  • Patent number: 8552460
    Abstract: A high-brightness LED module includes a substrate with a recess in which a light emitting element is mounted. The recess is defined by a sidewalls and a relatively thin membrane. At least two micro-vias are provided in the membrane and include conductive material that passes through the membrane. A p-contact of the light emitting element is coupled to a first micro-via and an n-contact of the light emitting element is coupled to a second micro-via.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: October 8, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Thomas Murphy, Andreas Hase, Matthias Heschel
  • Publication number: 20130260484
    Abstract: The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters.
    Type: Application
    Filed: March 27, 2012
    Publication date: October 3, 2013
    Applicant: TSMC Solid State Lighting, Ltd.
    Inventors: Chyi-Shyuan Chern, Hsin-Hsien Wu, Yung-Hsin Yang, Ching-Hua Chiu
  • Patent number: 8546176
    Abstract: Sulfur-containing chalcogenide absorbers in thin film solar cell are manufactured by sequential sputtering or co-sputtering targets, one of which contains a sulfur compound, onto a substrate and then annealing the substrate. The anneal is performed in a non-sulfur containing environment and avoids the use of hazardous hydrogen sulfide gas. A sulfurized chalcogenide is formed having a sulfur concentration gradient.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: October 1, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Wen-Chin Lee, Wen-Tsai Yen, Ding-Yuan Chen, Liang-Sheng Yu, Yu-Han Chang
  • Patent number: 8546165
    Abstract: A seed layer for growing a group III-V semiconductor structure is embedded in a dielectric material on a carrier substrate. After the group III-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group III-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: October 1, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Jung-Tang Chu, Ching-Hua Chiu, Hung-Wen Huang, Yea-Chen Lee, Hsing-Kuo Hsia
  • Publication number: 20130240831
    Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: TSMC Solid State Lighting, Ltd.
    Inventors: Ming-Hua Lo, Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo