Abstract: For data transmission via a data bus in the form of a single-wire bus, to which several stations are connected in parallel, data bits are transmitted singly in a periodic sequence of signals, whereby each period has at least one section in which the transmitted signal indicates the occupancy of the data bus, a further section in which the transmitted signal indicates the value of the data bit, and a section without data, preferably with high potential in the case of an electric data bus, to which the data generated by the individual stations is linked by an OR function. The durations of the individual sections have fixed periods with respect to one another, and from the signal transfer at the beginning of every two successive periods the duration of the period in each station is determined and from the the position of the individual sections is determined in which the signal is sampled on the data bus and the value of the transmitted data bit is determined.

Abstract: A method is provided for determining the end face position of an optical waveguide in a coordinate direction extending in the axial direction of the optical waveguide (1, 2) by means of a video camera via a processor. The method is simplified by means of the following steps: successive intensity values of the video signal are detected and stored by the holding unit (10) which intensity values are taken along a slit in a direction (y) which is perpendicular to the line direction (x) at the area of a coordinate position (x.sub.s); the processor converts the stored intensity values (I.sub.s) into a slit mean (averaged) intensity signal I.sub.m (x) and stores this signal; subsequently further slit signals (I.sub.s) are similarly formed and stored thereby covering an area overlying the end face of the optical waveguide (1, 2); and the position coordinates (x.sub.E1, x.sub.E2) of the end face of the optical waveguides (1, 2) is determined from the variation I.sub.m (x).

Abstract: In an object holder which is intended for use in a charged particle beam system and which comprises a heating element there is provided an object carrier which cooperates with the heating element and which comprises an electrically insulating member having a supporting face and an aperture which reaches as far as the supporting face and which serves for the transmission of a charged particle beam, at least two current-conductive portions being connected to said insulating member, said contact portions contacting the object when the object is arranged on the supporting face. An object carrier of this kind enables electromigration studies in the object at high temperatures by application of a current through the object via the contact portions.

Abstract: A method of producing glass bodies having regions with different optical refraction, including a basic body and a coating layer which is sintered onto the basic body, covers the basic body at least partially and is made of glass, which as it is doped, has an index of refraction differing from that of the glass of the basic body. The starting material for producing the cladding on the basis of pulverulent ceramic material is deformed into a self-supporting, unsintered porous green body, is dried and submitted to a cleaning procedure in a heated gas phase. The coating layer to be bonded onto the basic body is melted into glass in a subsequent combined doping/sintering procedure in a gas phase containing the doping agent at a temperature in the range from 1150.degree. to 1500.degree. C. and is sintered onto the basic body.

Abstract: Dynamic accurate current divider which comprises current memory circuits (M2-C1-S3, M3-C2-S4) by means of which an input current (Iin) to be split up is divided into two almost equally large output currents (Iout1, Iout2). Under the control of a clock generator (9) having two-phase switching cycles, any inequalities in the output currents are equalized by means of the current memory circuits in a number of cycles of the clock generator.

Abstract: The invention relates to an integrated circuit including a vertical transistor having an emitter having at least one zone (12), a base (2) having a base contacting region (15) adjoining a major surface of the integrated circuit, and a collector (5). The base is less than or equal to the diffusion length of the minority charge carries in these regions. The ratio between the surface S.sub.x of a base contacting region (15) and the surface S.sub.M of a base contact window region is at least equal to 10, and when the base contacting region (15) has a surface smaller than 5 times that of the emitter region. The transistor exhibits improved inverse current amplification.

Abstract: An integrated circuit having logic circuits and a logic output buffer, which circuit includes the following sub-circuits: a memory circuit and a logic output circuit, in which no tri-state occurs at the output during a sequence of data signals at the input, wherein the drive of the circuit by means of control signals is not critical over time because the first data signal from the sequence switches off the tri-state mode, the tri-state mode again being introduced if a control signal is furnished, and in the absence of this control signal, the last data signal is retained.

Abstract: An integrated semiconductor active isolator circuit which includes a negative feedback amplifier having an active semiconductor amplifier element. The control terminal of the semiconductor amplifying element defines the output of the isolator circuit and a principal conduction electrode of the semiconductor amplifying element defines an input of the isolator circuit.

Abstract: The invention relates to an integrated circuit having a programmable cell, more particularly for use in an electronic card. The cell is provided with a programmable element (P) having two conductive layers (51, 52), which are separated from each other by a dielectric layer (53). The element can be programmed by applying between the layers 51, 52 a programming voltage such that an electric breakdown is produced in the dielectric layer (53), as a result of which the element passes permanently from an electrically non-conducting state to an electrically conducting state. According to the invention, the programmable cell comprises an asymmetric bistable trigger circuit (I,II). The trigger circuit (I,II) is loaded with the element (P) in such a manner that during operation it is in a first state if the element is electrically non-conducting and is in a second state if the element is electrically conducting.

Abstract: A depilation apparatus is provided which comprises at least one pair of depilation rollers (3, 4; 5, 6) arranged at the location of an opening (2) in the apparatus for access to their circumferential surfaces, which rollers are rotatably supported, which are rotatable in opposite directions, and which cooperate circumferentially with one another, the depilation rollers being supported to project freely with one of their end portions and the opening in the apparatus at least partly exposing the freely projecting end portions of the depilation rollers.

Abstract: A cleaning brush for a shaver is provided which comprises a substantially plate-like main member divided into a first and a second half, the first and second halves being coupled on the side of one surface by a hinge member with their side faces being substantially adjacent to each other, the first half being provided at the side face thereof with bristles extending perpendicularly to the side face, the second half being formed in a second surface thereof with a recess which opens at the side face thereof to accommodate the bristles, the cleaning brush further comprising a holding portion provided on the first and second halves and on a mounting surface, respectively, for cooperating with each other to detachably mount the main member on the mounting surface.

Abstract: Heterodyne optical time domain reflectometer (OTDR) for determining the attenuation behavior of a monomode waveguide (test waveguide) by measurement of the backscattered parts of light pulses transmitted in said waveguide. An acousto-optic modulator (AOM) which deflects the transmission beam from a laser into the waveguide to be tested at a light frequency which is modulated with the acoustic frequency when the AOM is acoustically energized in a pulse mode. The light pulses backscattered from the test waveguide are superimposed on a local oscillator beam (LO) constituted by the laser beam which traverses the AOM when the AOM is not energized. The optical system losses are reduced in that the superposition is realized in a passive coupler, particularly a fibre coupler (10, 26).

Abstract: An integrated circuit with a memory, includes a matrix of memory cells and sense amplifiers which are coupled thereto, with the inputs of the sense amplifiers being connected to one another and the outputs of the sense amplifiers being connected to one another via a read bus. During the reading of information from a memory cell, the sense amplifiers are simultaneously activated. As a result, the access time for reading information from a a memory cell remains substantially constant when the number of memory columns to be connected in parallel is changed. The dimensioning of the sense amplifiers may remain the same when the number of memory columns is changed, so that dimensioning need be performed only once. This results in a saving as regards time and costs.

Abstract: A semiconductor body (1) has a portion (2a) of one conductivity type adjacent one major surface (3). A first active device region (4) forms with the portion (2a) a first pn junction (5) which terminates at the one major surface (3) and is reverse-biassed in at least one mode of operation of the device. A second active device region (6) provided within the first active device region (4) forms with the first active device region (4) a second pn junction (7) terminating at the one major surface (3). One or more further regions (8) of the opposite conductivity type are provided with the portion (2a) adjacent the one major surface (3) surrounding and spaced from the first pn junction (5) to lie within the spread of the depletion region when the first pn junction (5) is reverse-biased in the at least one mode of operation.

Abstract: A shaving apparatus is provided comprising a foil having hair entrance apertures and a shaving member which can be driven with respect to the foil, which apparatus comprises a foil holder having supporting parts corresponding to the shape of the foil. The foil holder comprises at least one adjustable connection member for the foil.

Abstract: The invention relates to an electrical overhead cable rope comprising an integrated optical communication lead (13), in which metallic wire elements (14, 15, 16) surround a tube (1) or noble steel, in which at least one optical waveguide (2) is contained. Corrosion of the wire elements of the overhead cable rope is prevented by providing a tube (1) of noble steel having applied to it a water-tight coating which establishes a continuous electrically conducting connection between the tube of noble steel and the wire elements (14, 15, 16) surrounding it.

Abstract: A variable bi-phase modulator circuit for microwave signals includes a quadrature power divider (1) having signal input and output ports (2 and 3) and two control ports (4 and 5), and two variable resistors each having an input port (11). Each of the two variable resistors includes first and second microwave field-effect transistors (F1 and F2), the drains of which are coupled together via an intermediate resistor (R). These resistors can be formed using microwave monolithic integrated circuit technology and can have very good impedance characteristics. The input port (11) of the variable resistor has a connection to the intermediate resistor (R) and to the drain of the first transistor (F2). Each transistor is connected with zero dc bias between its source and drain and has a channel resistance which changes with change in gate voltage (VG1, VG2).

Abstract: The invention relates to a method of producing an optical cable in which at least one optical waveguide fed forward from a supply reel is provided with a loosely surrounding jacket by means of extrusion, whose length is subsequently reduced relative to the length of the optical waveguide travelling through the expander and is thereafter wound-up. The excessive length of the optical waveguide is consequently distributed uniformly along the overall length of the optical cable, because of the fact that the optical waveguides paid-out from the supply reel are stranded before they are fed into the extruder.

Abstract: An integrated charge pump circuit with back bias voltage reduction includes one or more diode type voltage-multiplier stages, with each stage having a diode-connected NMOS transistor in place of the conventionally-used p-n junction diode. The transistors are formed within a P-type well, which forms the back gate of each transistor within the well, and the transistor threshold voltages are dependent on the potential of the P-type well. Performance of the charge pump circuit using NMOS transistors is enhanced by the use of a bias circuit which generates a bias voltage as a function of the output voltage generated by the charge pump circuit, and applies this bias voltage to the P-type well to minimize the back-body effects of the NMOS transistors. The bias circuit thus permits the construction of an integrated charge pump circuit with significantly lower MOS diode voltage drops than would otherwise be possible.

Abstract: Digital filter arrangement in which a sample of an output signal is calculated by forming the sum of the products of a set of samples of an input signal and a set of filter coefficients. To provide a more accurate encoding of the filter coefficients without great consequences for the hardware, the filter coefficients are encoded by combinations of the form:K1.multidot.2.sup.m +K2.multidot.2.sup.n,wherein n and m are integers and it holds that for at least one coefficient: 1<.vertline.K1.vertline.<2 and .vertline.K2.vertline.=0 or 1 or: 1<.vertline.K1.vertline.<2 and 1<.vertline.K2.vertline.<2 and a multiplier is present for combinatorially multiplying a signal sample by the factor .vertline.K1.vertline., .vertline.K2.vertline. which is located between 1 and 2.