Patents Assigned to Varian Semiconductor Equipment Associates, Inc.
  • Patent number: 10157764
    Abstract: A thermal shield is disclosed that may be disposed between a heated electrostatic chuck and a base. The thermal shield comprises a thermal insulator, such as a polyimide film, having a thickness of between 1 and 5 mils. The polyimide film is coated on one side with a layer of reflective material, such as aluminum. The layer of reflective material may be between 30 and 100 nanometers. The thermal shield is disposed such that the layer of reflective material is closer to the chuck. Because of the thinness of the layer of reflective material, the thermal shield does not retain a significant amount of heat. Further, the temperature of the thermal shield remains far below the glass transition temperature of the polyimide film.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: December 18, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Dale K. Stone, David J. Chipman
  • Patent number: 10157763
    Abstract: Systems and methods for facilitating expeditious handling and processing of semiconductor substrates with a minimal number of handling devices. Such a system may include an entry load-lock configured to transfer substrates from an atmospheric environment to a vacuum chamber, an alignment station disposed in the vacuum chamber and configured to adjust orientations of substrates, a first vacuum robot configured to move substrates from the entry load-lock to the alignment station, a process station disposed in the vacuum chamber and configured to perform a designated process on substrates, first and second exit load-locks configured to transfer substrates from the vacuum chamber to the atmospheric environment, and a second vacuum robot configured to move substrates from the alignment station to the process station and further configured to move substrates from the process station to the first exit load-lock and to the second exit load-lock in an alternating fashion.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: December 18, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Robert J. Mitchell, Eric Hermanson, Benjamin B. Riordon
  • Patent number: 10158061
    Abstract: In one embodiment, a method to form a superconductor device includes depositing a crystalline layer having a preferred crystallographic orientation on a substrate and forming an oriented superconductor layer comprising an oriented superconductor material on the crystalline layer. A metallic layer is formed on the superconductor layer and a mask is provided proximate the substrate to define a protected portion of the oriented superconductor layer and an exposed portion of the oriented superconductor layer. The exposed portion of the oriented superconductor layer is removed without etching the protected portion of the oriented superconductor layer.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: December 18, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC
    Inventors: Connie P. Wang, Paul Murphy, Paul Sullivan
  • Patent number: 10153127
    Abstract: A low profile extraction electrode assembly including an insulator having a main body, a plurality of spaced apart mounting legs extending from a first face of the main body, a plurality of spaced apart mounting legs extending from a second face of the main body opposite the first face, the plurality of spaced apart mounting legs extending from the second face offset from the plurality of spaced apart mounting legs extending from the first face in a direction orthogonal to an axis of the main body, the low profile extraction electrode assembly further comprising a ground electrode fastened to the mounting legs extending from the first face, and a suppression electrode fastened to the mounting legs extending from the second face, wherein a tracking distance between the ground electrode and the suppression electrode is greater than a focal distance between the ground electrode and the suppression electrode.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: December 11, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventor: Jeffrey A. Burgess
  • Patent number: 10152033
    Abstract: Embodiments of the disclosure provide proportional integral derivative control (PID) using multiple actuators. In one embodiment, a process includes providing a PID controller in communication with a primary actuator and a secondary actuator, the primary actuator and the secondary actuator coupled to a handler. The process further includes receiving position feedback and a specified trajectory for the handler, and generating a dynamic feedforward force command and a position correction command for the handler based on the position feedback and the specified trajectory. The process further includes providing, from the PID controller, the dynamic feedforward force command to the secondary actuator and the position correction command to the primary actuator.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: December 11, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Jack J. LoPiccolo, Robert J. Mitchell
  • Patent number: 10147584
    Abstract: An ion implantation system may include an ion source to generate an ion beam, a substrate stage disposed downstream of the ion source; and a deceleration stage including a component to deflect the ion beam, where the deceleration stage is disposed between the ion source and substrate stage. The ion implantation system may further include a hydrogen source to provide hydrogen gas to the deceleration stage, wherein energetic neutrals generated from the ion beam are not scattered to the substrate stage.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: December 4, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Frank Sinclair, Daniel Tieger, Klaus Becker
  • Publication number: 20180340769
    Abstract: An apparatus may include a processor and memory unit, including a control routine having a measurement processor to determine, based upon a first set of scatterometry measurements, a first change in a first dimension of a first set of substrate features along a first direction. The first set of substrate features may be elongated along a second direction perpendicular to the first direction. The measurement processor may be to determine, based upon a second set of scatterometry measurements, a second change in dimension of a second set of substrate features along the second direction, wherein the second set of substrate features is elongated along the first direction. The apparatus may include a control processor to generate an error signal when a figure of merit based upon the first change and the second change lies outside a target range.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan D. Evans, Simon Ruffell, Tristan Y. MA, Kevin Anglin
  • Publication number: 20180342413
    Abstract: Embodiments of the disclosure include a fixed position mask for workpiece edge treatment. In some embodiments, an apparatus includes a roplat having a rotatable assembly, and a platen coupled to the rotatable assembly, wherein the platen is configured to hold a workpiece. The apparatus further includes a bracket affixed to the rotatable assembly, and a mask directly coupled to the bracket, wherein the mask is positioned adjacent the workpiece. The mask covers an inner portion of the platen and the workpiece, leaving just an outer circumferential edge of the workpiece exposed to an ion treatment. In some embodiments, the platen is permitted to rotate relative to the bracket during an ion treatment. In some embodiments, the mask includes a solid plate section devoid of any openings, and a mounting portion extending from the plate section, wherein the mounting portion is directly coupled to an extension arm of the bracket.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Fletcher Ian Potter, Philip Layne, Keith A. Fernlund, Michael Swears, Richard Allen Sprenkle
  • Publication number: 20180342367
    Abstract: A low profile extraction electrode assembly including an insulator having a main body, a plurality of spaced apart mounting legs extending from a first face of the main body, a plurality of spaced apart mounting legs extending from a second face of the main body opposite the first face, the plurality of spaced apart mounting legs extending from the second face offset from the plurality of spaced apart mounting legs extending from the first face in a direction orthogonal to an axis of the main body, the low profile extraction electrode assembly further comprising a ground electrode fastened to the mounting legs extending from the first face, and a suppression electrode fastened to the mounting legs extending from the second face, wherein a tracking distance between the ground electrode and the suppression electrode is greater than a focal distance between the ground electrode and the suppression electrode.
    Type: Application
    Filed: October 9, 2017
    Publication date: November 29, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Jeffrey A. BURGESS
  • Patent number: 10141161
    Abstract: A workpiece processing apparatus allowing independent control of the extraction angles of charged ions and reactive neutrals is disclosed. The apparatus includes an extraction plate having an extraction aperture through which charged ions pass. Plasma sheath modulation and electric fields may be used to determine the extraction angle of the charged ions. The extraction plate also includes one or more neutral species channels, separate from the extraction aperture, through which reactive neutrals are passed at a selected extraction angle. The geometric configuration of the neutral species channels determines the extraction angle of the reactive neutrals. The neutral species channel may also comprise a suppressor, to reduce the number of charged ions that pass through the neutral species channel. The apparatus may be used for various applications, such as directed reactive ion etching.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: November 27, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Glen FR Gilchrist, Shurong Liang
  • Patent number: 10134568
    Abstract: Provided herein are approaches for dynamically modifying plasma volume in an ion source chamber by positioning an end plate and radio frequency (RF) antenna at a selected axial location. In one approach, an ion source includes a plasma chamber having a longitudinal axis extending between a first end wall and a second end wall, and an RF antenna adjacent a plasma within the plasma chamber, wherein the RF antenna is configured to provide RF energy to the plasma. The ion source may further include an end plate disposed within the plasma chamber, adjacent the first end wall, the end plate actuated along the longitudinal axis between a first position and a second position to adjust a volume of the plasma. By providing an actuable end plate and RF antenna, plasma characteristics may be dynamically controlled to affect ion source characteristics, such as composition of ion species, including metastable neutrals.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: November 20, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Bon-Woong Koo, Yong-Seok Hwang, Kyong-Jae Chung
  • Publication number: 20180330944
    Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
  • Patent number: 10128082
    Abstract: In one embodiment, an apparatus to treat a substrate may include an extraction plate to extract a plasma beam from a plasma chamber and direct the plasma beam to the substrate. The plasma beam may comprise ions forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate; and a gas outlet system disposed outside the plasma chamber, the gas outlet system coupled to a gas source and arranged to deliver to the substrate a reactive gas received from the gas source, wherein the reactive gas does not pass through the plasma chamber.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: November 13, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Shurong Liang, Costel Biloiu, Glen Gilchrist, Vikram Singh, Christopher Campbell, Richard John Hertel, Alex Kontos
  • Patent number: 10119529
    Abstract: An apparatus including a movable cryopump that may be disposed in a first operational position and a second regeneration position is disclosed. In the first operational position, the front surface of the cryopump may be disposed in the same plane as the wall of the processing chamber, effectively serving as a part of a chamber wall. In certain embodiments, the front surface of the cryopump may extend into the processing chamber. In the second regeneration position, the cryopump is retracted into a cavity, which is isolated from the processing chamber by a movable gate. The first operational position serves to enhance the pumping speed of the cryopump, while the second regeneration position ensures that previously trapped molecules are not released back into the processing chamber.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: November 6, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Steven C. Borichevsky, Eric D. Hermanson
  • Patent number: 10113917
    Abstract: A system and method for monitoring the temperature of a platen and a workpiece disposed on that platen is disclosed. Since the platen is a dielectric material, its properties, such as resistivity and conductivity, may change as a function of temperature. By understanding the relationship between these parameters and temperature, it may be possible to indirectly determine the temperature of the platen. For example, the platen may be in electrical communication with a power supply, which provides a clamping voltage for the workpiece. By monitoring the current waveform associated with the clamping voltage, it is possible to determine changes in the characteristics of the platen. Based on these changes, the temperature of the platen may be calculated.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: October 30, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: David E. Suuronen
  • Patent number: 10113229
    Abstract: Approaches herein increase a ratio of reactive ions to a neutral species in a plasma processing apparatus. Exemplary approaches include providing a processing apparatus having a plasma source chamber including a first gas inlet, and a deposition chamber coupled to the plasma source chamber, wherein the deposition chamber includes a second gas inlet for delivering a point of use (POU) gas to an area proximate a substrate disposed within the deposition chamber. Exemplary approaches further include generating an ion beam for delivery to the substrate, and modifying a pressure within the deposition chamber in the area proximate the substrate to increase an amount of reactive ions present for impacting the substrate when the ion beam is delivered to the substrate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: October 30, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, John Hautala, Shurong Liang, Joseph Olson
  • Publication number: 20180309288
    Abstract: Embodiments of the disclosure include a fault current limiter (FCL) providing symmetrical electrostatic shielding. In some embodiments, a FCL includes a superconductor maintained at a first voltage greater than zero voltage, and an enclosure containing the superconductor, the enclosure maintained at a second voltage greater than zero voltage, wherein the second voltage is different from the first voltage. The FCL may include an electrical connection directly coupling the superconductor and the enclosure, wherein the electrical connection enables each of a plurality of current limiting modules of the superconductor to receive, during a fault condition, an equal or unequal sub-portion of a total voltage drop.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr Lubicki, Saeed Jazebi, David Morrell, George Emmanuel, Paul Murphy
  • Patent number: 10106911
    Abstract: An apparatus for growing a silicon crystal substrate comprising a heat source, an anisotropic thermal load leveling component, a crucible, and a cold plate component is disclosed. The anisotropic thermal load leveling component possesses a high thermal conductivity and may be positioned atop the heat source to be operative to even-out temperature and heat flux variations emanating from the heat source. The crucible may be operative to contain molten silicon in which the top surface of the molten silicon may be defined as a growth interface. The crucible may be substantially surrounded by the anisotropic thermal load leveling component. The cold plate component may be positioned above the crucible to be operative with the anisotropic thermal load leveling component and heat source to maintain a uniform heat flux at the growth surface of the molten silicon.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: October 23, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Frederick M. Carlson, Brian T. Helenbrook
  • Patent number: 10109997
    Abstract: A fault current limiter may include a current limiting leg to transmit a first current and a control leg in parallel with the current limiting leg, the control leg to transmit a second current. The control leg may include a plurality of solid state switches arranged in electrical series with one another; a plurality of current monitors arranged in electrical series with the plurality of solid state switches; and at least one triggering circuit, wherein the plurality of current monitors are electrically coupled to the at least one triggering circuit, and wherein the at least one triggering circuit is optically coupled to the plurality of solid state switches.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: October 23, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Adrian Wilson, Arsen Babayan, Herbert Piereder
  • Patent number: D832994
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: November 6, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventor: W. Davis Lee