Patents Assigned to VIA Technologies, Inc.
  • Patent number: 10643302
    Abstract: A method and an apparatus for generating 3D panoramic video are provided. In the method, plural frames are captured from a panoramic video. Each frame is transformed into a polyhedral mapping projection comprising side planes, a top plane and a bottom plane. Displacements of pixels in the side planes are calculated by using the side planes of each frame, and displacements of pixels in the top plane and the bottom plane are calculated by using the displacements of the side planes. Then, the pixels in the side planes, the top plane and the bottom plane of each frame are shifted according the displacements of the polyhedral mapping projection to generate a shifted polyhedral mapping projection. The shifted polyhedral mapping projection is transformed into a shifted frame with 2D space format. The shifted frames and corresponding frames construct 3D images and the 3D images are encoded into a 3D panoramic video.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: May 5, 2020
    Assignee: VIA Technologies, Inc.
    Inventor: Robin J. Cheng
  • Patent number: 10635453
    Abstract: A microprocessor includes a plurality of processing cores and a configuration register configured to indicate whether each of the plurality of processing cores is enabled or disabled. Each enabled one of the plurality of processing cores is configured to read the configuration register in a first instance to determine which of the plurality of processing cores is enabled or disabled and generate a respective configuration-related value based on the read of the configuration register in the first instance. The configuration register is updated to indicate that a previously enabled one of the plurality of processing cores is disabled. Each enabled one of the plurality of processing cores is configured to read the configuration register in a second instance to determine which of the plurality of processing cores is enabled or disabled and generate the respective configuration-related value based on the read of the configuration register in the second instance.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 28, 2020
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: G. Glenn Henry, Terry Parks, Darius D. Gaskins
  • Patent number: 10635859
    Abstract: A natural language recognizing apparatus including an input device, a processing device and a storage device is provided. The input device is configured to provide a natural language data. The storage device is configured to store a plurality of program modules. The program modules include a grammar analysis module. The processing device executes the grammar analysis module to analyze the natural language data through a formal grammar model, and generate a plurality of string data. When at least one of the string data conforms to a preset grammar condition, the processing device judges the at least one of the string data is an intention data, and the processing device outputs a corresponding response signal according to the intention data. In addition, a natural language recognizing method is also provided.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: April 28, 2020
    Assignee: VIA Technologies, Inc.
    Inventors: Guo-Feng Zhang, Jing-Jing Guo
  • Patent number: 10613812
    Abstract: A system, a control apparatus and a control method for distributed video display are provided. The system includes an image source device configured to provide image data, a plurality of displays, a plurality of display chips respectively coupled to the displays and connected with the video source device through a network, and a control apparatus connected with the image source device and the display chips through the network and configured to transmit a playback signal to each of the display chips to control the display chips to receive the image data from the image source device and convert the received image data into display frames capable of being played by the displays.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: April 7, 2020
    Assignee: VIA Technologies, Inc.
    Inventor: Steve Shu Liu
  • Publication number: 20200097423
    Abstract: An architecture of a multi-core electronic system is provided. The architecture includes a plurality of first computing cores, a first ring bus, a direct memory access (DMA) engine, and a DMA ring controller. The first computing cores are connected to the first ring bus. The DMA ring controller connects the DMA engine to the first ring bus. The first computing cores communicate with the DMA engine through the first ring bus and make the DMA engine perform a memory operation.
    Type: Application
    Filed: December 22, 2018
    Publication date: March 26, 2020
    Applicant: VIA Technologies, Inc.
    Inventor: Wen-Pin Chiang
  • Patent number: 10602273
    Abstract: An audio playing apparatus and an audio transmission circuit are provided. The audio playing apparatus includes a first audio connector, a second audio connector, a player, and an audio transmission circuit. The second audio connector has a different interface specification than an interface specification of the first audio connector. The audio transmission circuit is coupled to the first audio connector, the second audio connector and the player. The audio transmission circuit detects a power pin of the first audio connector and a power pin of the second audio connector to obtain a determination result, and selects one of the first audio connector and the second audio connector as a target connector according to the determination result, so as to transmit an audio signal associated with the target connector to the player.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 24, 2020
    Assignee: VIA Technologies, Inc.
    Inventor: Wen-Chi Chen
  • Publication number: 20200068306
    Abstract: An audio playing apparatus and an audio transmission circuit are provided. The audio playing apparatus includes a first audio connector, a second audio connector, a player, and an audio transmission circuit. The second audio connector has a different interface specification than an interface specification of the first audio connector. The audio transmission circuit is coupled to the first audio connector, the second audio connector and the player. The audio transmission circuit detects a power pin of the first audio connector and a power pin of the second audio connector to obtain a determination result, and selects one of the first audio connector and the second audio connector as a target connector according to the determination result, so as to transmit an audio signal associated with the target connector to the player.
    Type: Application
    Filed: October 3, 2018
    Publication date: February 27, 2020
    Applicant: VIA Technologies, Inc.
    Inventor: Wen-Chi Chen
  • Patent number: 10575053
    Abstract: A system, a method, and a control server for media display on a video wall are provided. The system includes a media server, a plurality of transcode servers, a video wall, and a control server connected through a network. The media server provides a media file. The control server determines cutting parameters used to cut a medium recorded in the media file into video data suitable for display on each of a plurality of displays according to configuration information of the displays in the video wall to generate a plurality of transcode tasks including the cutting parameters, and sequentially assigns the transcode tasks to the transcode servers to perform transcoding. The media server collects transcode result files uploaded by each of the transcode servers and provides the same for a player of the corresponding display to read and display on the display.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: February 25, 2020
    Assignee: VIA Technologies, Inc.
    Inventors: Nan Qin, Peng Jin
  • Patent number: 10573614
    Abstract: A process for fabricating a circuit substrate is provided. A dielectric layer is formed to cover a surface of a circuit stack and a patterned conductive layer, and has bonding openings exposing bonding segments of traces of the patterned conductive layer, and has plating openings exposing plating segments of the traces. A plating seed layer is formed to cover the surface of the circuit stack, the bonding segments, the plating segments, and the dielectric layer. A mask is formed to cover the plating layer and has mask openings exposing portions of the plating seed layer on the bonding segments. Portions of the plating seed layer on the bonding segments are removed with use of the mask as an etching mask. A thickening conductive layer is plated on each of the bonding segments with use of the mask as a plating mask. The mask and the plating seed layer are removed.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: February 25, 2020
    Assignee: VIA Technologies, Inc.
    Inventor: Chen-Yueh Kung
  • Patent number: 10514920
    Abstract: A processor includes a processing core that detects a predetermined program is running on the processor and looks up a prefetch trait associated with the predetermined program running on the processor, wherein the prefetch trait is either exclusive or shared. The processor also includes a hardware data prefetcher that performs hardware prefetches for the predetermined program using the prefetch trait. Alternatively, the processing core loads each of one or more range registers of the processor with a respective address range in response to detecting that the predetermined program is running on the processor. Each of the one or more address ranges has an associated prefetch trait, wherein the prefetch trait is either exclusive or shared. The hardware data prefetcher performs hardware prefetches for the predetermined program using the prefetch traits associated with the address ranges loaded into the range registers.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: December 24, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Rodney E. Hooker, Albert J. Loper, John Michael Greer
  • Patent number: 10509571
    Abstract: A storage device includes a flash memory array and a controller. The flash memory array includes a plurality of blocks. The first block among the blocks has a minimal erase count in the blocks. When determining that a difference between an average erase count of the blocks and the minimal erase count exceeds a cold-data threshold, the controller selects the first block to be a source block. When a data migration of a data-moving process is executed, the controller moves the data of the source block to a target block.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: December 17, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Zhongyi Gao, Xiaoyu Yang
  • Patent number: 10496147
    Abstract: An energy regulation circuit is provided. A first voltage regulator adjusts an input voltage to generate an adjustment voltage. A first energy storage is charged according to the input voltage or the adjustment voltage. A first switch is coupled to the first energy storage. A second energy storage is coupled to the first switch. When the first switch is turned on, the second energy storage is coupled to the first energy storage in parallel. When the first switch is turned off, a second voltage regulator generates an operation voltage according to the voltage stored in the first energy storage. When the first switch is turned on, the second voltage regulator generates the operation voltage according to the voltages stored in the first and second energy storages. A controller operates according to the operation voltage.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: December 3, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Tze-Shiang Wang, Chih-Wen Chu
  • Patent number: 10474529
    Abstract: An error checking and correcting (ECC) decoding method and apparatus are provided. A decoding circuit decodes a codeword using (or without using) reference information, wherein when the decoding circuit fails to decode a first codeword, the decoding circuit decodes a second codeword to produce decoded data. The decoding circuit checks whether a change has occurred from each codeword bit of the second codeword to a corresponding bit of the decoded data. In accordance with a bit position of the changed corresponding bit, the decoding circuit correspondingly changes the first codeword to a modified codeword, and/or correspondingly changes the reference information to modified information. The decoding circuit performs the ECC decoding again on the modified codeword (or the first codeword) using (or without using) the modified information.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: November 12, 2019
    Assignee: VIA Technologies, Inc.
    Inventors: Ching-Yu Chen, Yi-Lin Lai, Chen-Te Chen
  • Patent number: 10468830
    Abstract: A paddle card includes a circuit board, a pad group and ground planes. The circuit board has an upper surface and a lower surface opposite to each other. The pad group is adapted to connect wires of a cable or terminals of a plug, and includes a pair of upper differential pads on the upper surface and a pair of lower differential pads on the lower surface. The pair of upper differential pads and the pair of lower differential pads are corresponding to each other respectively and configured up and down. The ground planes are spaced at intervals between the upper surface and the lower surface. The ground plane below the pair of upper differential pads has an opening corresponding thereto. A portion of the at least one ground plane between the pair of upper differential pads and the pair of lower differential pads is solid as a shield.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: November 5, 2019
    Assignee: VIA Technologies, Inc.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20190335237
    Abstract: A system, a method, and a control server for media display on a video wall are provided. The system includes a media server, a plurality of transcode servers, a video wall, and a control server connected through a network. The media server provides a media file. The control server determines cutting parameters used to cut a medium recorded in the media file into video data suitable for display on each of a plurality of displays according to configuration information of the displays in the video wall to generate a plurality of transcode tasks including the cutting parameters, and sequentially assigns the transcode tasks to the transcode servers to perform transcoding. The media server collects transcode result files uploaded by each of the transcode servers and provides the same for a player of the corresponding display to read and display on the display.
    Type: Application
    Filed: October 17, 2018
    Publication date: October 31, 2019
    Applicant: VIA Technologies, Inc.
    Inventors: Nan Qin, Peng Jin
  • Patent number: 10459007
    Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: October 29, 2019
    Assignee: VIA Technologies, Inc.
    Inventors: Chen-Yueh Kung, Wen-Yuan Chang, Wei-Cheng Chen
  • Publication number: 20190317905
    Abstract: An electronic apparatus and a method of extending peripheral devices are provided. The electronic apparatus includes: a controller; and a plurality of peripheral devices electrically connected to the controller, wherein the plurality of peripheral devices include a plurality of video graphics array display cards, wherein in an initialization phase of the electronic apparatus, the controller allocates input/output resources to a first portion of the video graphics array display cards and does not allocate the input/output resources to a second portion of the video graphics array display cards, wherein the first portion of the video graphics array display cards allocated with the input/output resources is used to display an image in the initialization phase.
    Type: Application
    Filed: April 3, 2019
    Publication date: October 17, 2019
    Applicant: VIA Technologies, Inc.
    Inventors: Kuan-Jui Ho, Yi-Hsiang Wang
  • Patent number: D864275
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: October 22, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Chih-Wei Huang
  • Patent number: D867426
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: November 19, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Chih-Wei Huang
  • Patent number: D875809
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: February 18, 2020
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Chih-Wei Huang