Abstract: An error checking and correcting (ECC) decoding method and apparatus are provided. A decoding circuit decodes a codeword using (or without using) reference information, wherein when the decoding circuit fails to decode a first codeword, the decoding circuit decodes a second codeword to produce decoded data. The decoding circuit checks whether a change has occurred from each codeword bit of the second codeword to a corresponding bit of the decoded data. In accordance with a bit position of the changed corresponding bit, the decoding circuit correspondingly changes the first codeword to a modified codeword, and/or correspondingly changes the reference information to modified information. The decoding circuit performs the ECC decoding again on the modified codeword (or the first codeword) using (or without using) the modified information.

Abstract: A paddle card includes a circuit board, a pad group and ground planes. The circuit board has an upper surface and a lower surface opposite to each other. The pad group is adapted to connect wires of a cable or terminals of a plug, and includes a pair of upper differential pads on the upper surface and a pair of lower differential pads on the lower surface. The pair of upper differential pads and the pair of lower differential pads are corresponding to each other respectively and configured up and down. The ground planes are spaced at intervals between the upper surface and the lower surface. The ground plane below the pair of upper differential pads has an opening corresponding thereto. A portion of the at least one ground plane between the pair of upper differential pads and the pair of lower differential pads is solid as a shield.

Abstract: A system, a method, and a control server for media display on a video wall are provided. The system includes a media server, a plurality of transcode servers, a video wall, and a control server connected through a network. The media server provides a media file. The control server determines cutting parameters used to cut a medium recorded in the media file into video data suitable for display on each of a plurality of displays according to configuration information of the displays in the video wall to generate a plurality of transcode tasks including the cutting parameters, and sequentially assigns the transcode tasks to the transcode servers to perform transcoding. The media server collects transcode result files uploaded by each of the transcode servers and provides the same for a player of the corresponding display to read and display on the display.

Abstract: A probe card including a circuit board, a transformer, a probe head, and a reinforcement structure is provided. The transformer including a body, a plurality of solder balls, and a plurality of first contact points are disposed on the substrate. The body has a first surface and a second surface, wherein the first surface is located between the circuit board and the second surface. The solder balls are disposed on the first surface, and the first contact points are disposed on the second surface. The probe head is disposed on the second surface. The probe head is electrically connected to the circuit board by the first solder balls. The reinforcement structure is disposed between the probe head and the circuit board.

Abstract: An electronic apparatus and a method of extending peripheral devices are provided. The electronic apparatus includes: a controller; and a plurality of peripheral devices electrically connected to the controller, wherein the plurality of peripheral devices include a plurality of video graphics array display cards, wherein in an initialization phase of the electronic apparatus, the controller allocates input/output resources to a first portion of the video graphics array display cards and does not allocate the input/output resources to a second portion of the video graphics array display cards, wherein the first portion of the video graphics array display cards allocated with the input/output resources is used to display an image in the initialization phase.

Abstract: A driver-assistance method and a driver-assistance apparatus are provided. In the method, a movement trajectory of wheels in surroundings of a vehicle when the vehicle moves are calculated. Multiple cameras disposed on the vehicle are used to capture images of multiple perspective views surrounding the vehicle, and the images of the perspective views are transformed into images of a top view. A synthetic image surrounding the vehicle is generated according to the images of the perspective views and the top view. Finally, the synthetic image and the movement trajectories are mapped and combined to a 3D model surrounding the vehicle and a movement image including the movement trajectories having a viewing angle from an upper rear side to a lower front side of the vehicle is provided by using the 3D model when backing up the vehicle.

Abstract: A processor includes first and second processing cores configured to support first and second respective subsets of features of its instruction set architecture (ISA) feature set. The first subset is less than all the features of the ISA feature set. The first and second subsets are different but their union is all the features of the ISA feature set. The first core detects a thread, while being executed by the first core rather than by the second core, attempted to employ a feature not in the first subset and, in response, to indicate a switch from the first core to the second core to execute the thread. The unsupported feature may be an unsupported instruction or operating mode. A switch may also be made if the lower performance/power core is being over-utilized or the higher performance/power core is being under-utilized.

Abstract: A bridge device including a first connector, a first transceiver, a second connector, a second transceiver, a voltage processor, and a controller is provided. The first connector is configured to couple to a host and includes a first pin. The first transceiver is coupled between the first pin and a node and includes a first current limiter. The second connector is configured to couple to a peripheral device and includes a second pin. The second transceiver is coupled between the node and the second pin and includes a second current limiter. The voltage processor processes the voltage of the node to generate an operation voltage. The controller receives the operation voltage to determine whether to turn on at least one of the first and second transceivers.

Abstract: A multi-core microprocessor is organized into a plurality of resource-associated domains including core domains, group domains, and a global domain. Each domain relates to either local resources, group resources, or global resources that are respectively used by a single core, a group of cores, or all the cores. Each core has its own independently settable target operating state selected from a plurality of possible target operating states that designate configurations for the local resources, group resources, and global resources. Each core is provided with coordination logic configured to implement or request implementation of the core's target operating state, but only to the extent that implementation of the target operating state would not reduce performance of any other core below its own target operating state.

Abstract: A microprocessor performs an If-Then (IT) instruction and an associated IT block by extracting condition information from the IT instruction and for each instruction of the IT block: determining a respective condition for the instruction using the extract condition information, translating the instruction into a microinstruction, and conditionally executing the microinstruction based on the respective condition. For a first instruction, the translating comprises fusing the IT instruction with the first IT block instruction. A hardware instruction translation unit performs the extracting, determining and translating. Execution units conditionally execute the microinstructions. The hardware instruction translation unit and execution units are distinct hardware elements and are coupled together.

Abstract: A non-volatile memory (NVM) apparatus and an empty page detection method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller reads the content of a memory page of the NVM. The controller performs Low Density Parity Check (LDPC) decoding for at least one codeword of the memory page to obtain a decoded codeword and a check-result vector. The controller determines that the memory page is not an empty page when the LDPC decoding for the codeword is successful. The controller counts an amount of the bits being 1 (or 0) in the check-result vector when the LDPC decoding for the codeword is fail. Based on the amount of the bits being 1 (or 0) in the check-result vector, the controller determines whether the memory page is an empty page.

Abstract: A multimedia broadcasting system having a multiple-node structure includes nodes. Each node is coupled to at least one of the nodes, and the nodes include server nodes and multimedia-playing terminal nodes. Each server node is coupled to at least one of the server nodes and provides at least one multimedia content. Each multimedia-playing terminal node receives multimedia content transmitted by a server node of the server nodes and plays the multimedia content. A first server node of the server nodes is coupled to a second server node of the server nodes, and the first server node transmits, via the second server node, a first multimedia content to at least one multimedia-playing terminal node controlled by the second server node. Each multimedia-playing terminal node is a multimedia play terminal including at least one display device or audio playing device.

Abstract: The invention provides a cloud-computing graphic server. In one embodiment, the cloud-computing graphic server is coupled to a client host via a network, and includes a plurality of back-end graphic servers and at least one front-end graphic server. The graphic server is coupled to the back-end graphic servers via a high-speed network, receives a request from the client host via the network, determines a plurality of application programs required by the request, and selects a plurality of used back-end graphic servers respectively corresponding to the application programs from the back-end graphic servers. The used back-end graphic servers execute the application programs according to instructions from the front-end graphic server to generate a plurality of graphic surfaces, and the front-end graphic server blends the graphic surfaces to obtain a windows surface datastream and sends the windows surface datastream back to the client host for display via the network.

Abstract: An interface controller coupling the main body of an external electronic device to a host, and the electronic device using the interface controller and a control method for the external electronic controller are disclosed. The interface controller has a control unit and a non-volatile memory. The control unit is configured to transmit a termination-on signal to the host when link information retrieved from the main body has been written into the non-volatile memory. When the host issues a link information request in response to the termination-on signal, the control unit uses the link information stored in the non-volatile memory to respond to the link information request.

Abstract: A non-volatile memory (NVM) apparatus and a data de-duplication method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller performs an error checking and correcting (ECC) method to convert a raw data into an encoded data. The controller performs the data de-duplication method to reduce a number of times that the same encoded data is repeatedly written into the NVM. The controller generates the feature information corresponding to the raw data by reusing the ECC method. When the feature information is found in a feature list, the encoded data corresponding to the raw data will not be written into the NVM. When the feature information is not found in the feature list, the feature information is added into the feature list, and the encoded data corresponding to the raw data is written into the NVM.

Abstract: A high speed internal hysteresis comparator is provided. Impedance supply units are disposed at control terminals of transistors of an active load of a differential amplifier of the high-speed hysteresis comparator, such that a gain when the transistors operate in an active region and a responding speed of the high-speed hysteresis comparator are increased.

Abstract: A non-volatile memory device including a non-volatile memory and a controller is provided. The non-volatile memory includes a plurality of closed blocks and a plurality of open blocks. The controller derives a ratio value according to the write workload of the non-volatile memory between a first time point and a second time point and then performs a patrol read on a portion of the closed blocks according to the ratio value.