Patents Assigned to VueReal Inc.
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Publication number: 20230395579Abstract: What is disclosed is structures and methods of integrating microdevices into a system substrate. In particular the structure comprises various components of buffer layer, release layer, pads, electrodes, VIA openings and various planarization layers and passivation layers. These components are configured to form an optoelectronic device or a system. Also described are methods to form an optoelectronic device.Type: ApplicationFiled: October 19, 2021Publication date: December 7, 2023Applicant: VueReal Inc.Inventor: Gholamreza CHAJI
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Publication number: 20230395560Abstract: This disclosure is related to integrating microdevices into a system substrate. In particular the microdevices are transferred from a donor substrate into a system backplane where the microdevices connection pads are adhered to a pads on the system substrate at a temperature that is below the melting point of the materials on the pads of the system substrate and microdevice pads. The present disclosure also relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA. The disclosure further relates to a method and structure of microdevice or optoelectronic devices that allows for misalignment adjustment. The microdevices comprise a stack of semiconductor layers that in configuration with electrodes, substrate, VIA's and size factors minimize misalignment.Type: ApplicationFiled: September 2, 2021Publication date: December 7, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI, Lauren LESERGENT, David HWANG, Pranav GAVIRNENI
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Patent number: 11830868Abstract: Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layer and a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the active layer.Type: GrantFiled: March 25, 2022Date of Patent: November 28, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Publication number: 20230361239Abstract: A micro device structure comprising at least part of an edge of a micro device is covered with a metal-insulator-semiconductor (MIS) structure, wherein the MIS structure comprises a MIS dielectric layer and a MIS gate conductive layer, at least one gate pad provided to the MIS gate conductive layer, and at least one micro device contact extended upwardly on a top surface of the micro device.Type: ApplicationFiled: July 21, 2023Publication date: November 9, 2023Applicant: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi, Hossein Zamani Siboni
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Publication number: 20230361263Abstract: As the pixel density of optoelectronic devices becomes higher, and the size of the optoelectronic devices becomes smaller, the problem of isolating the individual micro devices becomes more difficult. A method of fabricating an optoelectronic device, which includes an array of micro devices, comprises: forming a device layer structure including a monolithic active layer on a substrate; forming an array of first contacts on the device layer structure defining the array of micro devices; mounting the array of first contacts to a backplane comprising a driving circuit which controls the current flowing into the array of micro devices; removing the substrate; and forming an array of second contacts corresponding to the array of first contacts with a barrier between each second contact.Type: ApplicationFiled: July 21, 2023Publication date: November 9, 2023Applicant: VueReal Inc.Inventor: Gholamreza Chaji
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Publication number: 20230341456Abstract: This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with non-receiving pads and the non-interfering area in the donor substrate is maximized. This enables the transfer of micro devices to a receiver substrate with fewer steps.Type: ApplicationFiled: March 7, 2023Publication date: October 26, 2023Applicant: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Publication number: 20230335683Abstract: The disclosure is related to creating different functional micro devices by integration of functional tuning materials and to creating encapsulation capsules to protect these materials. The disclosure also relates to a solid state device and a method to convert a color of a light emitting device into another color.Type: ApplicationFiled: June 3, 2021Publication date: October 19, 2023Applicant: VueReal Inc.Inventor: Gholamreza CHAJI
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Publication number: 20230327050Abstract: What is disclosed is various aspects of the structure of flip chip or lateral micro devices having protection of connections. The various aspects comprise a structural combination of functional layers such as doped or blocking layers or quantum well structure, as well as dielectric layers, VIA's, optical enhancements layers, connection pads, protective layers, masks and additional layers. In addition, methods of fabrication of microdevices have also been disclosed where in patterning has been used. The present disclosure further relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA.Type: ApplicationFiled: September 2, 2021Publication date: October 12, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI
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Publication number: 20230326937Abstract: In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The micro-devices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.Type: ApplicationFiled: June 13, 2023Publication date: October 12, 2023Applicant: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Publication number: 20230307575Abstract: What is disclosed is structures and methods of integrating blocks of microdevices into the system backplane. Process is outlined for forming blocks of microdevices and forming of transfer templates to facilitate transfer of blocks of microdevices to the system backplane. Further, aspects deal with microdevices forming blocks from different wafers and substrates.Type: ApplicationFiled: August 6, 2021Publication date: September 28, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Lauren LESERGENT
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Patent number: 11764199Abstract: Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layer and a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the active layer.Type: GrantFiled: August 21, 2019Date of Patent: September 19, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Publication number: 20230290286Abstract: What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads.Type: ApplicationFiled: November 2, 2022Publication date: September 14, 2023Applicant: VueReal Inc.Inventor: GHOLAMREZA CHAJI
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Publication number: 20230290762Abstract: This invention relates to non-interfering cartridge patterning for RGB pads. This disclosure is further related to arranging microdevices in the donor substrate by either patterning or population so that there is no interfering with non-receiving pads and the non-interfering area in the donor substrate is maximized. This enables the transfer of microdevices to a receiver substrate with fewer steps.Type: ApplicationFiled: April 14, 2021Publication date: September 14, 2023Applicant: VueReal Inc.Inventor: Gholamreza CHAJI
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Patent number: 11742455Abstract: What is disclosed are structures and methods for testing and repairing emissive display systems. Systems are tested with use of temporary electrodes which allow operation of the system during testing and are removed afterward. Systems are repaired after identification of defective devices with use of redundant switching from defective devices to functional devices provided on repair contact pads. Time varying signals coupled to a capacitor are used as well.Type: GrantFiled: November 27, 2020Date of Patent: August 29, 2023Assignee: VueReal Inc.Inventor: Gholamreza Chaji
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Publication number: 20230269989Abstract: The disclosure is related to creating different functional micro devices by integrating functional tuning materials and creating an encapsulation capsule to protect these materials. Various embodiments of the present disclosure also related to improve light extraction efficiencies of micro devices by mounting micro devices at a proximity of a corner of a pixel active area and arranging QD films with optical layers in a micro device structure.Type: ApplicationFiled: May 1, 2023Publication date: August 24, 2023Applicant: VueReal Inc.Inventor: Gholamreza Chaji
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Patent number: 11735545Abstract: A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.Type: GrantFiled: July 1, 2021Date of Patent: August 22, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Patent number: 11735547Abstract: A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.Type: GrantFiled: January 6, 2022Date of Patent: August 22, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Patent number: 11735623Abstract: This disclosure is related to post processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structure such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. In another example, dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with the transferred micro devices. In another example, color conversion layers are integrated into the system substrate to create different output from the micro devices.Type: GrantFiled: June 25, 2020Date of Patent: August 22, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Patent number: 11735546Abstract: A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.Type: GrantFiled: January 6, 2022Date of Patent: August 22, 2023Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi
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Publication number: 20230261146Abstract: The present invention discloses a different option electronic devices with their structure so layers that include doping, function, ohmic, conductive, planarization and passivation layer. The invention also discloses configuration of connections of top and bottom sides comprising isolated structures, related electrodes and height configuration of isolated structures.Type: ApplicationFiled: July 22, 2021Publication date: August 17, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI