Abstract: A multi-disk pack hard disk drive includes first and second spindle motor assemblies mounted one over the other on a base post. Each motor assembly may include a compact axial flux motor. The motor wiring for each may be routed within a structural cutout feature of the base post to an electrical connector at the base. A compact threaded disk clamp and motor hub interface may be implemented to further reduce the vertical height of the multi-disk pack assembly.

Abstract: Instead of using external tools for admin control operations for a device, files are used to control the device. As admin controls need to be changed, a special file is generated in the device using a file pattern generator. When the special file is written to the storage device, a file pattern engine recognizes the special file created to extract the vendor specific command. When the special file is written to the storage device, the device will recognize the special file and will perform the operation indicated in the special file. The user is able to use the special file for a single use or future use when needed. In future use cases, the special file is able to be recognized by other devices in need of the special file to execute the vendor specific command.

Abstract: More efficient memory device usage is possible by altering the memory device management. For example, when the full storage capacity of the memory device will not be used, certain portions of the memory device can be shut off and then turned on when the storage capacity is needed. When less capacity is needed, data can be consolidated and certain portions of the memory device can be shut off. Additionally, rather than operating in multilevel cell (MLC) memory, the memory device can start in single level cell (SLC) memory and transition to MLC memory over time. If there is a determination that less memory is needed, the memory device can transition from MLC memory to SLC memory. In so doing, the storage capacity of the memory device is more appropriately utilized.

Abstract: A storage device may ensure consistent performance when executing a read command provided by a host device. The storage device executes a read instruction received from the host device and executes a background operation to manage resources on a memory device and/or perform thermal throttling on the storage device. The storage device executes a formula including an interleave ratio to interleave host read operations with the background operation based on an operation time. The storage device also uses a read temperature threshold, a preset slowdown percentage, and/or a read speed to optimize host read operations during thermal throttling and thereby limit performance degradation during read operations.

Abstract: During operation of a data storage device, a controller of the data storage device may initiate read/write operations based on workloads provided by a host device. When initiating the read/write operations, power consumption and the data rate of the data storage device are generally high. Over time, the data rate corresponding to the workload decreases. Thus, the power consumption may be decreased to correspond with the decreased data rate. In order to maintain a high efficiency while decreasing an amount of power utilized, the controller may duty cycle the data storage device to operate between performance states to maintain a high data rate while decreasing power consumption.

Abstract: Instead of allowing an electrostatic discharge (ESD) event to cause a lost clock signal sync due effects of the ESD event causing an SSD to enter low power mode, utilizing ESD detection can be used to stop the reference clock signal to avoid involuntary low power mode. When an ESD event occurs, an ESD antenna sensor will selectivity disable sensitive signals and the reference clock signal. Once the ESD detector recognizes an ESD event has occurred, the device is able to enter freeze mode. While the reference clock signal is in freeze mode, the input signals are bypassed to avoid lost clock signal sync. Once the ESD event is done, the controller notifies the host to restart the reference clock signal and resume clock signal sync.

Abstract: The present disclosure generally relates to magnetoresistive (MR) devices. The MR device comprises a synthetic antiferromagnetic (SAF) layer that increases exchange coupling field, and in turn, less magnetic noise of such devices. The MR device comprises a first ferromagnetic (FM1) layer and a second ferromagnetic (FM2) layer, in between which is an SAF spacer of RuAl alloy having a B2 crystalline structure which may grow epitaxial on BCC (110) or FCC (111) textures, meaning that the (110) or (111) plane is parallel to the surface of MR device substrate. Further, amorphous layers may be inserted into the device structure to reset the growth texture of the device to a (001), (110), or (111) texture in order to promote the growth of tunneling barrier layers or antiferromagnetic (AF) pinning layers.

Abstract: The present disclosure generally relates to a magnetic recording system comprising a magnetic recording head. The magnetic recording head comprises a main pole, a shield, and a spintronic device disposed between the main pole and the shield. The spintronic device comprises a field generation layer (FGL) spaced a distance of about 2 nm to about 3 nm from the main pole, a first spacer layer disposed on the FGL, a spin torque layer (STL) disposed on the first spacer layer, a second spacer layer disposed on the STL, and a negative polarization layer (NPL) disposed between the second spacer layer and the shield. The spintronic device has a length of about 17 nm to about 21. During operation, the STL has a magnetization precession of about 16 degrees to about 170 degrees, and the FGL has a magnetization precession of about 60 degrees to about 70 degrees.

Abstract: Methods and apparatus for precise power cycle management in data storage devices are provided. One such apparatus is a data storage device that includes a non-volatile memory (NVM) and a processor coupled to the NVM. In such case, the processor is configured to determine a first peak power for a first power phase, operate the DSD at a first DSD power consumption that is less than the first peak power for the first power phase, determine a second peak power for a second power phase based on a residual power equal to a difference between a preselected average power threshold and the first DSD power consumption, and operate the DSD at a second DSD power consumption that is less than the second peak power for the second power phase.

Abstract: A key-value storage device may perform an integrity check on a key and/or a value in a key-value pair, prior to transmitting the value from a memory device to a requestor. When the storage device receives a write command to store the value in the memory device, a processor in the storage device may generate authentication data from the key and/or the value in the write command. The processor may store the authentication data and the value in the memory device. When the processor later receives a read command to retrieve the value from the memory device, the processor may perform the integrity check on the key and/or the value using the authentication data.

Abstract: In order to guarantee data validity of data read from a memory device of the data storage device to a host device, a controller of the data storage device may calculate a cyclic redundancy code (CRC) signature of the decoded data and compare the CRC signature of the decoded data with a CRC signature of the data. The CRC signature of the data is generated during a write operation of the data to the memory device. Rather than returning an uncorrectable error correction code error (UECC) error to the host device when the CRC signature of the decoded data does not match the CRC signature of the data, the controller executes the read command again. By using a different buffer to store the decoded data, the controller may confirm whether the error stemmed from the read path or the error was not from the read path.

Abstract: During data storage device operation, data of multiple blocks of a non-volatile memory device, logically grouped as a jumboblock, may be protected by an exclusive or (XOR) signature, where the XOR signature may be used to recover data of a block of the multiple blocks. During a recovery/relocation operation, data of the jumboblock is read from the non-volatile memory device during the recovery of the lost data and again when the data is relocated. However, because the data read during data storage device operation is temporarily stored in a volatile memory device, the controller utilizes the relevant data stored in the volatile memory device and the data stored in the non-volatile memory device to recover corrupted data. Thus, the amount of reads from the non-volatile memory device decreases due to the relevant data is read from the volatile memory device, which may improve data storage device performance.

Abstract: A data storage device includes a laser diode that heats an area of a disk near the read/write head. To mitigate mode hopping, the laser diode is preheated using the laser diode itself, such as by applying a reverse bias to the laser diode, during an interruption in writing of data to the disk. The laser diode is preheated to a temperature that maintains operation of the laser diode within a middle portion of a preselected gain mode and away from abrupt shifts in gain modes.

Abstract: Systems, methods, and data storage devices for using data storage device operational profiles for interface-based performance leveling are described. Data storage devices are connected to a virtual storage manager using network or storage bus connections. Comparisons of the data processing speed and interface speed of each data storage device and its connection may be used to determine an active device operational profile for each data storage device to reach a target aggregate performance. The device operational profiles may be sent to the data storage devices to change their operations, such as the handling of background processes.

Abstract: A disk drive may include a disk, a head actuated over the disk, a spindle motor comprising a plurality of windings and operable to rotate the disk and coupled to a first and a second spindle driver, the first and the second spindle driver coupled in parallel to the plurality of windings. The disk drive further includes one or more processing devices that are configured to detect a BEMF signal corresponding to a velocity and/or a position of the spindle motor, control, based on detecting the BEMF signal, commutation of the plurality of windings of the spindle motor using the first and the second spindle driver, and wherein the plurality of windings are commutated at or near the same time or in a sequential manner during one or more of a spin up and a spin down routine of the spindle motor.

Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.

Abstract: The present disclosure generally relates to a bismuth antimony (BiSb) based STO (spin torque oscillator) sensor. The STO sensor comprises a SOT device and a magnetic tunnel junction (MTJ) structure. By utilizing a BiSb layer within the SOT device, a larger spin Hall angle (SHA) can be achieved, thereby improving the efficiency and reliability of the STO sensor.

Abstract: The present disclosure generally relates to a dual free layer (DFL) read head and methods of forming thereof. In one embodiment, a method of forming a DFL read head comprises depositing a DFL sensor, defining a stripe height of the DFL sensor, depositing a rear bias (RB) adjacent to the DFL sensor, defining a track width of the DFL sensor and the RB, and depositing synthetic antiferromagnetic (SAF) soft bias (SB) side shields adjacent to the DFL sensor. In another embodiment, a method of forming a DFL read head comprises depositing a DFL sensor, defining a track width of the DFL sensor, depositing SAF SB side shields adjacent to the DFL sensor, defining a stripe height of the DFL sensor and the SAF SB side shield, depositing a RB adjacent to the DFL sensor and the SAF SB side shield, and defining a track width of the RB.

Abstract: Some data storage devices select blocks of memory from a free block pool and randomly allocate the blocks as primary and secondary blocks to redundantly store data in a write operation. However, some blocks, such as blocks on the edge of a plane, may not serve well as primary blocks. One example data storage device presented herein addresses this problem by allocating such blocks as secondary blocks instead of primary blocks.

Abstract: A data storage device may include a media comprising a magnetic recording layer and a heat-assisted magnetic recording (HAMR) head for writing to the magnetic recording layer, the HAMR head comprising: a waveguide, a main pole comprising a main-pole surface facing the magnetic recording layer, a near-field transducer (NFT) situated between the main pole and the waveguide, and a transparent overcoat. The NFT comprises a main body and a micropillar. The micropillar comprises a micropillar surface facing the magnetic recording layer. A first distance between the micropillar surface and the media is less than a second distance between the main-pole surface and the media. The transparent overcoat is situated on the main-pole surface and the micropillar surface.