Abstract: Zoom motor noise in a camera audio recording is reduced by detecting activity of the zoom motor, transforming a audio signal into the frequency domain during zoom motor activity, and scaling the frequency domain signal during zoom motor activity in each of a series of frequency bins by a scaling factor derived from a pre-stored zoom motor noise spectrum to produce a processed audio signal in the frequency domain. The processed audio signal is then transformed back to the time domain.

Abstract: Disclosed is a non-linear echo canceller and method for cancelling echo during full duplex communication in a hands free communication system. An input signal from a far-end talker and an input signal from the output from an echo canceller are received. K spectral subbands are created for each input signal. The spectral echo residual power at each subband is estimated and compared to a clean signal power to calculate a signal to echo ratio. Gains are calculated based on each calculated ratio and non-linear echo is cancelled based on the calculated gains.

Abstract: A method of reducing noise in a speech signal involves converting the speech signal to the frequency domain using a fast fourier transform (FFT), creating a subset of selected spectral subbands, determining the appropriate gain for each subband, and interpolating the gains to match the number of FFT points. The converted speech signal is then filtered using the interpolated gains as filter coefficients, and an inverse FFT performed on the processed signal to recover the time domain output signal.

Abstract: To perform timing synchronization in an asynchronous packet network, remote timestamps representative of a transmitter clock at a transmitter are received over a packet network. These are compared with local timestamps representative of the timing of a local oscillator at the receiver to produce an estimate of the offset between the transmitter clock and the local oscillator at the receiver. This estimate is then used to generate update values for a digital controlled oscillator producing the output clock at the receiver. The system operates in a feedforward configuration wherein the local oscillator at the receiver serves as one input to the offset estimator.

Abstract: A method of recovering timing information in a packet network, involves detecting quiet periods in the packet network when network packet delay variation (PDV) is low. A frequency prediction unit is trained during the quiet periods to learn output clock variations of a timing recovery unit to permit the frequency prediction unit to predict frequency update values for a local oscillator during non quiet periods taking into account the historical output clock variations during quiet periods. The output of the frequency prediction unit is used as the active frequency update values during non quiet periods.

Abstract: A phase locked loop includes a digital controlled oscillator and a number of phase detectors, each having a first input connected to a reference source and a second input coupled to the output of the digital controlled oscillator, and an output for producing a phase error signal. A loop filter coupled to the output of each phase detector has an output and a feedback input. An adjustment unit for derives an adjustment signal for the digital controlled oscillator from one or more of the loop filters by selecting or combining output signals from the loop filters taking into account the stability of said reference sources. The adjustment signal for the digital controlled oscillator produced by the adjustment unit is coupled to each of the feedback inputs of the loop filters. This arrangement results in hitless reference switching.

Abstract: To reduce noise in an input signal that may contain speech, first an estimate of the noise level in the signal is obtained. The level of the input signal is then compared with the noise level estimate signal to determine whether speech is dominant. Less aggressive noise reduction is applied to the input signal when speech is dominant than when only noise is present.

Abstract: Disclosed is a method of reducing clicking sounds in an audio data stream. The samples of the audio data are delayed by a predetermined amount in a sliding window containing a predetermined number of samples. The presence of a clicking sound in the delayed data within said sliding window is detected and the corresponding audio data replaced by substitute data derived from the audio data stream.

Abstract: A telephone subscriber line device for providing an interface between a legacy telephone circuit based on circuit-switched technology and a packet network has a legacy interface for connection to telephone circuit; a packet interface for connection to a packet network, processing circuitry for converting between legacy telephone signals and packet signals, and a cascadable expansion bus permitting multiple said devices to be connected to a common port on a packet network. Such a device is highly scalable.

Abstract: In a method of recovering timing information over packet networks, a receiver receives a plurality of packet streams over different paths from the same source. The raw delays experienced by the timing packets for each stream are filtered to provide a filtered delay for each stream. The filtered delays are weighted based on the quality of each stream, and the weighted filtered delays are then combined to form an aggregate delay estimate. Frequency adjustments for a local clock at the receiver are derived from the aggregate delay estimate.

Abstract: A method of saving power in a digital circuit driven by a clock running at a rate R, comprising reducing said rate R to a lower rate R? during periods when said digital circuit is operating at a capacity less than its maximum capacity, and wherein the change from rate R to rate R? is carried out as a smooth transition.

Abstract: In a method of recovering timing information over packet networks, raw network delays are measured using timing packets sent between a transmitter and receiver. The expected delay is predicted using a minimum statistics adaptive filter to track local minima of measured time delays over a smoothing window. Only those incoming timing packets which meet a particular criterion relative to the expected delay within a smoothing window are selected, and a local clock is adjusted based on the measured timing delays from the selected timing packets.

Abstract: A digital phase locked loop has a digital controlled oscillator, a feedback loop coupled to the output of said digital controlled oscillator, a phase detector for comparing a feedback signal from said feedback loop with a reference signal to produce a phase error signal, and a low pass filter for filtering the phase error signal for controlling said digital controlled oscillator. A bandwidth calculation unit calculates the required filter bandwidth based on the phase error. The bandwidth calculation unit then controls the bandwidth of said low pass filter, which is thus adaptively adjusted in accordance with the phase error.

Abstract: In a method of recovering timing information over a packet network at a local receiver, timing information is received at intervals timing from a remote source and compared with a locally generated clock signal to generate an input signal y(k) subject to noise representative of the phase difference between the source clock signal and the local receiver clock signal. The input signal is applied to a state feedback controller, preferably including a Kalman filter, to generate a control signal with reduced noise. The control signal is used to control an oscillator in a way so as to reduce the phase difference and generate a slave clock.

Abstract: A method is disclosed for recovering timing information between master and slave nodes interconnected over a packet network having an underlying time grid with a distinct granularity. A series timing packets are exchanged between said master and slave nodes to measure the time offset of the time grid relative to clocks at the master and slave clocks. This offset is then used to either adjust the local clock at the slave node, or generate the clock using a digital controlled oscillator.

Abstract: A phase locked loop includes a digital controlled oscillator and a number of phase detectors, each having a first input connected to a reference source and a second input coupled to the output of the digital controlled oscillator, and an output for producing a phase error signal. A loop filter coupled to the output of each phase detector has an output and a feedback input. An adjustment unit for derives an adjustment signal for the digital controlled oscillator from one or more of the loop filters by selecting or combining output signals from the loop filters taking into account the stability of said reference sources. The adjustment signal for the digital controlled oscillator produced by the adjustment unit is coupled to each of the feedback inputs of the loop filters. This arrangement results in hitless reference switching.

Abstract: A frequency synthesizer includes a first clock running at a frequency fCLK1, a second clock running at a frequency fCLK2, wherein frequency fCLK2 is higher than frequency fCLK1, the frequencies having a fixed ratio QFB=fCLK2/fCLK1; and a counter driven by the first clock. A decoder for produces QFB output values in parallel for each cycle of the first clock, and parallel-serial converter serially outputs these QFB output values at the frequency of the second clock.

Abstract: Timing information is transmitted over a network by sending time-stamped packets between a transmitter and receiver. The time-stamped packets are used to compute an estimate of the frequency deviation between the transmitter clock and the receiver clock. The local receiver clock is periodically updated to match the transmitter clock based on the estimate, which is preferably a least squares estimate. A multiple window approach is employed to increase update speed.

Abstract: A method and a TDM digital switch are provided for switching data at a variety of data rates. Input streams having a data rate less than the maximum data rate of the switch are grouped and multiplexed to form multiplexed streams carrying data at the maximum data rate. A switching state machine switches the data from each input stream to form grouped output streams comprising multiplexed output streams, each grouped output stream carrying data at the maximum data rate. The grouped output streams are demultiplexed, and the output streams transmitted through respective output shift registers. The method and TDM digital switch allow streams with programmable data rates to be switched while still maximizing use of resources, including memory, within the switch.

Abstract: A digital phase locked loop includes a phase acquisition unit for producing a digital representation of the phase of a reference signal, a digital phase detector having a first input receiving a digital signal from, or derived from, the output of the phase acquisition unit, digital loop filter filtering the output of the digital phase detector, and a digital controlled oscillator generating an output signal under the control of the digital loop filter. A digital feedback loop provides a second input to the digital phase detector from the output of the digital controlled oscillator.