Abstract: A display device is provided. The display device includes a display panel including a pixel array including pixels arranged in a plurality of row lines and including a plurality of inorganic light-emitting elements, and sub-pixel circuits corresponding to inorganic light-emitting elements 120 of the pixel array, and a driver configured to set an image data voltage corresponding to an image frame in units of the plurality of row lines in the sub-pixel circuits, set a reset voltage in units of the plurality of row lines in an anode terminal of the inorganic light-emitting elements, and drive the sub-pixel circuits so that the inorganic light-emitting elements emit light based on the set image data voltage and reset voltage.

Abstract: A multilayer electronic component according to an example embodiment of the present disclosure may include: a body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction, and including first and second surfaces opposing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction; side margin portions disposed on the fifth and sixth surfaces; and external electrodes disposed on the third and fourth surfaces, wherein at least one of both ends of the internal electrodes in the third direction may be spaced apart from the side margin portion.

Abstract: A pixel includes a first transistor to output a current supplied to a light-emitting device, a second transistor electrically connected between a gate of the first transistor and a first terminal of the first transistor, a third transistor electrically connected between the first voltage line and a second terminal of the first transistor, a fourth transistor electrically connected between the first terminal of the first transistor and the light-emitting device, and a fifth transistor configured to supply a bias voltage to the second terminal of the first transistor. A gate-on voltage may be supplied to a gate of the fifth transistor during a portion of a period during which a gate-off voltage may be supplied to a gate of the third transistor and a gate of the fourth transistor.

Abstract: A multilayer electronic component includes a body including a dielectric layer and an internal electrode layer alternately disposed with the dielectric layer in a first direction, wherein the internal electrode layer includes a main portion, a lead portion extending from the main portion to the external electrode and having a size smaller than the main portion, and a reinforcing pattern disposed on both sides of the lead portion, and the reinforcing pattern includes a carbide.

Abstract: A semiconductor package includes a cover layer including a first surface contacting a lower chip structure and a second surface opposite to the first surface. The lower chip structure includes one or more stacked chips. The one or more stacked chips contact the first surface of the cover layer and include an upper surface having groove. The cover layer includes convex portions on the first surface that fill the grooves, and one or more concave portions on the second surface that are aligned on one or more convex portions.

Abstract: A multilayer electronic component may include: a body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer; an interface plating layer disposed on an end of the internal electrode; and an external electrode disposed to contact at least a portion of an end of the dielectric layer disposed between the internal electrodes and to cover the interface plating layer, and including a conductive resin layer including a conductive metal and a resin.

Abstract: A system for evaluating a display device includes a display device including a display panel outputting images for a plurality of viewpoints and a lens array refracting the images; and a viewing angle meter disposed on a measuring point of the display device and extracting a viewing angle for each of the plurality of viewpoints. The viewing angle meter determines an optimal viewing coordinates of refracted images corresponding to each of the plurality of viewpoints based on the viewing angle.

Abstract: An operation method of a data filtering module configured to communicate with a multi-speaker application module, includes: receiving a plurality of communication data from a plurality of external devices; generating filtered voice data from the plurality of communication data based on a filtering priority determined based on a number of voice data included in the plurality of communication data; and providing the filtered voice data to the multi-speaker application module.

Abstract: An operating method of a wireless communication device, the method including generating an IQ compensation value by performing IQ mismatch compensation on a first input signal using a linearity calibration model, the linearity calibration model being based on a neural network, generating a pre-distortion value by performing pre-distortion on the first input signal using the linearity calibration model, generating a first calibration signal based on the IQ compensation value and the pre-distortion value, generating a calibrated first output signal by amplifying the first calibration signal based on an amplification coefficient, and training the linearity calibration model based on the first input signal and the calibrated first output signal.

Abstract: An authority authentication system includes an electronic device configured to generate a first unique asymmetric key pair, including a first public key and a first private key, a certificate authority server configured to generate a unique asymmetric key certificate and a unique certificate chain, and inject the unique certificate chain into the electronic device, at least one owner terminal device configured to request authority authentication from the electronic device based on at least one owner certificates and at least one owner key pair corresponding to the at least one owner terminal device, the at least one owner key pair including at least one public owner key and at least one private owner key, a communication network including a secure communication channel configured to transmit and receive the at least one owner certificate and the at least one public owner key.

Abstract: A method for generating a proximity correction model which is performed by a computing system is provided. The method comprises acquiring a plurality of shot images on a wafer after performing a first process using a first layout, generating an overlap image obtained by overlap of the plurality of shot images, and performing machine learning on the proximity correction model, using an image of the first layout and the overlap image.

Abstract: Provided is a semiconductor device and method of manufacturing same, the semiconductor device including: a substrate; an interlayer insulating layer on the substrate; an upper wiring trench in the interlayer insulating layer; an upper wiring layer including an upper wiring barrier layer along a sidewall of the upper wiring trench and a bottom surface of the upper wiring trench, and an upper wiring filling layer on the upper wiring barrier layer, wherein the upper wiring filling layer fills an inside of the upper wiring trench; and a first etching stop layer on each of an upper surface of the interlayer insulating layer and an upper surface of the upper wiring layer, the first etching stop layer including: a first portion in contact with an upper surface of the upper wiring filling layer; a second portion in contact with an upper surface of the upper wiring barrier layer; and a third portion in contact with the upper surface of the interlayer insulating layer, wherein a percentage of nitrogen (N) in the first

Abstract: Provided is a semiconductor device which may include: a plurality of gate structures arranged at a predetermined gate pitch in a 1st direction and extended in a 2nd direction; and a plurality of metal lines arranged at two or more different metal pitches in the 1st direction and extended in the 2nd direction at a same level in a 3rd direction.

Abstract: A semiconductor package includes a first redistribution structure including upper pads; a semiconductor chip disposed on the first redistribution structure; an encapsulant on the first redistribution structure and surrounding the semiconductor chip; a second redistribution structure disposed on the encapsulant and including an upper redistribution layer; a plurality of posts penetrating the encapsulant and electrically connecting the upper pads of the first redistribution structure to the upper redistribution layer of the second redistribution structure; metal layers between the upper pads and the plurality of posts and having an upper surface having a first step difference with an upper surface of an edge of the upper pads; and a seed layer between the metal layers and the plurality of posts.

Abstract: A semiconductor memory device includes a stacked structure on a substrate and a vertical structure penetrating the stacked structure. The stacked structured includes a plurality of conductive lines stacked on the substrate. The vertical structure may include a vertical insulating pattern and a channel film extending along sidewalls of the vertical insulating pattern. The vertical insulating pattern may include an inner region and an outer region. The outer region of the vertical insulating pattern may be placed between the channel film and the inner region of the vertical insulating pattern, and the outer region of the vertical insulating pattern may include a diffused metal.

Abstract: A semiconductor device includes a substrate; an interlayer insulating layer disposed on the substrate; an upper wiring trench disposed in the interlayer insulating layer; and an upper wiring layer including: an upper wiring barrier layer disposed along a sidewall and a bottom surface of the upper wiring trench, an upper wiring filling layer disposed on the upper wiring barrier layer so as to fill at least a portion of an inside of the upper wiring trench, and an upper wiring capping layer disposed on an upper surface of the upper wiring filling layer, wherein the upper wiring capping layer includes cobalt (Co), and wherein a volume percentage of a crystal structure having a hexagonal close-packed structure included in the upper wiring capping layer is in a range of about 80% to about 100%.

Abstract: A lithium ion conductor according to the present disclosure includes a Li element, a B element, an O element, an M element, and an X element and has a peak due to a main crystal phase at diffraction angles (2?) of 24.5° to 26°, 32° to 34°, 35.5° to 36.2°, 37.5° to 38.5°, 43.5° to 45.5°, or a combination thereof in an X-ray diffraction analysis spectrum using a CuK? ray. The M element is Al, Si, Ge, P, or a combination thereof, and the X element is F, Cl, I, Br, or a combination thereof as a halogen element.

Abstract: A printed circuit board includes a substrate; first and second through-portions penetrating between upper and lower surfaces of the substrate; a magnetic layer disposed in the first through-portion; a voltage regulator disposed in the second through-portion; a first through-hole penetrating between upper and lower surfaces of the magnetic layer; a first insulating layer disposed on the substrate, covering the magnetic layer and the voltage regulator, and filling the second through-portion and the first through-hole; a second through-hole penetrating between upper and lower surfaces of the first insulating layer in the first through-hole; a first wiring pattern disposed on an upper surface of the magnetic layer; a second wiring pattern disposed on a lower surface of the magnetic layer; and a first via pattern disposed in the second through-hole and connecting the first and second wiring patterns to each other.

Abstract: A semiconductor package includes a first semiconductor chip including a semiconductor substrate having an active surface and an inactive surface, a device layer on the active surface, first chip pads on the device layer, and a first through-electrode and a second through-electrode, where the first through-electrode and the second through-electrode penetrate the semiconductor substrate, at least one of the first chip pads is connected to the first through-electrode and at least one of the first chip pads is connected to the second through-electrode, a redistribution structure including a redistribution layer on the inactive surface of the semiconductor substrate and a redistribution via connected to the redistribution layer, contact pads on an upper surface of the redistribution structure, and a second semiconductor chip on the redistribution structure and including second chip pads connected to the contact pads.

Abstract: A method of fabricating a semiconductor device includes forming a dielectric layer on a lower structure. The method includes forming an opening to penetrate through the dielectric layer. The method includes alternately repeating a first operation, in which a first sputtering deposition process is performed to form a first metal pattern in the opening, and a second operation, in which a second sputtering deposition process is performed to form a second metal pattern in the opening, two or more times to form a first metal layer. The method includes forming a second metal layer on the first metal layer in an electroplating manner, and planarizing the first and second metal layers. Moreover, first and second process times, during which the first sputtering deposition process and the second sputtering deposition process, respectively, are performed, are each about five seconds or less.

Abstract: Provided is an electronic device including: a first housing; a second housing movably connected to the first housing; a support plate comprising a flexible region, the flexible region comprising a plurality of flexible portions and a plurality of rigid portions integrally formed with the flexible portions; and a display supported by the support plate. Each of the flexible portions comprises a plurality of slits. A first width of at least one of the plurality of slits is wider than a second width of at least one of the plurality of slits. The first width of the at least one of the plurality of slits corresponds a first side of the plurality of slits closer to the display. The second width of the at least one of the plurality of slits corresponds to a second side of the plurality of slits opposite to the first side.

Abstract: A semiconductor package may include a chip stack, a first semiconductor chip provided on a top surface of the chip stack, outer terminals provided on a bottom surface of the chip stack, and a mold layer provided on a bottom surface of the first semiconductor chip to enclose the chip stack. The chip stack may include a second semiconductor chip including first penetration vias, which are provided in second semiconductor chip and are exposed to an outside of the second semiconductor chip. The chip stack may include third semiconductor chips stacked on a top surface of the second semiconductor chip. Each of the third semiconductor chips may include second penetration vias, which are provided to penetrate the same and are exposed to an outside of the same. The first semiconductor chip may have a width larger than the chip stack, and the first semiconductor chip may include a logic chip.

Abstract: A semiconductor device includes a substrate, source/drain regions on the substrate, a channel layer between the source/drain regions and including indium gallium zinc oxide (IGZO), a variable resistance layer on the channel layer and including metal oxide that satisfies a stoichiometric ratio of metal to oxygen, a gate insulating layer on the variable resistance layer and including metal oxide that does not satisfy the stoichiometric ratio of metal to oxygen, and a gate electrode on the gate insulating layer.

Abstract: A negative electrode for a rechargeable lithium battery and a rechargeable lithium battery including the same, the negative electrode including a current collector; and a negative electrode active material layer located on the current collector and including a negative electrode active material. The negative electrode active material includes a silicon-based composite, the silicon-based composite is a composite of a silicon-based active material, a phenoxy resin, and carbon nanotubes, and a weight ratio of the silicon-based active material and the carbon nanotubes ranges from about 1:0.0013 to about 1:0.01.

Abstract: A semiconductor package includes a base substrate including a lower surface; a semiconductor chip on the base substrate; and a plurality of connection bumps on the lower surface of the base substrate, wherein the plurality of connection bumps includes a first group including connection bumps arranged on the lower surface in a first direction, and a second group including connection bumps arranged on the lower surface in a second direction, the second direction having a first angle with respect to the first direction, the connection bumps of the first group are offset from each other in the first direction, and the connection bumps of the second group are offset from each other in the second direction.

Abstract: A circuit configured to detect a threshold voltage includes a first delay circuit, a second delay circuit and a controller. The first delay circuit has a first sensitivity to threshold voltage of a transistor. The first delay circuit may be configured to generate a first output signal delayed with respect to the input signal by a first delay time that changes depending on the digital control code. The second delay circuit has a second sensitivity that is higher than the first sensitivity. The second delay circuit may be configured to generate a second output signal delayed with respect to the input signal by a second delay time. The controller may compare the first and second output signals and may generate a digital output code corresponding to the digital control code when the first delay time is equal to the second delay time to indicate the threshold voltage of the transistor.

Abstract: A single-slope analog-digital (AD) conversion circuit for performing AD conversion on a pixel signal includes a plurality of comparators configured to receive a plurality of pixel signals and a ramp signal, a count pulse controller configured to generate a counter input signal for counting an average value or a weighted average value of the plurality of pixel signals from a clock signal, based on outputs of the plurality of comparators, and a counter configured to count the average value or the weighted average value of the plurality of pixel signals based on the counter input signal.

Abstract: A power control method of a power control device, includes: rectifying, by a rectifier, an input current of a system including the power control device; sensing, by a current sensor, a first current through a first switch and a second current through a second switch, wherein the first switch and the second switch are connected to an output of the rectifier; filtering the sensed first current and the sensed second current through a low pass filter; sampling, by a processor, the filtered first current and the filtered second current once per switching cycles of the first switch and the second switch; and performing balancing control based on the sampled first current and the sampled second current such that an average value of the first current through the first switch and the second current through the second switch is uniform or is substantially uniform for a period.

Abstract: A circuit board including a substrate having a first surface and a second surface facing each other, including an insulating layer disposed between the first surface and the second surface, and having a cavity penetrating in a direction perpendicular to the first surface, a first wiring pattern embedded in the insulating layer on the first surface to enable signal transmission, and a first reinforcement pattern embedded in the insulating layer on the first surface, disposed around the cavity to be spaced apart from an edge of the cavity, and configured to be separated from the first wiring pattern.

Abstract: A radio frequency (RF) switch circuit and a method for operation of a RF switch circuit. The RF switch circuit may include a first switch connected between a first port and an antenna port, a second switch connected between a second port and the antenna port, a third switch connected between the antenna port and ground, a fourth switch connected between the antenna port and the ground, and a switch control circuit configured to control the first switch, the second switch, and the third switch to be turned off and the fourth switch to be turned on in a low power mode.

Abstract: A circuit board according to the present disclosure includes: a substrate including a first insulating layer with a first surface, and a cavity penetrating the first insulating layer in a direction perpendicular to the first surface; a first wiring layer embedded in the first insulating layer and having at least one surface exposed from the first insulating layer; and a buffer portion disposed adjacent to an edge of the cavity in the first insulating layer and having a receiving surface retreated further from the exposed surface of the first wiring layer. An electronic device package according to the present disclosure includes: an electronic device accommodated in a cavity of the circuit board; an insulation material disposed on the buffer portion to fill and insulate between the electronic device and the first wiring layer; and a redistribution layer disposed on the first surface of the first insulating layer and to which the electronic device is connected.

Abstract: A first electronic device includes: a first transceiver; a first memory storing at least one instruction; and a first processor operatively connected to the first transceiver and the first memory, the first processor being configured to execute the at least one instruction to: transmit, to at least one second electronic device, a non-high-efficiency (non-HE) announcement frame, and transmit, to the at least one second electronic device, a downlink (DL) multi-user (MU) extension (Ext) physical layer protocol (PPDU), wherein the DL MU Ext PPDU includes: a non-HE PPDU and a HE PPDU.

Abstract: An induction heating device including a first burner; a first working coil for the first burner; a second burner; a second working coil for the second burner; an inverter including a plurality of switches, the plurality of switches being configured to perform switching so that a current flows through the first working coil and the second working coil; and a processor configured to control the switching by the plurality of switches so that the first working coil has a first operating frequency due to an inductance value of the first working coil and the current flowing through the first working coil, the second working coil has a second operating frequency due to an inductance value of the second working coil and the current flowing through the second working coil, and the first operating frequency differs from the second operating frequency by a predetermined frequency value or more.

Abstract: An electronic device including a projector; a memory storing at least one instruction, and at least one processor configured to execute the at least one instruction stored in the memory to receive a selection of first projection information from among at least one piece of projection information included in a projection information list, wherein each piece of the at least one piece of projection information includes a projection location, which corresponds to a position of the projector, and a projection purpose, adjust a projection direction of the projector to the first projection location, and control the projector to project, from the first projection location, first content corresponding to the first projection purpose.

Abstract: According to an embodiment, an electronic device may comprise a communication circuit and at least one processor operatively connected to the communication circuit, wherein the at least one processor may be configured to: configure a communication link with at least one external electronic device via the communication circuit; identify the quality of the communication link; on the basis that the quality of the communication link is lower than a threshold quality, discard at least one of packets to be transmitted for a configured time interval in the communication link; and transmit a packet indicating the at least one packet being discarded to the at least one external electronic device via the communication circuit. Other embodiments may be possible.

Abstract: A ramp signal generator includes a resistor connected between an output node outputting a ramp signal that increases or decreases at a constant slope and a first power node which receives a first power voltage, and plural current cells. A cell current flows through each of the current cells to the first power node or the resistor. The current cells include a first current cell. The first current cell includes a first transistor connected between a first switching node and the output node, the cell current flowing to the resistor through the first transistor, a second transistor connected between the first switching node and the first power node, the cell current flowing to the first power node through the second transistor, and a negative feedback circuit that maintains a constant voltage at the first switching node.

Abstract: A laser processing apparatus according to an exemplary embodiment includes: a light source generating a laser beam; and a light converging unit converging the laser beam to a focal point on an object to be processed, wherein the light converging unit includes a first optical element including a through hole penetrating the first optical element; a second optical element including a first region reflecting the laser beam and a second region transmitting the laser beam; and a third optical element including a focusing lens as a convex lens, a lower surface of the first optical element is a concave mirror, and an upper surface of the second optical element is convex and a lower surface thereof is concave.

Abstract: An inkjet printing apparatus includes a surface acoustic wave module including an inner passage and a surface acoustic wave generator around the inner passage; and an outflow passage connected to the surface acoustic wave module to discharge ink, where the outflow passage includes a first outflow passage connected to the inner passage to discharge first ink particles and a second outflow passage connected to the inner passage to discharge second ink particles having an average diameter smaller than that of the first ink particles, and the surface acoustic wave generator is closer to the second outflow passage than the first outflow passage.

Abstract: Disclosed are an electronic device for providing contact pressure information and a method for controlling the electronic device. According to an embodiment, an electronic device comprises: a display, a camera, a communication circuit, and at least one processor configured to: control the communication circuit to establish a communication channel with an external electronic device via the communication circuit, obtain data for a contact pressure value from the external electronic device via the established communication channel, and output information related to the contact pressure value via the display using the obtained data for the contact pressure value.

Abstract: The present disclosure relates to an electrostatic charger and an electrostatic precipitator securing a wide space for charging suspended fine particles contained in a processing airflow. The electrostatic charger includes a discharge electrode formed of a plurality of fibrous conductors and provided to generate and diffuse ions by a discharge, a ground electrode maintained at a ground potential and provided to attract the ions generated and diffused by the discharge electrode to charge suspended fine particles contained in a processing airflow by the ions, where the discharge electrode is disposed between the ground electrodes in the processing airflow, and all or at least a part of the plurality of fibrous conductors of the discharge electrode are disposed on a downstream side of the processing airflow further than an end portion of the ground electrode on the most upstream side of the processing airflow.

Abstract: A clothes-treating apparatus includes: a housing including an accommodating space to accommodate clothes therein; and a plurality of air conditioning modules provided inside the housing and different in an air conditioning function from each other, wherein each of the plurality of air conditioning modules is provided to be switched over between an exposing status in which the air conditioning function is activated and a blocking status in which the air conditioning function is inactivated, and a first air conditioning module among the plurality of air conditioning modules is in the exposing status while a second air conditioning module is in the blocking status. Thus, the clothes-treating apparatus prevents the air conditioning functions of the plurality of air conditioning modules from being offset by each other, thereby improving the effects of the air conditioning functions and extending the life of each air conditioning module.

Abstract: A system for and a method of analyzing a corneal lesion using an anterior segment image according to the present invention. The system includes: an image acquisition unit configured to acquire an anterior segment image from the eyeball of a subject, a feature extractor configured to extract feature information on a position and a cause of a lesion in the cornea from the anterior segment image by applying a convolution layer to the anterior segment image through machine learning on the basis of a database in which clinical information pre-acquired by analyzing positions and causes of lesions in the corneas of subjects is stored; and a result determination unit configured to identify a position of the cornea from the anterior segment image using the feature information and to analyze and determine the position and the cause of the lesion in the cornea from the position of the cornea.

Abstract: An exercise assist method includes receiving a user input signal comprising exercise setting information from an external device; measuring, based on the user input signal, a joint angle of a hip joint of a user wearing an exercise assist device configured to assist a user in performing a leg movement; and controlling torque of the exercise assist device to be applied to a leg of the user based on the measured joint angle and the exercise setting information.

Abstract: A display device includes a display unit including a first surface emitting first light, a second surface opposite to the first surface, a first transmission area transmitting light incident on the first surface, and a second transmission area transmitting the light incident on the first surface. The display device includes a first lens on the first surface and including a first hole overlapping the first transmission area in a thickness direction, a second lens on the first surface and spaced apart from the first lens and including a second hole overlapping the second transmission area in the thickness direction, and light sources emitting second light and disposed on the first and second lenses. The display device includes a first camera sensor on the second surface and overlapping the first transmission area, and a second camera sensor on the second surface and overlapping the second transmission area.

Abstract: A foldable display device includes a display panel which includes a folding area, a first non-folding area disposed adjacent to a first side of the folding area, and a second non-folding area disposed adjacent to a second side of the folding area opposite to the first side of the folding area, and a panel support member which is disposed on a surface of the display panel and in which a plurality of slits extending in a first direction is defined. The panel support member includes a first layer which has a first fiber yarn extending in a second direction intersecting the first direction, a second layer which has a second fiber yarn extending in the first direction, and a third layer which has a third fiber yarn extending in the second direction.

Abstract: A ternary paraelectric having a Cc structure and a method of manufacturing the same are provided. The ternary paraelectric having a Cc structure includes a material having a chemical formula of A2B4O11 that has a monoclinic system, is a space group No. 9, and has a dielectric constant of 150 to 250, wherein “A” is a Group 1 element, and “B” is a Group 5 element. “A” may include one of Na, K, Li and Rb. “B” may include one of Nb, V, and Ta. The A2B4O11 material may be Na2Nb4O11 in which bandgap energy thereof is greater than that of STO. The A2B4O11 material may have relative density that is greater than 90% or more.

Abstract: A system-on-chip is provided. The SoC includes a system power supply circuit which outputs a first supply voltage, an intellectual property (IP) which receives the first supply voltage and operates at a second supply voltage, a supplemental power supply circuit which generates a supplemental voltage; and a comparator which compares the first supply voltage with the second supply voltage and outputs a comparison signal, wherein the supplemental voltage is provided to the IP based on the comparison signal.

Abstract: A ventilation system including a ventilator and a processor. The ventilator includes a housing, first intake, second intake, first outlet, second outlet, dampers, first air blower, second air blower, total heat exchanger, and heat exchanger. The processor is configured to change the air flow path of air flowing through the housing from an intake flow path and discharge flow path while in a ventilation mode to a heat exchanger cleaning mode or a total heat exchanger drying mode, in which air in the room flows into the housing through the first outlet, passes through the heat exchanger and then the total heat exchanger, and is discharged to the space outside the room through the second outlet.

Abstract: Provided are a polarizing plate and an optical display device comprising same, the polarizing plate comprising: a polarizer; and a first phase difference layer, a second phase difference layer and a third phase difference layer which are sequentially stacked on the lower surface of the polarizer. The first phase difference layer comprises a positive C phase difference layer. The second phase difference layer has positive wavelength dispersibility and an in-plane phase difference of approximately 200 nm to 280 nm in a wavelength of 550 nm. The third phase difference layer has positive wavelength dispersibility and an in-plane phase difference of approximately 80 nm to 145 nm in a wavelength of 550 nm.