Patents Examined by A. Elamin
  • Patent number: 9223383
    Abstract: A multi-core data processor includes multiple data processor cores and a power controller. Each data processor core has a first input for receiving a clock signal, a second input for receiving a power supply voltage, and an output for providing an idle signal. The power controller is coupled to each of the data processor cores for providing the clock signal and the power supply voltage to each of the data processor cores. The power controller provides at least one of the clock signal and the power supply voltage to an active one of the data processor cores in dependence on a number of idle signals received from the data processor cores.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: December 29, 2015
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Srilatha Manne, Rajagopalan Desikan, Sanjay Pant, Youngtaek Kim
  • Patent number: 9218041
    Abstract: An apparatus includes logic to control heat generation in a device. The device to operate at least in one of a first state and a second state, wherein the device to consume more power in the first state than in the second state. The device to connect to a network at least for a portion of time while in the second state. The logic to select a plurality of thermal control solutions to decrease the generation of heat in the device in the second state, the selected thermal control solution to be performed while the device is in the second state to reduce the generated heat to below a predetermined level.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 22, 2015
    Assignee: Intel Corporation
    Inventors: Biswajit Sur, Thomas E. Walsh, Ajay G. Gupta, Brian C. Kluge, Kristoffer D. Fleming
  • Patent number: 9213394
    Abstract: A system and method is provided to measure the power consumption of circuits whereby, in one aspect, a processor's temperature is maintained so that its power consumption is measured at the point the processor throttles.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: December 15, 2015
    Assignee: Google Inc.
    Inventor: Jinal Dalal
  • Patent number: 9215654
    Abstract: While an information handling device is in a reduced power state, the information handling device transitions from the reduced power state to a higher power state in response to receiving a message over an established wireless network connection that maintains a presence on a wireless network. In turn, the information handling device processes the message accordingly in the higher power state.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: December 15, 2015
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Jeffrey Clark, Mark Charles Davis, Justin Tyler Dubs, Steven Richard Perrin, Jennifer Greenwood Zawacki, Dekui Zhang
  • Patent number: 9207730
    Abstract: An electronic device is configured to manage heat in the device using a multi level thermal management process. When the temperature of the device reaches a level that requires the device to take action to adjust its thermal behavior, a system level controller identifies a component in the device as being active and that can be controlled to adjust heat generation in the device. Once an active component is identified, a component level controller sets an activity limit for the identified active component that is at or above a minimum activity limit of the component and prevents the component from operating above this activity limit. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: December 8, 2015
    Assignee: Apple Inc.
    Inventor: Jonathan Jay Andrews
  • Patent number: 9195299
    Abstract: A method of powering on a plurality of devices includes identifying a plurality of power distribution units (PDUs) disposed in a rack, wherein each PDU receives power from a main power source and includes a circuit breaker. A plurality of devices disposed in the rack are identified, wherein each device receives power from one of the PDUs, and wherein the plurality of devices are server nodes, network switches or external data storage devices. Vital product data (VPD) is obtained from a service processor in each device, wherein the VPD identifies the device by a model identification code. For each PDU, the plurality of devices connected to the PDU are powered on in a sequence to prevent an inrush current from tripping the circuit breaker within the PDU, wherein the sequence powers on devices in order of ascending commonality of the model identification code.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: November 24, 2015
    Assignee: Lenovo Enterprsie Solutions (Singapore) Pte. Ltd.
    Inventors: Shareef F. Alshinnawi, Gary D. Cudak, Edward S. Suffern, J. Mark Weber
  • Patent number: 9182807
    Abstract: Aspects and implementations of the present disclosure are directed to systems and methods for predictive power management in a computing center. In general, in some implementations, a system for conserving resources in a multi-processor computing environment monitors usage of the processors in the environment and maintains a sorted list of usage changes that occur in each of a plurality of periodic intervals. The system uses the sorted list to predict, according to configurable parameters, how many processors will need to be available during a subsequent interval. In some implementations, the monitored intervals are consecutive and immediately prior to the subsequent interval. In some implementations, the usage changes during a periodic interval are determined as the difference between a maximum number of active-busy processors during the periodic interval and an initial number of active-busy processors for the periodic interval.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: November 10, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard Michael Wolski, John Brevik
  • Patent number: 9182797
    Abstract: Embodiments of the inventive subject matter include setting minimum and maximum performance operating limits for each of a plurality of controllers. The operating limits are set in accordance with performance rules imposed on the system. In response to a request to change operation of a processing unit to a requested operational setting, it is determined whether the requested operational setting complies with the minimum and maximum performance operating limits. The minimum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the minimum performance operating limit. The maximum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the maximum performance operating limit. The requested operational setting is sent to a performance controller if the requested operational setting complies with the minimum and maximum performance operating limits.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: November 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still
  • Patent number: 9178759
    Abstract: Examples of methods and apparatus are provided for configuring and customizing a specific-purpose local client having a windows-based embedded image using extensible markup language (XML) configuration and obviating reinstallation of an entire windows-based embedded image onto the specific-purpose local client. The apparatus may include a retrieval module of the specific-purpose local client configured to automatically locate a remote repository server containing an XML configuration file and automatically obtain the XML configuration file from the remote repository server each time the specific-purpose local client boots up. The apparatus may include an apply settings module of the specific-purpose local client configured to automatically apply a configuration change to the windows-based embedded image based on the XML configuration file each time the specific-purpose local client boots up.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: November 3, 2015
    Assignee: WYSE TECHNOLOGY L.L.C.
    Inventors: Sanmati Tukol, Mohan Prabhala
  • Patent number: 9176550
    Abstract: An apparatus may comprise a power management system. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: November 3, 2015
    Assignee: INTEL CORPORATION
    Inventors: Biswajit Sur, Eric Distefano, James G. Hermerding, II, Eugene P. Matter, John P. Wallace, Guy M. Therien
  • Patent number: 9170624
    Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Krishnakanth V. Sistla, Jeremy Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh, Eliezer Weissmann, Anil Aggarwal, Martin T. Rowland, Ankush Varma, Ian M. Steiner, Matthew Bace, Avinash N. Ananthakrishnan, Jason Brandt
  • Patent number: 9171713
    Abstract: A device capable of controlling a supply voltage and a supply frequency using information of a manufacturing process variation includes a data storage device storing data indicating performance of the device, a decoder decoding the data stored in the data storage device and outputting decoded data, and a frequency control block outputting a frequency controlled clock signal in response to the decoded data output from the decoder. The device further includes a voltage control block outputting a level controlled supply voltage in response to the decoded data. The voltage control block outputs a body bias control voltage controlling a body bias voltage of at least one of a plurality of transistors embodied in the semiconductor device in response to the decoded data. The performance is operational speed of the device or leakage current of the semiconductor device.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: October 27, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jong Pil Lee
  • Patent number: 9164568
    Abstract: Embodiments apply user-specific usage patterns to estimate and preserve remaining battery life on a computing device. An amount of battery drain and an execution context are determined and stored for a plurality of recurring time periods. The execution context identifies operations executed by the computing device, signal strength, and other data describing the associated time period. If one of the operations is expected to be executed during a recurrence of at least one of the time periods, the expected execution is adjusted based on execution context and an estimated remaining battery life for the computing device. For example, the computing device may postpone or reschedule the operation for a time period during which the operation is expected to have a greater likelihood of completing successfully. In some embodiments, the battery preservation operations are automatically enabled at a particular threshold.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: October 20, 2015
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Javier N. Flores Assad, Maher Afif Saba, Pantelis Apostolopoulos, Daniel Guilherme Paixao Deschamps, Iulian D. Calinov, Wanittha Thapanakul
  • Patent number: 9164570
    Abstract: A data processor includes an execution unit having a multiple number of redundant resources, and a configuration circuit having first and second modes, wherein in the first mode, the configuration circuit enables the multiple number of redundant resources, and in the second mode, the configuration circuit disables the multiple number of redundant resources.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 20, 2015
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventor: David J. Shippy
  • Patent number: 9158368
    Abstract: An energy-saving apparatus and method for a portable terminal are disclosed in the present document. The apparatus includes: an electricity meter module, configured to detect battery power consumption parameters under driving of a data acquisition module; the data acquisition module, configured to drive the detection of the electricity meter module, and output the collected battery power consumption parameters to a data analysis module; the data analysis module, configured to estimate power consumptions of all running devices at present in the terminal according to the input battery power consumption parameters, and output a power consumption optimization instruction to a power consumption optimization execution module; and the power consumption optimization execution module, configured to adopt corresponding power consumption optimization approaches according to the input power consumption optimization instruction.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: October 13, 2015
    Assignee: ZTE Corporation
    Inventors: Xiaowei Wang, Tianci Yin
  • Patent number: 9141166
    Abstract: An apparatus, method and system is described herein for dynamic power control of a power domain. A power limit over a time window is provided. And over a control loop period a power interface determines energy consumption of the power domain, intelligently budgets power among devices within the power domain based on the energy consumption, converts those budgets to performance maximums for the power domain, and limits performance of devices in the power domain to the performance maximums utilizing a running average power limit.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Krishnakanth V. Sistla, Martin T. Rowland, Cesar A. Quiroz, Joseph R. Doucette, Gopikrishna Jandhyala, Kai Cheng, Celeste M. Brown, Avinash N. Ananthakrishnan
  • Patent number: 9134751
    Abstract: The present invention may provide a system with a fixed clock to provide a fixed clock signal, and a variable clock to provide a variable clock signal. The system may also include a chipset with a chipset time stamp counter (TSC) based on the fixed clock signal. A processor may include a fast counter that may be based on the variable clock signal and generate a fast count value. A slow counter may download a time stamp value based on the chipset TSC at wakeup. The slow counter may be based on the fixed clock signal and may generate a slow count value. A central TSC may combine the fast count and slow count value to generate a central TSC value.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: September 15, 2015
    Assignee: Intel Corporation
    Inventor: Ofer Nathan
  • Patent number: 9116692
    Abstract: A system includes a circuit having a plurality of electronic function blocks interconnected in series, a power source unit coupled to the circuit, for supplying power to the plurality of electronic function blocks, and a control unit coupled to each of the plurality of the electronic function blocks and to the power source unit. The control unit is configured to monitor activity levels of each of the electronic function blocks, and adjusts the activity level of each of the plurality of electronic function blocks. The control unit determines a voltage level suitable for the corresponding adjusted activity level, and adjusts the power supplied to each of the plurality of electronic function blocks in order to achieve the corresponding determined voltage level at each of the plurality of electronic function blocks.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: August 25, 2015
    Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Philip T. Krein, Roy H. Campbell, Naresh R. Shanbhag
  • Patent number: 9110671
    Abstract: A method and apparatus for exiting a low power state based on a prior prediction is disclosed. An integrated circuit (IC) includes a functional unit configured to, during operation, cycle between intervals of an active state and intervals of an idle state. The IC also include a power management unit configured to place the functional unit in a low power state responsive to the functional unit entering the idle state. The power management unit is further configured to preemptively cause the functional unit to exit the low power state at a predetermined time after entering the low power. The predetermined time is based on a prediction of idle state duration made prior to entering the low power state. The prediction may be generated by a prediction unit, based on a history of durations of intervals in which the functional unit was in the idle state.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: August 18, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Yasuko Eckert, Srilatha Manne, William L Bircher, Mahdu S. S. Govindan, Michael J Schulte, Manish Arora
  • Patent number: 9104420
    Abstract: An image forming apparatus, a microcontroller, and methods for controlling the image forming apparatus and the microcontroller are provided. The microcontroller include: a memory controller which is connected to an external memory operating in a self-refresh mode if a normal mode changes to a low power mode and outputs a preset signal which is to cancel the self-refresh mode if the low power mode changes to the normal mode; a memory interface unit which transmits the preset signal to a main memory; and a signal detector which detects whether the preset signal has been output. Here, the memory controller powers off the memory interface unit if the normal mode changes to the low power mode and powers on the memory interface unit if the low power mode changes to the normal mode, and the output of the preset signal is detected by the signal detector.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: August 11, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-kyu Park, Ji-won Jung, Ho-beom Park