Abstract: A method of applying an address space to data storage in a non-volatile solid-state storage is provided. The method includes receiving a plurality of portions of user data for storage in the non-volatile solid-state storage and assigning to each successive one of the plurality of portions of user data one of a plurality of sequential, nonrepeating addresses of an address space. The address range of the address space exceeds a maximum number of addresses expected to be applied during a lifespan of the non-volatile solid-state storage. The method includes writing each of the plurality of portions of user data to the non-volatile solid-state storage such that each of the plurality of portions of user data is identified and locatable for reading via the one of the plurality of sequential, nonrepeating addresses of the address space.

Abstract: Detection logic of a memory subsystem obtains a threshold for a memory device that indicates a number of accesses within a time window that causes risk of data corruption on a physically adjacent row. The detection logic obtains the threshold from a register that stores configuration information for the memory device, and can be a register on the memory device itself and/or can be an entry of a configuration storage device of a memory module to which the memory device belongs. The detection logic determines whether a number of accesses to a row of the memory device exceeds the threshold. In response to detecting the number of accesses exceeds the threshold, the detection logic can generate a trigger to cause the memory device to perform a refresh targeted to a physically adjacent victim row.

Abstract: Subject matter disclosed herein relates to techniques to perform transactions using a memory device.

Abstract: Systems and methods for tracking addresses stored in non-home locations in a cache. A method includes determining if an address that is to be stored in a cache is to be stored in a non-home location, determining if a directory has a location available for storing an identifier of the non-home location and if one or more locations of the directory are available for storing an identifier of the non-home location, storing an identifier of the non-home location in one of the one or more locations of the directory. The method further includes invalidating a non-home location in the cache that corresponds to one of the one or more locations of the directory, if none of the one or more locations of the directory are available for storing an identifier of the non-home location, and storing an identifier of the non-home location in the one of the one or more locations.

Abstract: In one aspect of the present disclosure, a method involves obtaining, by a body-mountable device, sensor data, where the body-mountable device includes a data storage. The method further involves making a determination that each condition in a condition set has been satisfied. In addition, the method involves responsive to making the determination that each condition in the condition set has been satisfied, storing the obtained sensor data in the data storage.

Abstract: A computing device having interface, memory, and processing module, transmits write requests for a set of encoded data slices to storage units (SUs) of a dispersed storage network (DSN) based on a write request process and to receive proposal records for a subset of the set of encoded data slices from at least some of the SUs. The computing device interprets the proposal records to determine whether it or any another computing device has a threshold number of its respective write requests in a first priority position in the ordered list of pending write requests. When no computing device has the threshold number, the computing device determines whether any computing device can be blacklisted and/or eliminated and whether a winner of the ballot can be determined after such determination. When a winner is determined, the computing device transmits finalize commands to the storage units.

Abstract: A file-system filter driver is attached to each cache volume containing a cache and a source volume containing a source file. The file-system filter driver intercepts requests and may redirect the requests to the cache. The redirection may be based on metadata information corresponding to the file or folder associated with a given request. Redirection to the cache prevents an application or user from directly accessing or modifying the source volume, which may be shared among multiple client devices. Redirecting requests to the cache also permits user-specific modifications to be stored in the cache. A merged view of the source volume and the cache may then be presented to the user or an application, reflecting the user-specific modifications without affecting the source volume.

Abstract: The present disclosure describes apparatuses and techniques that enable temperature-based memory access. In some aspects, a request to access a memory device is received. In response to the request, respective temperatures are determined for multiple locations of the memory device. Based on these respective temperatures, a selection can be made of which of the multiple locations to access. Alternately or additionally, an order in which to access the multiple locations can be determined based on the respective temperatures. The location(s) of the memory device are then accessed based on the selection or the determined order effective to minimize an increase in the memory device's temperature.

Abstract: Technologies for persistent memory programming include a computing device having a persistent memory including one or more nonvolatile regions. The computing device may assign a virtual memory address of a target location in persistent memory to a persistent memory pointer using persistent pointer strategy, and may dereference the pointer using the same strategy. Persistent pointer strategies include off-holder, ID-in-value, optimistic rectification, and pessimistic rectification. The computing device may log changes to persistent memory during the execution of a data consistency section, and commit changes to the persistent memory when the last data consistency section ends. Data consistency sections may be grouped by log group identifier. Using type metadata stored in the nonvolatile region, the computing device may identify the type of a root object within the nonvolatile region and then recursively identify the type of all objects referenced by the root object. Other embodiments are described and claimed.

Abstract: An information processing system comprises a processor. The processor executes a process that causes the information processing system to perform first writing, when requested to write data, data from which to subtract remainder data obtained by dividing a data size of write target data by a first data size of first processing unit data, the first data size being a size of processing unit data of a reading/writing process in a first storage device, in the write target data requested to be written to the first storage device and second writing the remainder data not being written by the first writing to a second storage device in which to set a second data size of second processing unit data, the second data size being smaller than the first data size of the first processing unit data.

Abstract: A computing device within a reflective memory system includes a memory block and a special purpose processor. The memory block includes a plurality of memory areas, which are configured to store data of a corresponding one of a plurality of external devices. The special purpose processor is configured to intercept a write request. The write request is associated with a first external device of the plurality of external devices, and the first external device is associated with a first memory area of the plurality of memory areas. The special purpose processor is configured to determine whether the write request is valid or invalid, write the data of the first external device to the first memory area if the write request is valid, and prevent the data of the first external device from being written to the memory block if the write request is invalid.

Abstract: A method for filtering multiple in-memory trace buffers for event ranges is provided. The method includes allocating a plurality of main trace buffers, based on the number of central processing units (CPU) participating in a trace. Each CPU has a dedicated main trace buffer, and each main trace buffer is circular. Each main trace buffer is divided into an equal number of sub-buffers. A plurality of events is written to the current sub-buffer. When the current sub-buffer is filled, events are written to the next sub-buffer. Events are extracted from at least one of the sub-buffers, starting with the sub-buffer that includes a compare time and ending at the end of the main trace buffer.

Abstract: Improved techniques for storing data involve storing compressed data in blocks of a first AU size and storing uncompressed data in blocks of a second AU size larger than the first AU size. For example, when a storage processor compresses a chunk of data, the storage processor checks whether the compressed chunk fits in the smaller AU size. If the compressed chunk fits, then the storage processor stores a compressed chunk in a block having the smaller AU size. Otherwise, the storage processor stores the uncompressed chunk in a block having the larger AU size. Advantageously, the improved techniques promote better disk and cache utilization, which improves performance without disrupting block mapping.

Abstract: A computer-implemented method, computer program product and computing system for defining a cache storage portion within a cache storage device coupled to a computing device. An application storage portion is defined within the cache storage device coupled to the computing device. The cache storage portion is configured to store cache data and the application storage portion is configured to store application data.

Abstract: A storage controller that performs control for storing in memory areas of a storage device, data that is grouped into redundant data in blocks each having a given data size. The storage controller includes a memory unit configured to store therein group information created by grouping performed such that logical addresses for a writing destination identified from a data writing request are correlated with the blocks; and a control unit configured to count in response to a data reading request, number of times of reading from a group including logical addresses for a reading destination identified from the reading request, based on the group information, and issues any one among a reading request that includes the logical addresses for the reading destination and a reading request that includes logical addresses for a memory destination of redundant data corresponding to data of the logical addresses for the reading destination.

Abstract: A last-level cache controller includes a system state monitor and a cache partitioning module. The system state monitor is configured to obtain a latency sensitivity factor, off-chip latency factors, and cache miss information for each of the processor cores. The cache partitioning module is configured to: obtain a first weighted latency according to the latency sensitivity factor, the off-chip latency factors and a first entry of the cache miss information that corresponds to a first cache partition configuration for each of the processor cores; obtain a first aggregated weighted latency according to the first weighted latency of each of the processor cores; determine whether a partition criterion is satisfied, where the partition criterion takes the first aggregated weighted latency into consideration; and partition the cache ways of the last-level cache using the first partition configuration when determining that the partition criterion is satisfied.

Abstract: A plurality of nodes includes an I/O (Input/Output) node and a plurality of computation nodes. Each computation node sends an I/O request to the I/O node. The I/O node includes a first storage device which stores data to be written or read according to the I/O request and a first memory device on which a first cache area is based to temporarily store the data written in the first storage device or read from the first storage device. The computation node includes a second memory device on which the second cache area is based to temporarily store the data according to the I/O request. At least one of the I/O node and the computation node stores management information which contains information on a physical storage area in the cache area of the other one of the I/O node and the computation node, and information on a virtual storage area which is associated with the physical storage area and has a part of its own cache area.

Abstract: A scheduling method for virtual processors based on the affinity of NUMA high-performance network buffer resources, including: in a NUMA architecture, when a network interface card (NIC) of a virtual machine is started, getting distribution of the buffer of the NIC on each NUMA node; getting affinities of each NUMA node for the buffer of the network interface card on the basis of an affinity relationship between each NUMA node; determining a target NUMA node in combination with the distribution of the buffer of the NIC on each NUMA node and NUMA node affinities for the buffer of the NIC; scheduling the virtual processor to the CPU on the target NUMA node. The problem of affinity between the VCPU of the virtual machine and the buffer of the NIC not being optimal in the NUMA architecture is solved to reduce the speed of VCPU processing network packets.

Abstract: According to one embodiment, a controller writes data stored in a first data group of a plurality of data groups into a first block group of the plurality of block groups and writes data stored in a second data group of the plurality of data groups into a second block group of the plurality of block groups in a case where a first condition is satisfied.

Abstract: Data exchange between a memory mapped interface and a streaming interface may include receiving sub-packets of a packet from a first interface, storing the sub-packets within a memory at addresses determined according to a ratio of a width of the first interface and a width of a second interface, and determining occupancy, of the memory as the sub-packets are stored. Responsive to determining that the occupancy of the memory meets a trigger level, sub-packets may be read from the memory at addresses determined according to the ratio and sending the sub-packets using the second interface.