Patents Examined by Alford Kindred
  • Patent number: 7302548
    Abstract: A method for communicating in a multi-processor environment is provided that includes generating a bit at an originating processor associated with a message to be communicated to a destination processor. The bit is positioned in a send register associated with the originating processor and transposed from the send register of the originating processor to a receive register of the destination processor. An interrupt signal is then generated in response to the bit being transposed.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: November 27, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: John W. Mitten, William R. Lee, Trevor S. Garner, Robert L. King
  • Patent number: 7302556
    Abstract: A method, apparatus and computer program product are provided for implementing a level bias function for branch prediction control for generating test simulation vectors. User selected options are received for a set of constraints for generating test simulation vectors for branch conditional instructions. Current resource values for predicting a branch for a branch conditional instruction are read. A branch operand field is generated to include a set of valid values using the current resource values and based upon said user selected constraints. The branch operand field defines conditions under which a branch is taken.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: November 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: John Martin Ludden, Jeremy John Salsman
  • Patent number: 7299339
    Abstract: A field programmable gate array includes a virtual bus interface that receives a control word from a host processor over a standard I/O bus. A configurable very long instruction word (VLIW) controller receives the control word via virtual bus interface signals mapped from the virtual bus interface. A reconfigurable communication and control fabric controls the data paths and programming modes of single instruction-multiple data (SIMD) processing element cells. The configurable VLIW controller has an interface with the reconfigurable communication and control fabric. SIMD processing element cells are controlled by the configurable VLIW controller through the reconfigurable communication and control fabric via the interface.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: November 20, 2007
    Assignee: The Boeing Company
    Inventor: Tirumale K. Ramesh
  • Patent number: 7299310
    Abstract: The invention relates to a connection module for the connection of a sensor, in particular of an optoelectronic sensor, to a fieldbus, comprising a sensor interface for the connection of the connection module to an interface of a sensor, a serial bus interface for the connection of the connection module to an interface of a fieldbus and a gateway circuit which is connected to the bus interface and to the sensor interface in order to convert data received at the bus interface into a data format of a connected sensor and vice versa. The sensor interface of the connection module is made as a parallel interface. At least one I/O circuit is integrated into the connection module and is connected to the bus interface and to the sensor interface. The invention further relates to a method for the connection of a sensor to a fieldbus via a connection module.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: November 20, 2007
    Assignee: Sick AG
    Inventor: Johannes Aschenbrenner
  • Patent number: 7293161
    Abstract: One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint that can subsequently be used to return execution of the program to the point of the instruction. Next, the system executes the instruction and subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order. Upon encountering a store during the execute-ahead mode, the system determines if the store buffer is full. If so, the system prefetches a cache line for the store, and defers execution of the store.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Shailender Chaudhry, Paul Caprioli, Marc Tremblay
  • Patent number: 7293163
    Abstract: One embodiment of the present invention provides a system that dynamically adjusts the aggressiveness of an execute-ahead processor. If a data-dependent stall condition is encountered during program execution, the system enters an execute-ahead mode, wherein instructions that cannot be executed because of the unresolved data dependency are deferred, and other non-deferred instructions are executed in program order. If a non-data-dependent stall condition is encountered during execute-ahead mode, the system enters a scout mode, wherein instructions are speculatively executed to prefetch future loads, but results are not committed to the architectural state of the execute-ahead processor. On the other hand, if an unresolved data dependency is resolved during the execute-ahead mode, enters a deferred mode and executes deferred instructions. During this deferred mode, if some instructions are deferred again, the system determines whether to resume execution in the execute-ahead mode.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: November 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul Caprioli, Sherman H. Yip
  • Patent number: 7293153
    Abstract: A processing system that interacts with external devices has a processor, a memory, and a controller. The memory stores templates that provide access protocol information about the external devices. When an external device is to be accessed, the operating system, which is stored in the memory, instructs the processor to perform the access to the external device. The processor puts the information about the external device on the address portion of the system bus where it is received and interpreted by the controller. The controller in turn retrieves the template for the external device as indicated by the information that was received. After retrieving the template, the controller outputs the information, in the manner indicated by the template, on an external interface bus where the external device is also coupled. The external device then responds according to the information that the controller put on the external interface bus.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: November 6, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mieu V. Vu, Ricardo Martinez Perez, Oskar Pelc
  • Patent number: 7290071
    Abstract: A processor includes a plurality of input ports, memory circuitry for storing data blocks associated with protocol data units (PDUs) and received by the processor at the input ports, and controller circuitry coupled to the memory circuitry. The controller circuitry is operative to discard certain ones of the data blocks received at the input ports in an oversubscription condition in which the received data blocks exceed a designated capacity of the processor. A discarded data block indicator is generated for a given one of the input ports if a data block received at the given input port for a particular PDU is discarded. One or more additional data blocks received at the given input port for the particular PDU are discarded based at least in part on the discarded data block indicator. The oversubscription condition may thereby be overcome in a manner which advantageously minimizes the number of received PDUs that are corrupted through discarded data blocks.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: October 30, 2007
    Assignee: Agere Systems Inc.
    Inventor: Robert H. Utley
  • Patent number: 7284113
    Abstract: An orthogonal data converter for converting the components of a sequential vector component flow to a parallel vector component flow. The data converter has an input rotator configured to rotate corresponding vector components of the sequential vector component flow by a prescribed amount, and a bank of register files configured to store the rotated vector components. The converter also has an output rotator configured to rotate the position of the vector components read from the bank of register files by a prescribed amount. A controller of the converter is operative to control the addressing of the bank of register files and the rotating of the vector components. In this regard, the controller is operative to write the vector components to the bank of register files in a prescribed order and read the vector components in a prescribed order to generate the parallel vector component flow.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: October 16, 2007
    Assignee: VIA Technologies, Inc.
    Inventors: Boris Prokopenko, Timour Paltashev
  • Patent number: 7281019
    Abstract: A case management method that reduces the number of manual operations, prevents manual errors, guarantees updated data, and enables knowledge of the present location of a storage file. In the case management method, case information involving a processing deadline is input to the management computer. At least one event, which is a task including a single operation and involving the processing deadline or a task including a series of operations and involving the processing deadline, is generated. Workflows, which are series of operations performed in a section that is determined beforehand in accordance with the type of generated event, are stored in a database. A predetermined workflow is selected from the stored workflow. An event pool storing the generated event in association with the selected predetermined workflow is generated in the database.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: October 9, 2007
    Assignees: Kabushiki Kaisha Onda Techno, Daiko Co., Ltd.
    Inventors: Masakatsu Taketa, Kaori Arihiro, Hiroshi Ishizaki, Hisashi Kunieda, Tsutomu Munemoto, Masayuki Kamiya, Yoshiki Hayashi
  • Patent number: 7281005
    Abstract: A method, system, and computer program product for hypertext link analysis that includes independently employing non-normalized backward and forward operators to obtain two independent weights for each document in a hypertext-linked graph, for subsequent ranking and analysis.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: October 9, 2007
    Assignee: Telenor ASA
    Inventors: Geoffrey Canright, Kenth Engo-Monsen
  • Patent number: 7275145
    Abstract: According to some embodiments, a processing element includes (i) a next neighbor register to receive information directly from a previous processing element in a series of processing elements, and (ii) a previous neighbor register to receive information directly from a next processing element in the series.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: September 25, 2007
    Assignee: Intel Corporation
    Inventors: Sridhar Lakshmanamurthy, Prashant Chandra, Wilson Y. Liao, Jeen-Yuan Miin, Pun Yim, Chen-Chi Kuo, Jaroslaw J. Sydir
  • Patent number: 7236981
    Abstract: A technique for generating code to implement value objects is described. Code is generated by reading into an object generator a description of an interface for an object for use by a database application to access data managed by a database server. The object generator automatically generates code that implements the object based on the description and data types supported by the database server.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: June 26, 2007
    Assignee: Oracle International Corporation
    Inventor: Jayesh Govindarajan
  • Patent number: 7231600
    Abstract: A solution for translating translatable components in a file containing structured information from a source language to one or more selected destination languages is disclosed. In an embodiment, the translatable components in the original file may be identified by an identifier. Such an identifier may be, for example, a prefix character string, which may be located using a suitable parser. The file and its translatable components may then be separated into a structural base or “skeleton” file, and an “isolated” file containing the translatable components. The translatable components in the isolated file may then be translated from the source language to a selected destination language to form translated components. These translated components in the isolated file may then be merged with the skeletal file to create a new file having substantially the same structure as the original file, but with the translatable components translated into the selected destination language.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: June 12, 2007
    Assignee: International Business Machines Corporation
    Inventors: Sean Zhou, Emad Muhanna, Song Guan, Mikito Hirota
  • Patent number: 7228305
    Abstract: Embodiments of the invention include a rating system for media network resources. The rating system includes a database comprising a plurality of addresses to media network resources on a network. A network server module is coupleable to the plurality of terminals to access the database to signal one or more addresses from the database to the plurality of terminals. Further, a rating module is included to receive a rating input from each of the plurality of terminals, and then to associate the rating input with a selected address in the database.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: June 5, 2007
    Assignee: Friskit, Inc.
    Inventors: Aviv Eyal, George Aposporos
  • Patent number: 7227502
    Abstract: A patch antenna with a directivity includes: a dielectric substrate to which at least one through hole is provided; a first ground electrode at least partially covering a back surface of the dielectric substrate; an antenna electrode partially covering an area of a front surface of the dielectric substrate, the area positionally corresponding to the first ground electrode; a second ground electrode provided within the area in a vicinity of the antenna electrode, the second ground electrode having the through hole underneath; and a conductive material provided in the through hole so as to electrically connect the first ground electrode and the second ground electrode.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: June 5, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinji Yamamoto
  • Patent number: 7225201
    Abstract: Methods and apparatus for implementing an extensible data type in a database management system. In one implementation, a database system includes: one or more data storage facilities for use in storing data composing records in tables of a database; one or more processing modules configured to manage the data stored in the data-storage facilities; a database management component configured to provide an object-based extensible data type, where an extensible data type includes one or more data members; and a type registry accessible by the database management component, where the type registry stores a registry object for each type supported by the database system and for at least one extensible data type.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: May 29, 2007
    Assignee: NCR Corp.
    Inventor: Gregory H. Milby
  • Patent number: 7225199
    Abstract: A method and apparatus are disclosed for transforming information from one semantic environment to another, for example, to facilitate electronic information searches. In one implementation, a SOLx system 1700 includes a Normalization/Translation NorTran Workbench 1702 and a SOLx server 1708. The NorTran Workbench 1702 is used to develop a knowledge base based on information from a source system 1712, to normalize legacy content 1710 according to various rules, and to develop a database 1706 of translated content. During run time, the SOLx server 1708 receives transmissions from the source system 1712, normalizes the transmitted content, accesses the database 1706 of translated content and otherwise translates the normalized content, and reconstructs the transmission to provide substantially real-time transformation of electronic messages. Additionally, content can be classified relative to a taxonomy defining relationships between terms or items so as to facilitate electronic searching or other processing.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: May 29, 2007
    Assignee: Silver Creek Systems, Inc.
    Inventors: Edward A. Green, Kevin L. Markey, Alec Sharp
  • Patent number: 7222132
    Abstract: A common template file system tree is utilized by isolated operating system processes groups for effective read-only common file set access via multiple file system paths. Files are opened from different views of the file system template for write-ability access and copied into a private modification area; this is also convenient for subsequent online changes and replication.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: May 22, 2007
    Assignee: SWSoft Holdings, Ltd.
    Inventors: Alexander Tormasov, Serguei Beloussov, Stanislav Protassov, Yuri Pudgorodsky
  • Patent number: 7222119
    Abstract: A system may perform a first operation within a file system in which directories and files are organized as nodes in a namespace tree. The system may associate a read-write lock with each of the nodes in the namespace tree. The system may acquire a first lock on a name of one or more directories involved in the first operation, acquire a second lock on an entire pathname involved in the first operation, determine whether the first lock or the second lock conflicts with third locks acquired by a second operation, and perform the first operation when the first lock or the second lock does not conflict with the third locks. The first, second, and third locks may include read-write locks.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: May 22, 2007
    Assignee: Google Inc.
    Inventors: Sanjay Ghemawat, Howard Gobioff, Shun-Tak Leung