Abstract: A method of enumerating a peripheral device preferably includes initiating operation of the device in a low-power mode. Power can be conserved, for instance, by slowing processor speed or by shutting off clocks to one or more unneeded blocks of the peripheral device during enumeration. During enumeration, a host computer preferably obtains enumeration information from the peripheral device and then uses that information to select a configuration state for operating the device following enumeration.

Abstract: A method for co-operative thermal management of a number of independent electronic devices housed within a common enclosure that includes designating a priority number and measuring a temperature for each of the independent electronic devices. Next, for each of the independent electronic devices, the measured temperature is evaluated to determine if it exceeds a threshold value for the independent electronic device. If the measured temperature exceeds a threshold value, a count-down value is initialize to the designated priority number of the independent electronic device. Following which, the count-down value is evaluated to determine if it is equal to zero. If the count-down value is equal to zero, the independent electronic device is powered down. However, if the count-down value is not equal to zero, a specified time interval is allowed to expire before the count-down value is decremented and re-evaluated to determine if it is equal to zero.

Abstract: A clock management scheme for an 802.11 MAC on a PCI or Cardbus bus that works in conjunction with industry standardized power mechanisms. The scheme involves enabling and disabling the main clock in coordination with IEEE 802.11 protocols and is compatible with ACPI power management and configuration interface specification. When the main clock is disabled the MAC and supporting hardware can run off either a lower frequency oscillator or the bus clock. The bus clock is automatically used when it is required by accesses by the host to the card.

Abstract: A technique includes providing a first clock signal to a parallel-to-serial data conversion circuit and providing a second clock signal to a memory storing data for conversion by the conversion circuit. One of the first and second clock signals is selectively synchronized to a reference clock signal.

Abstract: An image forming device having a communication unit includes a system control unit which controls the entire image forming apparatus, the system control unit having a CPU that is set in one of a normal mode, a power-saving mode and a sleep mode by controlling a power supply unit. A real-time clock keeps track of hours, minutes and seconds of a current time and outputs a signal indicating the current time. A register stores a return time that indicates a time the CPU is to be switched from one of the power-saving mode and the sleep mode to the normal mode. A comparator compares the current time of the clock with the return time of the register, and outputs, when a match occurs, a control signal to the CPU so that the CPU is switched to the normal mode.