Abstract: Single-layer CNT composites and multilayered or multitiered structures formed therefrom, by stacking of vertically aligned carbon nanotube (CNT) arrays, and methods of making and using thereof are described herein. Such multilayered or multitiered structures can be used as thermal interface materials (TIMs) for a variety of applications, such as burn-in testing.

Abstract: To provide a method for producing a Group III nitride semiconductor light-emitting device, which allows the formation of a high-temperature AlN buffer layer on an uneven substrate. This production method comprises forming an Al layer or Al droplets on the uneven shape of the uneven substrate, forming an AlN buffer layer while nitriding the Al layer; and forming a Group III nitride semiconductor layer on the AlN buffer layer. In the forming an Al layer, the internal pressure of a furnace is 1 kPa to 19 kPa, the temperature of the uneven substrate is 900° C. to 1,500° C., and an organic metal gas containing Al is supplied at a flow rate of 1.5×10?4 mol/min or more.

Abstract: In a semiconductor device including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The semiconductor device is manufactured by a method including first to fourth steps. The first step includes a step of forming an oxide semiconductor film, the second step includes a step of forming an oxide insulating film over the oxide semiconductor film, the third step includes a step of forming a protective film over the oxide insulating film, and the fourth step includes a step of adding oxygen to the oxide insulating film through the protective film. In the first step, the oxide semiconductor film is formed under a condition in which an oxygen vacancy is formed. The oxygen from the oxide insulating film fills the oxygen vacancy after the fourth step.

Abstract: Transfer films, articles made therewith, and methods of making and using transfer films that include antireflective structures are disclosed.

Abstract: A method for producing a component is provided, where the component comprises a substrate, which emits at least one electromagnetic radiation in a first wavelength range and an electromagnetic radiation in a second wavelength range within one surface area. Electrodes can be formed within the surface area of the substrate; a first layer stack can be deposited, comprising at least one layer, which causes the emission of the electromagnetic radiation in the first wavelength range, and a cover layer, acting as the first counterelectrode, on the entire surface area; the first layer stack can be removed from a first partial surface area, which comprises at least one electrode; a second layer stack can be deposited, comprising at least one layer, which causes the emission of the electromagnetic radiation in the second wavelength range, and a second cover layer, acting as the counterelectrode, on the entire surface area.

Abstract: A device and a method for producing a device are disclosed. In an embodiment the device includes a first component; a second component; and a connecting element arranged between the first component and the second component, wherein the connecting element comprises at least a first phase and a second phase, wherein the first phase comprises a first metal having a first concentration, a second metal having a second concentration and a third metal having a third concentration, wherein the second phase comprises the first metal having a fourth concentration, the second metal and the third metal, wherein the first metal, the second metal and the third metal are different from one another and are suitable for reacting at a processing temperature of less than 200° C., and wherein the following applies: c11?c25 and c11?c13?c12.

Abstract: A light emitting element includes: a semiconductor stack structure that includes a light emitting part, and a light receiving part that receives light propagating in a lateral direction through a semiconductor layer from the light emitting part, wherein the light emitting part and the light receiving part share a quantum layer; and a light reflection layer that covers ? or more of a lateral surface of the quantum layer in the light receiving part.

Abstract: Electronic component having a first lead frame consisting of an electrically conductive material. The first lead frame carries a first semiconductor component. In the plane of the lead frame a shunt element is arranged, wherein the shunt element comprises a resistor body arranged between a first terminal contact and a second terminal contact. An electrically conducting connection extends from a terminal of the first semiconductor component through the first lead frame to the first terminal contact of the shunt element. A current measurement with good accuracy is facilitated.

Abstract: A method for continuously preparing organic light emitting diode (OLED) by using thermal transfer film is revealed. At least two thermal transfer layers are transferred onto a substrate in turn by thermal transfer printing for overcoming shortcomings of the conventional vacuum evaporation including complicated processes and low material efficiency. Only less than 50% material reaches the substrate after the vacuum evaporation.

Abstract: Light-emitting elements in which an increase of driving voltage can be suppressed are provided. Light-emitting devices whose power consumption is reduced by including such light-emitting elements are also provided. In a light-emitting element having an EL layer between an anode and a cathode, a first layer in which carriers can be produced is formed between the cathode and the EL layer and in contact with the cathode, a second layer which transfers electrons produced in the first layer is formed in contact with the first layer, and a third layer which injects the electrons received from the second layer into the EL layer is formed in contact with the second layer.

Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

Abstract: The present invention provides an array substrate and an repairing method thereof, wherein the array substrate includes adjacent two level GOA unit circuits, wherein an output terminal of a Nth level GOA unit circuit is connected to a Nth level gate line, an output terminal of a N+1th level GOA unit circuit is connected to a N+1th level gate line; and a repairing structure disposed between the Nth level gate line and the N+1th level gate line, the repairing structure configured to turn on the Nth level gate line and the N+1th level gate line by melting when the Nth level GOA unit circuit or the N+1th level GOA unit circuit damaged. A repairing structure is added between two adjacent gate lines, when a certain GOA unit circuit is damaged, the repairing structure is melted by a laser to make the adjacent two gate lines communicate with each other.

Abstract: A cryogenic electronic package includes a first superconducting multi-chip module (SMCM), a superconducting interposer, a second SMCM and a superconducting semiconductor structure. The interposer is disposed over and coupled to the first SMCM, the second SMCM is disposed over and coupled to the interposer, and the superconducting semiconductor structure is disposed over and coupled to the second SMCM. The second SMCM and the superconducting semiconductor structure are electrically coupled to the first SMCM through the interposer. A method of fabricating a cryogenic electronic package is also provided.

Abstract: The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.

Abstract: An integrated circuit (IC) package with improved performance and reliability is disclosed. The IC package includes an IC die and a routing structure. The IC die includes a conductive via having a peripheral edge. The routing structure includes a conductive structure coupled to the conductive via. The conductive structure may include a cap region, a routing region, and an intermediate region. The cap region may overlap an area of the conductive via. The routing region may have a first width and the intermediate region may have a second width along the peripheral edge of the conductive via, where the second width may be greater than the first width. The intermediate region may be arranged to connect the cap region to the routing region.

Abstract: A semiconductor device includes a substrate, upper impurity regions in upper portions of the substrate, metal electrodes electrically connected to the upper impurity regions, metal silicide layers between the metal electrodes and the upper impurity regions, and a lower impurity region in a lower portion of the substrate. A method of fabricating the semiconductor device and an apparatus used in fabricating the semiconductor device is also provided.

Abstract: A display including a back plate, a plurality of light emitting devices and a plurality of compensating light emitting devices is provided. The back plate has a plurality of pixels and at least one compensated region. The compensated region includes some of the pixels. The light emitting devices are arranged in all the pixels on the back plate. The compensated light emitting devices are disposed on the back plate and located in each pixel in the compensated region respectively. At least one of the pixels in the compensated region is dead pixel. Besides, a repair method of the display is also provided.

Abstract: The present application discloses a RGBW liquid crystal panel includes a plurality of scanning lines and a plurality of data lines, and a plurality of sub-pixel regions formed by the division of the plurality of scanning lines and the plurality of data lines; each sub-pixel region includes a sub-pixel and a thin film transistor, a gate electrode and a source electrode of each thin film transistor are connected to a scanning line and a data line, respectively, a drain electrode of each thin film transistor is connected to the sub-pixel; wherein, the plurality of sub-pixels includes a plurality of first white sub-pixels and a plurality of second white sub-pixels, the thin film transistor corresponding to the first white sub-pixel and the thin film transistor corresponding to second white sub-pixel have different channel width-length ratio, so that the first white sub-pixel and the second white sub-pixel have different luminance.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate comprises a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.

Abstract: An apparatus includes a laminate and a lid. The laminate generally includes a dielectric layer between a first conductive layer and a second conductive layer. The first conductive layer may include a probe configured to transfer a radio-frequency signal in a millimeter-wave band. The second conductive layer may be configured to provide a continuous ground plane parallel to the probe and separated from the probe by the dielectric layer. A plurality of channels may be (a) formed into a side of the second conductive layer opposite the dielectric layer, (b) formed to a depth less than a thickness of the second conductive layer, and (c) sized to permit gasses formed while securing the laminate to a substrate to escape from between the laminate and the substrate. The lid may be in contact with the first conductive layer.