Patents Examined by Antonio B Crite
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Patent number: 12295190Abstract: A light-emitting device includes: a package defining a recess; a light-emitting element disposed on a bottom surface of the recess; and a sealing member disposed in the recess so as to cover the light-emitting element. The sealing member includes a filler-containing layer which contains a filler and covers the light-emitting element, and a light-transmissive layer disposed on the filler-containing layer. The recess is further defined by a lateral surface having a stepped portion between the bottom surface of the recess and an opening of the recess. The light-transmissive layer covers the stepped portion. An upper surface of the light-transmissive layer is downwardly recessed.Type: GrantFiled: August 8, 2022Date of Patent: May 6, 2025Assignee: NICHIA CORPORATIONInventors: Shogo Abe, Keita Shimizu, Takashi Kadota
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Patent number: 12283565Abstract: An adhesive for semiconductors, the adhesive containing a thermoplastic resin, a thermosetting resin, a curing agent having a reactive group, and a flux compound having an acid group. The adhesive has a calorific value of 20 J/g or less at 60° C. to 155° C. on a DSC curve, which is obtained by differential scanning calorimetry involving heating the adhesive at a rate of temperature increase of 10° C./min.Type: GrantFiled: September 16, 2020Date of Patent: April 22, 2025Inventors: Toshiyasu Akiyoshi, Masanobu Miyahara, Ryuta Kawamata
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Patent number: 12279415Abstract: Disclosed are a semiconductor memory device and a method of fabricating the same. The device includes a substrate including an active pattern with doped regions, a gate electrode crossing the active pattern between the doped regions, a bit line crossing the active pattern and being electrically connected to one of the doped regions, a spacer on a side surface of the bit line, a first contact coupled to another of the doped regions and spaced apart from the bit line with the spacer interposed therebetween, a landing pad on the first contact, and a data storing element on the landing pad. The another of the doped regions has a top surface, an upper side surface, and a curved top surface that extends from the top surface to the upper side surface. The first contact is in contact with the curved top surface and the upper side surface.Type: GrantFiled: June 19, 2023Date of Patent: April 15, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: Minsu Choi, Myeong-Dong Lee, Hyeon-Woo Jang, Keunnam Kim, Sooho Shin, Yoosang Hwang
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Patent number: 12272773Abstract: A light emitting device includes: a substrate; a light emitting element; a wavelength conversion layer; and a wall surrounding the wavelength conversion layer, having an opening portion exposing at least a part of a top surface of the wavelength conversion layer, and containing a light reflective material. The surface of the wall includes a top surface provided at a higher position than the top surface of the wavelength conversion layer, and an inner surface forming the opening portion. The wall includes a first portion surrounding the wavelength conversion layer, and a second portion provided over the first portion and surrounding the first portion. The opening portion is hollow. An angle of a corner portion between the top surface and the inner surface of the wall is in a range of 90 degrees or greater and less than 180 degrees.Type: GrantFiled: November 16, 2023Date of Patent: April 8, 2025Assignee: NICHIA CORPORATIONInventors: Hiroshi Miyairi, Yoshimi Katsumoto, Takayuki Igarashi, Yoshifumi Hodono, Shinya Endo
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Patent number: 12274182Abstract: Various embodiments of the present disclosure are directed towards an integrated chip comprising a memory cell. The memory cell is disposed within a dielectric structure that overlies a substrate. The memory cell comprises a data storage structure disposed between a bottom electrode and a top electrode. An upper conductive structure is disposed in the dielectric structure and on the top electrode. The upper conductive structure comprises a protrusion disposed below an upper surface of the top electrode. A sidewall spacer structure is disposed around the memory cell. The sidewall spacer structure comprises a first sidewall spacer layer around the data storage structure and a second sidewall spacer layer abutting the first sidewall spacer layer. The protrusion contacts the second sidewall spacer layer.Type: GrantFiled: August 3, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yao-Wen Chang, Chung-Chiang Min, Harry-Hak-Lay Chuang, Hung Cho Wang, Tsung-Hsueh Yang, Yuan-Tai Tseng, Sheng-Huang Huang, Chia-Hua Lin
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Patent number: 12268039Abstract: A light emitting device has a substrate, a plurality of first light emitting elements, each of which is mounted on the substrate, has a first LED die, and emits light having a first wavelength, a first light transmitting layer arranged so as to cover the plurality of first light emitting elements, the first light transmitting layer transmitting light emitted from the plurality of first light emitting elements, a second light transmitting layer arranged so as to cover the first light transmitting layer, the second light transmitting layer transmitting light that has transmitted through the first light transmitting layer, and a reflector having an upwardly bulging curved surface at an upper portion of an inner wall that the first light transmitting layer and the second light transmitting layer contact, the reflector being arranged on the substrate so as to surround the plurality of first light emitting elements and reflecting light emitted from the first light emitting elements, wherein the thickness T betweenType: GrantFiled: December 27, 2022Date of Patent: April 1, 2025Assignees: Citizen Electronics Co., Ltd., Citizen Watch Co., Ltd.Inventor: Keisuke Sakai
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Patent number: 12266746Abstract: A light-emitting device includes: a semiconductor diode structure, a reflector, a wavelength-converting layer, and an intermediate spacer between the diode structure and the wavelength-converting layer. The diode structure emits diode output light at a vacuum wavelength ?0 to propagate within the diode structure. The reflector is on the back diode structure and internally reflects diode internally incident output light. The wavelength-converting layer is positioned with its back surface facing and spaced-apart from a front surface of the diode structure, and absorbs diode output light at ?0 and emits down-converted light at a vacuum wavelength ?1>?0, which exits the wavelength-converting layer through its front surface.Type: GrantFiled: May 17, 2024Date of Patent: April 1, 2025Assignee: Lumileds LLCInventors: Debapriya Pal, Albert Femius Koenderink, Antonio Lopez-Julia, Mohamed S. Abdelkhalik, Jaime Gomez Rivas, Aleksandr Vaskin
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Patent number: 12243864Abstract: A display screen includes a backplane, an array of light-emitting diodes electrically integrated with the backplane, the array of light-emitting diodes configured to emit UV light in a first wavelength range, and a plurality of isolation walls formed on the backplane between adjacent light-emitting diodes of the array of light-emitting diodes with the isolation walls spaced apart from the light-emitting diodes and extending above the light-emitting diodes. The plurality of isolation walls include a core of a first material and a coating covering at least a portion of the core extending above the light-emitting diodes. The coating is an opaque second material having transmittance less than 1% of light in the first wavelength range.Type: GrantFiled: November 16, 2023Date of Patent: March 4, 2025Assignee: Applied Materials, Inc.Inventors: Lisong Xu, Byung Sung Kwak, Mingwei Zhu, Hou T. Ng, Nag B. Patibandla, Christopher Dennis Bencher
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Patent number: 12224388Abstract: Provided is a component arrangement, including a carrier substrate; a spacer which is arranged on the carrier substrate so as to surround an installation space and has an outlet opening on a side facing away from the carrier substrate; an optical component arranged in the installation space; a contact connection which electrically conductively connects the optical component to external contacts arranged outside the installation space; a cover substrate which is arranged on the spacer and with which the outlet opening is covered in a light-permeable manner; and a light-reflecting surface which is formed on an anisotropically etched silicon component and is arranged in the installation space as an inclined surface at an angle of approx.Type: GrantFiled: February 11, 2019Date of Patent: February 11, 2025Assignee: MSG LITHOGLAS GMBHInventors: Oliver Gyenge, Rachid Abdallah, Simon Maus, Ulli Hansen
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Patent number: 12211823Abstract: A package structure includes first and second dies, an insulation structure, a through via, a dielectric layer and a redistribution layer. The second die electrically bonded to the first die includes a through substrate via. The insulation structure is disposed on the first die and laterally surrounds the second die. The through via penetrates through the insulation structure to electrically connect to the first die. The dielectric layer is disposed on the second die and the insulation structure. The redistribution layer is embedded in the dielectric layer and electrically connected to the through via. The redistribution layer includes a first barrier layer and a conductive layer on the first barrier layer. The through substrate via is electrically connected to the redistribution layer, and the conductive layer is in contact with a conductive post of the through via and separated from the through substrate via by the first barrier layer therebetween.Type: GrantFiled: May 9, 2022Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Ching-Jung Yang, Ming-Fa Chen, Sung-Feng Yeh, Ying-Ju Chen
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Patent number: 12211816Abstract: A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer.Type: GrantFiled: February 28, 2022Date of Patent: January 28, 2025Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Young Kuk Ko, Sang Hoon Kim, Suk Chang Hong, Chi Won Hwang, Gyu Mook Kim
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Patent number: 12211914Abstract: A method for manufacturing a buried gate includes: providing a substrate; forming a word line trench in the substrate; treating a surface of the word line trench to form concave structures on the surface of the word line trench; and, forming a conductive layer in the word line trench, convex structures matched with the concave structures being provided on a surface of the conductive layer.Type: GrantFiled: May 25, 2021Date of Patent: January 28, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Cheong Soo Kim, Yong Gun Kim, Xianrui Hu, GuangSu Shao
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Patent number: 12213300Abstract: A memory includes a substrate. An isolation layer is disposed on the substrate. The plurality of active regions arranged in an array are disposed in the isolation layer. A plurality of word lines are formed in the plurality of active regions and the isolation layer. Each word line includes gates disposed in the active regions and word line structures disposed in the isolation layer. The each word line is constituted by successive connection of the plurality of gates and the plurality of word line structures arranged at intervals. The plurality of gates included in the each word line are disposed in two correspondingly adjacent columns of active regions, and any two adjacent gates in the each word line are disposed in two correspondingly adjacent rows of active regions.Type: GrantFiled: September 8, 2021Date of Patent: January 28, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Tao Chen
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Patent number: 12205926Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.Type: GrantFiled: August 17, 2023Date of Patent: January 21, 2025Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.Inventors: Guilian Gao, Bongsub Lee, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh, Belgacem Haba, Laura Wills Mirkarimi, Rajesh Katkar
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Patent number: 12207497Abstract: A display device includes: a display panel; and a polarizer, an optical adhesive, and a cover plate sequentially arranged on the display panel. The display panel has a transparent region. The polarizer has first and second surfaces parallel to each other, and the first surface is proximal to the display panel. The polarizer has therein a through hole penetrating through the first and second surfaces. The through hole has first and second boundaries at the first and second surfaces, respectively. An orthogonal projection of the first boundary on the second surface is inside and not in contact with the second boundary. For third and fourth boundaries of the through hole parallel to the first boundary, an orthogonal projection of the third boundary on the fourth boundary does not extend beyond the fourth boundary, the third boundary being closer to the first boundary than the fourth boundary.Type: GrantFiled: February 9, 2021Date of Patent: January 21, 2025Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Jiaxiang Zhang, Kang Wang, Xiaoxia Liu, Haotian Yang, Junhui Yang, Fuzheng Xie, Bin Zhang
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Patent number: 12205959Abstract: A display device includes a first electrode and a second electrode spaced apart from each other, each of the first electrode and the second electrode including an electrode base layer, a main electrode layer disposed on the electrode base layer, and an electrode upper layer disposed on a portion of the main electrode layer, a first insulating layer disposed on the first electrode and the second electrode, light-emitting elements disposed on the first electrode and the second electrode on the first insulating layer, a first connecting electrode electrically contacting the light-emitting elements, and a second connecting electrode electrically contacting the light-emitting elements. The first electrode includes a first part, the second electrode includes a second part, and the light-emitting elements are disposed on the first part and the second part.Type: GrantFiled: December 14, 2021Date of Patent: January 21, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jong Chan Lee, Hyun Kim, Jeong Su Park, Jeong Kook Wang, Hyun Wook Lee, Yong Tae Cho
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Patent number: 12191423Abstract: A display device includes: a substrate having a display area and a non-display area; and a pixel in each of a pixel area in the display area. Each of the pixels includes: an insulating layer on the substrate and having an opening; first and second electrodes on the insulating layer and spaced apart from each other; a plurality of light emitting elements in the opening; a first contact electrode electrically connecting one end of the light emitting elements and the first electrode to each other; a second contact electrode electrically connecting another end of the light emitting elements and the second electrode to each other; a first insulating pattern on the first contact electrode; and a second insulating pattern on the second contact electrode. The first insulating pattern and the second insulating pattern are on the same layer and spaced apart from each other.Type: GrantFiled: August 18, 2023Date of Patent: January 7, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Seung Min Lee, Jin Taek Kim, Baek Hyeon Lim, Jin Yeong Kim, Kyung Tae Chae, Jung Hwan Yi, Hee Keun Lee
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Patent number: 12191291Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display substrate, sub-pixels on the display substrate, each of the sub-pixels including a first electrode and a second electrode on the display substrate and spaced apart from each other, light emitting elements between the first electrode and the second electrode, an insulating layer covering the light emitting elements, a protective pattern on the insulating layer and overlapping one of the light emitting elements, and a bank on the insulating layer at a boundary of one of the sub-pixels.Type: GrantFiled: April 6, 2021Date of Patent: January 7, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Kwang Soo Bae, Beom Soo Park, Min Jeong Oh, Hae Ju Yun
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Patent number: 12183861Abstract: A light-emitting device includes: a substrate having an upper surface; at least one light-emitting element on or above the substrate, the at least one light-emitting element having a rectangular shape in a plan view from above the light-emitting device and having an upper surface serving as a light-emitting surface of the at least one light-emitting element; a plate-shaped light-transmissive member having a rectangular shape in a plan view from above the light-emitting device and having a lower surface that faces the upper surface of the at least one light-emitting element; and a light-guiding member that is disposed between the light-emitting element and the light-transmissive member.Type: GrantFiled: November 29, 2023Date of Patent: December 31, 2024Assignee: NICHIA CORPORATIONInventor: Tomonori Miyoshi
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Patent number: 12178069Abstract: A display device including a substrate, a transistor, a leveling film, a display element, a dam, and a guide. The substrate has a display region and a periphery region surrounding the display region. The transistor is located over the display region. The leveling film is located over and covers the transistor. The display element is located over the leveling film and is electrically connected to the transistor. The dam is located over the peripheral region and surrounds the display region. The guide is located between the leveling film and the dam and surrounds the display region. The guide includes a first organic compound included in the leveling film.Type: GrantFiled: September 14, 2021Date of Patent: December 24, 2024Assignee: Japan Display Inc.Inventor: Daisuke Kato