Patents Examined by Antonio B Crite
  • Patent number: 11967590
    Abstract: A display device includes a substrate including pixels, a first electrode and a second electrode spaced apart from each other, light emitting elements disposed between the first electrode and the second electrode, an insulation layer disposed on the light emitting elements, a first bank overlapping the first electrode and the second electrode, a first area overlapping the first bank, and a second area excluding the first area, wherein the insulation layer includes an opening exposing the first area.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: April 23, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Kim, Jong Chan Lee
  • Patent number: 11961814
    Abstract: In an embodiment, a device includes: a semiconductor device; and a redistribution structure including: a first dielectric layer; a first grounding feature on the first dielectric layer; a second grounding feature on the first dielectric layer; a first pair of transmission lines on the first dielectric layer, the first pair of transmission lines being laterally disposed between the first grounding feature and the second grounding feature, the first pair of transmission lines being electrically coupled to the semiconductor device; a second dielectric layer on the first grounding feature, the second grounding feature, and the first pair of transmission lines; and a third grounding feature extending laterally along and through the second dielectric layer, the third grounding feature being physically and electrically coupled to the first grounding feature and the second grounding feature, where the first pair of transmission lines extend continuously along a length of the third grounding feature.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsun Chen, Shou-Yi Wang, Jiun Yi Wu, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11961944
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate, active devices and transparent conductive patterns. The active devices are formed on the semiconductor substrate. The transparent conductive patterns are formed over the active devices and electrically connected to the active devices. The transparent conductive patterns are made of a metal oxide material. The metal oxide material has a first crystalline phase with a prefer growth plane rich in oxygen vacancy, and has a second crystalline phase with a prefer growth plane poor in oxygen vacancy.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-En Yen, Ming-Da Cheng, Mirng-Ji Lii, Wen-Hsiung Lu, Cheng-Jen Lin, Chin-Wei Kang, Chang-Jung Hsueh
  • Patent number: 11955584
    Abstract: A light emitting element package includes a substrate provided with an interconnect portion, a light emitting element mounted on the substrate and connected to the interconnect portion, and a cover member contacting an upper surface of the light emitting element while covering the light emitting element. The cover member comprises an organic polymer, which can have polymer nodes linked to each other, and has a light transmittance of 85% or more in an ultraviolet wavelength range.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: April 9, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Yuriy Bilenko, Ki Yon Park
  • Patent number: 11949015
    Abstract: A method includes following steps. A semiconductor fin is formed extending from a substrate. A gate structure is formed extending across the semiconductor fin. Recesses are etched in the semiconductor fin. Source/drain epitaxial structures are formed in the recesses in the semiconductor fin. Formation of each of the source/drain epitaxial structures comprises performing a first epitaxy growth process to form a bar-shaped epitaxial structure in one of the recesses, and performing a second epitaxy growth process to form a cladding epitaxial layer cladding on the bar-shaped epitaxial structure. The bar-shaped epitaxial structure has a lower phosphorous concentration than the cladding epitaxial layer.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Chi Yang, Chih-Hsiang Huang
  • Patent number: 11949048
    Abstract: According to one embodiment, an illumination device comprises a first mounting board including a plurality of first light emitting elements, a second mounting board including a plurality of second light emitting elements, and a first wiring board including a first wiring line electrically connected to at least one of the plurality of first light emitting elements and the plurality of second light emitting elements. The first mounting board and the second mounting board extend in a first direction and are arranged along a second direction intersecting the first direction. The first wiring board is superposed on the first mounting board and the second mounting board. The first wiring board has rigidity that is lower than rigidity of each of the first mounting board and the second mounting board.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: April 2, 2024
    Assignee: Japan Display Inc.
    Inventors: Masaaki Takuma, Mao Izawa
  • Patent number: 11942586
    Abstract: A display module package includes a semiconductor chip, a wiring member disposed on the semiconductor chip, including an insulating layer and a wiring layer, and contacting at least a portion of the semiconductor chip, a light emitting device array disposed on the wiring member and including a plurality of light emitting devices disposed on one surface, wherein the wiring member is between the semiconductor chip and the light emitting device, and a molding member disposed on the wiring member, sealing part of the light emitting device array, and having an opening for exposing the plurality of light emitting devices.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dahye Kim, Seokhyun Lee, Jungho Park
  • Patent number: 11942435
    Abstract: In an embodiment, a device includes: a molding compound; an integrated circuit die encapsulated in the molding compound; a through via adjacent the integrated circuit die; and a redistribution structure over the integrated circuit die, the molding compound, and the through via, the redistribution structure electrically connected to the integrated circuit die and the through via, the redistribution structure including: a first dielectric layer disposed over the molding compound; a first conductive via extending through the first dielectric layer; a second dielectric layer disposed over the first dielectric layer and the first conductive via; and a second conductive via extending through the second dielectric layer and into a portion of the first conductive via, an interface between the first conductive via and the second conductive via being non-planar.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Han Wang, Hung-Jui Kuo, Yu-Hsiang Hu
  • Patent number: 11929453
    Abstract: An UV or DUV light-emitting diode package includes: a foundation; a first metal layer, a second metal layer, and third metal layer formed on a top surface of the foundation, wherein the first metal layer and the second metal layer are electrically isolated by a first gap, the third metal layer surrounds the first and second metal layers and is electrically isolated from the first and second metal layers by a second gap; a lens attached to the top surface of the foundation, wherein a cavity is formed between the foundation and the lens; a chip disposed in the cavity, wherein an anode of the chip is electrically connected to the first metal layer and a cathode of the chip is electrically connected to the second metal layer; and a fluid encapsulate, wherein the cavity is fully or partially filled with the fluid encapsulate.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: March 12, 2024
    Assignee: BOLB INC.
    Inventors: Alex Lunev, Ling Zhou, Jianping Zhang, Ying Gao, Huazhong Deng
  • Patent number: 11925066
    Abstract: Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: March 5, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Kyoung-Nam Lim, Yu-Ho Jung, Dong-Young Kim
  • Patent number: 11923255
    Abstract: Methods for manufacturing an electronic device are provided. A representative method includes providing a substrate. The substrate has an active layer, a first patterned metal layer passing through a passivation layer to electrically connected to the active layer, a second patterned metal layer passing through an insulating layer to electrically connected to the first patterned metal layer, and a metal layer under the second patterned metal layer. A part of the metal layer does not serve as a portion of a thin film transistor, and the part of the metal layer serves as a portion of a gate line. The method includes providing a carrier substrate supporting a plurality of elements, conducting a testing to the elements, transferring the elements from the carrier substrate to the second patterned metal layer of the substrate, and fixing the elements to the substrate.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: March 5, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chia-Hsiung Chang, Ting-Kai Hung, Hsiao-Lang Lin
  • Patent number: 11923485
    Abstract: An optical device includes an LED chip, a visible-light luminescent material, and a near-infrared luminescent material, wherein a luminous power of light emitted by the near-infrared and visible-light luminescent materials in a band of 650-1000 nm under the excitation of the LED chip is A, and a sum of a luminous power of light emitted by the near-infrared and visible-light luminescent materials in a band of 350-650 nm under the excitation of the LED chip and a luminous power of residual light emitted by the LED chip in the band of 350-650 nm after the LED chip excites the near-infrared and visible-light luminescent materials is B, with B/A*100% being 0.1%-10%. According to the implementation where the optical device employs the LED chip to combine the near-infrared luminescent material and the visible-light luminescent material simultaneously.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: March 5, 2024
    Assignee: GRIREM ADVANCED MATERIALS CO., LTD.
    Inventors: Ronghui Liu, Yuanhong Liu, Xiaoxia Chen, Yuan Xue, Xiaole Ma
  • Patent number: 11916172
    Abstract: An epitaxial structure adapted to a semiconductor pickup element is provided. The semiconductor pickup element has at least one guiding structure and provided with a pickup portion. The epitaxial structure includes a semiconductor layer corresponding to the pickup portion and capable of being picked up by the semiconductor pickup element. The epitaxial structure also includes at least one alignment structure disposed on the semiconductor layer and corresponding to the at least one guiding structure, so that the epitaxial structure and the semiconductor pickup element are positioned relative to each other. The number of the at least one alignment structure matches the number of the at least one guiding structure.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: February 27, 2024
    Assignee: PLAYNITRIDE DISPLAY CO., LTD.
    Inventors: Shiang-Ning Yang, Yi-Min Su, Yu-Yun Lo, Bo-Wei Wu, Tzu-Yu Ting
  • Patent number: 11916053
    Abstract: A display panel and a display device are provided. The display panel includes a drive substrate, a bonding layer, and multiple light-emitting components. The drive substrate includes multiple sets of pads. Each set of pads includes a first pad and a second pad. The bonding layer is arranged on the multiple sets of pads. Each light-emitting component includes a semiconductor light-emitting layer, a first electrode, and a second electrode. The first electrode and the second electrode are arranged at opposite ends of the semiconductor light-emitting layer. The first electrode is electrically connected to a corresponding first pad through the bonding layer. The second electrode is electrically connected to a corresponding second pad through the bonding layer. The second electrodes of the adjacent light-emitting components are close to each other. The second electrodes close to each other are shorted through the same bonding layer and/or the same second pad.
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: February 27, 2024
    Assignee: HKC CORPORATION LIMITED
    Inventors: Zeyao Li, Rongrong Li
  • Patent number: 11916079
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductive substrate and an oxidation region formed on the semiconductive substrate. The oxidation region includes a stage with a first width along a horizontal direction. The semiconductor structure further includes a fin formed on a top surface of the stage. A method for forming the semiconductor structure is also provided.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Te-An Chen
  • Patent number: 11908982
    Abstract: A light-emitting diode (LED) package includes an LED chip on a substrate, an adhesive phosphor film on the LED chip, a cell lens on the adhesive phosphor film, and a lateral reflective layer covering respective lateral surfaces of the LED chip, the adhesive phosphor film, and the cell lens, a lateral surface of the lateral reflective layer being coplanar with a lateral surface of the substrate.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: February 20, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jongsup Song, Tetsuo Ariyoshi, Taehyun Lee
  • Patent number: 11908980
    Abstract: A light emitting device includes: a mounting substrate comprising a mounting substrate first surface; a first light emitting element configured to emit light having a first peak wavelength; a second light emitting element configured to emit light having a second peak wavelength longer than the first peak wavelength; a first light-transmissive member; and a first wavelength converting member located on the first light-transmissive member.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: February 20, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Tadaaki Ikeda, Yukiko Yokote
  • Patent number: 11901694
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: February 13, 2024
    Assignee: iReach Corporation
    Inventors: Hsiu-Ju Yang, Shou-Lung Chen, Hsin-Chan Chung
  • Patent number: 11894495
    Abstract: A micro LED structure includes a first micro LED chip having opposite first and second sides, a second micro LED chip adjacent to the first side of the second micro LED chip, a third micro LED chip adjacent to the first side of the first micro LED chip, and optical structures respectively over the first micro LED chip, the second micro LED chip and the third micro LED chip. Each of the first, second and third micro LED chip includes a semiconductor stack, a metal pad and a reflective coating layer. The semiconductor stack includes a first semiconductor layer, an active layer in contact with the first semiconductor layer, and a second semiconductor layer in contact with the active layer. The metal pad is in contact with the first semiconductor layer, and the reflective coating layer is disposed around sidewalls of the semiconductor stack.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: February 6, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Kai-Hung Cheng, Fu-Han Ho
  • Patent number: 11894503
    Abstract: A light emitting diode device includes a substrate, a frame, an LED die and a transparent layer. The frame is located on the substrate. The frame and the substrate collectively define a concave portion. The frame has a light reflectivity ranging from 20% to 40%. The LED die is located on the substrate and within the concave portion. The transparent layer is filled into the concave portion and covering the LED die, wherein the LED die has a side-emitting surface and a top-emitting surface, the side-emitting surface has a luminous intensity greater than that of the top-emitting surface.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: February 6, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Shu-Wei Chen, Ching-Huai Ni, Kuo-Wei Huang, Jia-Jhang Kuo