Abstract: A semiconductor package structure includes a semiconductor device with an active surface, a conductive pillar on the conductive pad, an adhesion strengthening layer, and an encapsulant in contact with the adhesion strengthening layer. The conductive pillar has a side surface and a top surface. The adhesion strengthening layer is conformally disposed on the side surface of the conductive pillar and the active surface of the semiconductor device.

Abstract: A batch soldering method includes providing a first passive device, arranging the first passive device on a first metal region of a substrate with a region of first solder material between the first passive device and the substrate, providing a semiconductor die, arranging the semiconductor die on a second metal region of the substrate with a region of second solder material between the semiconductor die and the substrate, and performing a common soldering step that simultaneously forms a first soldered joint from the region of first solder material and forms a second soldered joint from the region of second solder material. The common soldering step is performed at a soldering temperature such that one or more intermetallic phases form within the second soldered joint, each of the one or more intermetallic phases having a melting point above the second solder material and the soldering temperature.

Abstract: Solid-state lighting devices including light-emitting diodes (LEDs), and more particularly support structures for LED packages are disclosed. Support structure arrangements are provided for LED packages with increased reflectivity. Support structures may include patterned electrically conductive materials that provide electrical connections and bonding surfaces for LED chips within the package, and bonding surfaces for cover structures in certain arrangements. Depending on the wavelengths of light emitted by the LED package, light reflectivity tradeoffs can exist for conductive materials that provide suitable electrical connections and bonding surfaces. Additional patterned layers with increased reflectivity may be provided on underlying patterned electrically conductive materials.

Abstract: A light-emitting device including: a mounting substrate including a mounting surface; a light-emitting element disposed on the mounting surface; a light transmissive component disposed on the light-emitting element; and a resin component directly contacting and covering a side surface of the light-emitting element and a side surface of the light transmissive component. The resin component includes a peripheral portion that directly contacts and covers the side surface of the light transmissive component, a protrusion that protrudes from the peripheral portion, and a cover portion that directly contacts and covers an outer edge portion of a topmost surface of the light transmissive component. The height from the mounting surface to a top of the cover portion is greater than a height from the mounting surface to the topmost surface of the light transmissive component, and the topmost surface of the light transmissive component includes a region exposed from the resin component.

Abstract: A method for manufacturing a planar light source includes: preparing a structure body including a wiring substrate, a light guide plate including a first major surface, a second major surface, and an inner side surface defining a first hole with an opening on a first major surface side, and a light source arranged on the wiring substrate in the first hole; injecting a first resin material downward through the opening of the first hole, the first resin material including a light-diffusing agent; and curing the first resin material to form a first resin layer on a wiring substrate between the inner side surface of the first hole and a first side surface of a first light-transmitting member.

Abstract: A display device includes a display panel having a display area and a bending region. The display panel includes a light emitting diode disposed in the display area. An encapsulation layer encapsulates the light emitting diode. A light-control pattern is disposed on the encapsulation layer. The light-control pattern includes a passivation layer and a flattening layer. The flattening layer extends from the display area to the bending region. A bending protection layer is disposed in the bending region. The bending protection layer is composed of a portion of the flattening layer in the bending region.

Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.

Abstract: A method of making a surface-mountable pixel engine package comprises providing an array of spaced-apart conductive pillars and an insulating mold compound laterally disposed between the conductive pillars on a substrate together defining a planarized surface. Pixel engines comprising connection posts are printed to the conductive pillars so that each of the connection posts is in electrical contact with one of the conductive pillars. The pixel engines are tested to determine known-good pixel engines. An optically clear mold compound is provided over the planarized surface and tested pixel engines. Optically clear mold compound is adhered to a tape and the substrate is removed. The optically clear mold compound, the insulating mold compound, the conductive pillars, the optically clear mold compound, and the tested pixel engines are singulated to provide pixel packages that comprise the pixel engines and the known-good pixel engines are transferred to a reel or tray.

Abstract: An electronic device is provided. The electronic device includes a driving substrate, a plurality of light-emitting units, and a protective layer. The light-emitting units are electrically connected to the driving substrate. The protective layer covers the light-emitting units, and the protective layer has a Young's modulus less than or equal to 20 MPa.

Abstract: A semiconductor light-emitting device includes a plurality of light-emitting device structures separated from each other, each of the plurality of light-emitting device structures including a first conductivity type semiconductor layer, an active layer on the first conductivity type semiconductor layer, a second conductivity type semiconductor layer on the active layer, a first electrode connected to the first conductivity type semiconductor layer, and a second electrode connected to the second conductivity type semiconductor layer, and a partition wall structure between two adjacent light-emitting device structures of the plurality of light-emitting device structures, the partition wall structure defining a pixel space.

Abstract: A display device includes: a substrate having a display area and a non-display area; and a pixel in each of a pixel area in the display area. Each of the pixels includes: an insulating layer on the substrate and having an opening; first and second electrodes on the insulating layer and spaced apart from each other; a plurality of light emitting elements in the opening; a first contact electrode electrically connecting one end of the light emitting elements and the first electrode to each other; a second contact electrode electrically connecting another end of the light emitting elements and the second electrode to each other; a first insulating pattern on the first contact electrode; and a second insulating pattern on the second contact electrode. The first insulating pattern and the second insulating pattern are on the same layer and spaced apart from each other.

Abstract: A light-emitting device includes: a base member including: a first lead, a second lead, and a securing member securing the first and second leads; a light-emitting element mounted on an upper surface of the base member; a frame, a part of which is disposed on the upper surface of the base member to surround the light-emitting element; a first member covering at least a portion of an upper surface of the securing member that is exposed at an outer peripheral side of the frame in a top view, the first member being arranged intermittently under the frame and containing a reflective material; and a second member covering the light-emitting element, the frame, and the first member. The frame has a first region on which the first member is arranged and a second region on which the first member is not arranged, the first and second regions having different heights.

Abstract: An image display device comprises a drive circuit substrate including a drive circuit that supplies currents to micro light-emitting elements to emit light; and the micro light-emitting elements arranged in an array shape on the drive circuit substrate, wherein a light-distribution control unit that increases forward light emission of the micro light-emitting elements is disposed on a light-emitting surface of each of the micro light-emitting elements, and a partition wall that does not transmit the light emitted by the micro light-emitting elements is disposed around the light-distribution control unit.

Abstract: In at least one embodiment, the optoelectronic component comprises an optoelectronic semiconductor chip with an emission side and a rear side opposite the emission side. Furthermore, the component comprises a housing body with a top side and an underside opposite the top side, and a metal layer on the top side of the housing body. During proper operation, the semiconductor chip emits primary electromagnetic radiation via the emission side. The semiconductor chip is embedded in the housing body and laterally surrounded by the housing body. The emission side is on the rear side and the top side is downstream of the underside along a main emission direction of the semiconductor chip. The metal layer is at least partially reflecting or absorbing radiation generated by the optoelectronic component.

Abstract: A light-emitting device comprises a substrate comprising a sidewall, a first top surface, and a second top surface, wherein the second top surface is closer to the sidewall of the substrate than the first top surface to the sidewall of the substrate; a semiconductor stack formed on the substrate comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing street surrounding the semiconductor stack, and exposing the first top surface and the second top surface of the substrate; a protective layer covering the semiconductor stack; a reflective layer comprising a Distributed Bragg Reflector structure covering the protective layer; and a cap layer covering the reflective layer, wherein the second top surface of the substrate is not covered by the protective layer, the reflective layer, and the cap layer.

Abstract: A semiconductor device includes: a plurality of vertical conductive structures, wherein each of the plurality of vertical conductive structures extends through an isolation layer; and an insulated extension disposed horizontally between a first one and a second one of the plurality of vertical conductive structures.

Abstract: A light emitting diode module includes a first conductive device, a second conductive device, an insulating structure and a plating layer. The first conductive device includes a first metal layer and a first protecting layer covering the first metal layer. The second conductive device includes a second metal layer and a second protecting layer covering the second metal layer. The insulating structure covers around the first and the second conductive devices. The plating layer is disposed on the first and the second protecting layers in a first and a second openings of the insulating structure. The insulating structure covers portions of upper surfaces of the first and the second conductive devices. The plating layer covers remaining portions of the upper surfaces of the first and the second conductive devices. Lower surfaces of the first and the second conductive devices are located in the second opening.

Abstract: A tank circuit structure includes a first gate layer, a first substrate, a first shielding layer, a first inductor, a second inductor and a first inter metal dielectric (IMD) layer. The first substrate is over the first gate layer. The first shielding layer is over the first gate layer. The first inductor is over the first shielding layer. The second inductor is below the first substrate. The first IMD layer is between the first substrate and the first shielding layer.

Abstract: A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor (HVFET) gate to be formed in the peripheral region. A high energy implant is performed to form at least one lightly doped region in a source or drain region in the substrate adjacent to the HVFET gate. The HE film is then removed, and a low voltage (LV) logic FET formed on the substrate in the peripheral region. In one embodiment, the LV logic FET is a high-k metal-gate logic FET.

Abstract: According to an embodiment, a magnetoresistive memory device includes a layer stack. The layer stack includes a first ferromagnet, an insulator on the first ferromagnet, and a second ferromagnet on the insulator. A nonmagnet is provided above the layer stack. A first conductor is provided on the nonmagnet. A hard mask is provided above the first conductor. The nonmagnet includes a material that is removed at a first etching rate against a first ion beam. The first conductor includes a material that is removed at a second etching rate against the first ion beam. The first etching rate is lower than the second etching rate.