Patents Examined by Aurangzeb Hassan
  • Patent number: 12072825
    Abstract: A detector circuit is described for start signaling in an eUSB repeater. In an example, a circuit includes an analog differential transceiver configured to receive a differential data signal from a differential data bus and configured to drive a differential data signal to the differential data bus, an analog single-ended transceiver configured to receive a single-ended data signal from a single-ended data bus and configured to drive a single-ended data signal to the single-ended data bus, repeater logic coupled to the analog differential transceiver and the analog single-ended transceiver to repeat data signals between the differential data bus and the single-ended data bus, the repeater logic having an active state and a low power state, and a detection circuit coupled to the analog single-ended transceiver to detect a start signal on the single-ended data bus and to generate a wake signal to the repeater logic upon detecting the start signal.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: August 27, 2024
    Assignee: NXP USA, Inc.
    Inventor: Kenneth Jaramillo
  • Patent number: 12066963
    Abstract: A universal serial bus (USB) server includes USB connectors. Each USB connector is configured to interface via USB to an endpoint server. The server includes a terminal manager configured to issue a command to a first endpoint server via a selected one of the USB connectors. The selected USB connector is associated with and connected to the first endpoint server. The terminal manager is further configured to determine whether a response has been received to the command, and, based on a determination that no response has been received to the command, attempt to power up the first endpoint server through the selected one of USB connectors.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: August 20, 2024
    Assignee: SOFTIRON LIMITED
    Inventors: Phillip Edward Straw, Stephen Hardwick
  • Patent number: 12046083
    Abstract: An interface converter and a vehicle diagnosis system are provided. The interface converter includes a communication contact, pin contacts, and a switch switching apparatus. The pin contacts are plugged into the vehicle-mounted automatic diagnosis system interface. The communication contact is configured to connect to a vehicle diagnosis device, and the switch switching apparatus is configured to link the communication contact with any one pin contact among the pin contacts, so that signals transmitted by the vehicle diagnosis device by means of the communication contact are transmitted to a target pin contact among the pin contacts. Since the switch switching apparatus may link the communication contact to any one pin contact among the pin contacts, the interface converter can be connected to any target pin in an OBD interface of different types of vehicles, thereby increasing the adaptability and compatibility of the interface converter.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: July 23, 2024
    Assignee: AUTEL INTELLIGENT TECHNOLOGY CORP., LTD.
    Inventor: Minghua Zhao
  • Patent number: 12026628
    Abstract: A broadcast subsystem of a processor system includes: a set of broadcast buses, each broadcast bus in the set of broadcast buses electrically coupled to a subset of primary memory units in the set of primary memory units; a primary memory unit queue: configured to store a first set of data transfer requests associated with the set of primary memory units; electrically coupled to the data buffer a broadcast scheduler: electrically coupled to the primary memory unit queue; electrically coupled to the set of broadcast buses; and configured to transfer source data from the data buffer to a target subset of primary memory units in the set of primary memory units via the set of broadcast buses based on the set of data transfer requests stored in the primary memory unit queue.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: July 2, 2024
    Assignee: Deep Vision Inc.
    Inventors: Raju Datla, Mohamed Shahim, Suresh Kumar Vennam, Sreenivas Aerra Reddy
  • Patent number: 12007923
    Abstract: A universal serial bus (USB) hub with a multi-mode transmission physical layer and method thereof are provided. The hub includes a control unit and a hub controller. The hub controller is electrically connected to an upstream connection port, downstream port and the control unit for controlling a plurality of transmission modes of a differential signal to mitigate an issue of signal decay by the multi-mode transmission physical layer.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: June 11, 2024
    Assignee: GENESYS LOGIC, INC.
    Inventor: Wei-te Lee
  • Patent number: 12007925
    Abstract: A device includes a serial interface, such as Universal Serial Bus (USB) interface, having two operating modes. The first operating mode has a higher data transfer rate than the second operating mode, but also causes greater interference affecting use of a wireless network. To prevent loss of connectivity from the wireless network, when a detected signal strength associated with the wireless network is less than a threshold value, the interface is switched from the first operating mode to the second operating mode to reduce interference to use of the wireless network. During times when detected signal strength for the wireless network is high, the interface is switched to the first operating mode to allow for higher data transfer rates.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: June 11, 2024
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Yan Xie, Aneesh Kachroo, Chung Wai Benedict Ng, Arun Sundaram Subbanarayanan
  • Patent number: 12002513
    Abstract: Control logic within a memory control component outputs first and second memory read commands to a memory module at respective times, the memory module having memory components disposed thereon. Interface circuitry within the memory control component receives first read data concurrently from a first plurality of the memory components via a first plurality of data paths, respectively, in response to the first memory read command, and receives second read data concurrently from a second plurality of the memory components via a second plurality of data paths, respectively, in response to the second memory read command, the first plurality of the memory components including at least one memory component not included in the second plurality of the memory components and vice-versa.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: June 4, 2024
    Assignee: Rambus Inc.
    Inventors: Gary B. Bronner, Brent Steven Haukness, Mark A. Horowitz, Mark D. Kellam, Fariborz Assaderaghi
  • Patent number: 12001366
    Abstract: An in-vehicle control device a mainboard with at least one connection exposed at a first panel of a housing. One or more connectors in a second panel of the housing are interconnected with the mainboard and accessible from outside the housing for connecting the mainboard to a vehicle system. A mounting frame cooperates with the housing at the first panel of the housing exposing the connection to the mainboard, and at least one interchangeable node, computing node and/or connectivity node, is detachably connected to the mounting frame. The at least one interchangeable node has a connector for connecting to the mainboard, and at least one System-on-a-Chip (SoC) having scalable performance capabilities, or a high-performance antenna.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: June 4, 2024
    Assignee: Harman Becker Automotive Systems GmbH
    Inventors: Krunoslav Orcic, Günther Kraft, Jibin Yuan
  • Patent number: 11977505
    Abstract: A system, method, and computer-readable medium for performing a data center connectivity management operation. The connectivity management operation includes: providing a data center asset with an embedded data center asset client module and a passthrough device; establishing a secure communication channel between the embedded data center asset client module and a connectivity management system; exchanging information between the embedded data center asset client module and the connectivity management system via the secure communication channel between the connectivity management system client and the connectivity management system, the information including an operating system image; and, provisioning an operating system to the data center asset via the embedded data center asset client module and the passthrough device.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: Dell Products L.P.
    Inventors: Christopher Atkinson, Eric Williams, Michael E. Brown, Jason Shaw
  • Patent number: 11977504
    Abstract: An information handling system may include a host system, a management controller configured to provide out-of-band management of the information handling system, and a network interface including a network interface storage resource. The management controller may be configured to: receive, from the host system, information relating to installation of a network interface operating system; transmit the information to the network interface; and cause the network interface to install the network interface operating system onto the network interface storage resource.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 7, 2024
    Assignee: Dell Products L.P.
    Inventors: Deepaganesh Paulraj, Sandesh Hadhimane Balakrishna, Jon Vernon Franklin, Sanjay Rao, Chandran Venkatachalam
  • Patent number: 11977502
    Abstract: A monolithic integrated circuit that supports multiple industrial Ethernet protocols, fieldbus protocols, and industrial application processing, thereby providing a single hardware platform that may be used to build various automation devices/equipment implemented in an industrial network, such as controllers, field devices, network communication nodes, etc.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: May 7, 2024
    Assignee: Schneider Electric Industries SAS
    Inventors: Patrice Jaraudias, Jean-Jacques Adragna, Antonio Chauvet, Gary R. Ware
  • Patent number: 11971845
    Abstract: An encapsulation block for a digital signal processing (DSP) block. The encapsulation block includes DSP block having an input terminal, an output terminal, and an input clock. The encapsulation block also includes pacing control network operatively connected with the input terminal, the output terminal, and the input clock of the DSP block. The input terminal of the DSP block is configured to receive a samples-in data stream inputted at a predefined clock period defined by the input clock. The output terminal of the DSP block is configured to receive a samples-out data stream outputted at a predefined paced parameter. The pacing control network is configured to control data flow at the samples-in data stream and the samples-out data stream independently of the DSP block.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: April 30, 2024
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: David D. Moser, Christopher N. Peters, Daniel L. Stanley, Umair Aslam, Elizabeth J. Williams, Angelica Sunga
  • Patent number: 11971758
    Abstract: A communication device insertable into an external electronic device is provided.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jisang Kim, Jinsu Kim, Chunsoo Lee, Soonin Jeong, Jinchul Choi
  • Patent number: 11960416
    Abstract: Techniques including a memory controller with a set of memory channel queues, wherein memory channel queues of the set of memory channel queues correspond to memory channels to access a set of memory modules, a first arbitration module, and a second arbitration module. The memory controller is configured to receive a first memory request from the peripheral and place one or more portions of the first memory request in the memory channel queues of the set of memory channel queues. The first arbitration module is configured to determine an arbitration algorithm, select a first memory channel queue based on the arbitration algorithm, present the one or more portions of the first memory request in the selected first memory channel queue to the second arbitration module, and output the presented one or more portions of the first memory request based on a selection by the second arbitration module.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: April 16, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Daniel Brad Wu, Abhishek Shankar, Mihir Narendra Mody, Gregory Raymond Shurtz, Jason A. T. Jones, Hemant Vijay Kumar Hariyani
  • Patent number: 11947481
    Abstract: The application discloses a terminal and a Type C interface anti-corrosion method. In the terminal, a processor is separately connected to a motion sensor and an interface chip. The interface chip is separately connected to the processor and a CC pin in a first Type C interface. The motion sensor is configured to monitor a motion status of the terminal, and the processor is configured to control, according to the motion status of the terminal, the interface chip to configure the CC pin of the first Type C interface to be in a low-level mode when it is determined that the motion status of the terminal changes from a moving state to a static state. When the motion status of the terminal changes from the moving state to the static state, the change in the motion status of the terminal is that the terminal is disconnected from an external device.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 2, 2024
    Assignee: Honor Device Co., Ltd.
    Inventors: Jianli Chen, Chenlong Li, Yupeng Qiu
  • Patent number: 11935051
    Abstract: An electronic device includes a slave interface configured for coupling to a machine controller of a machine via a multi-drop bus (MDB), a host interface configured for coupling to a first peripheral device of the machine, and memory storing one or more programs to be executed by the one or more processors and comprising instructions for: registering the electronic device as a slave to the machine controller, registering the first peripheral device as a slave to the electronic device, receiving from a mobile device a request to access signals generated by the first peripheral device, validating the request, and sending a reset command to the first peripheral device via the host interface, the reset command including a directive to update a signal destination address of the first peripheral device from a controller address of the machine controller to a device address of the electronic device.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: March 19, 2024
    Assignee: PayRange, Inc.
    Inventor: Paresh K. Patel
  • Patent number: 11930611
    Abstract: Systems are provided where a chassis houses an Information Handling System (IHS). The chassis includes a motherboard with one or more CPUs configured to operate as a root complex for a PCIe switch fabric that includes a plurality of PCIe devices of the IHS. The chassis also includes an I/O module providing I/O capabilities for the motherboard. The I/O module includes a network controller configured to allocate network bandwidth for use by a hardware accelerator sled installed in the chassis, unless an integrated network controller is detected as a component of a hardware accelerator baseboard installed in the hardware accelerator sled. The I/O module also includes a PCI switch configured to operate with the CPUs as the root complex of the PCIe switch fabric and further configured to operate with the hardware accelerator baseboard as the root complex of the PCIe switch fabric.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: March 12, 2024
    Assignee: Dell Products, L.P.
    Inventors: Douglas Simon Haunsperger, Walter R. Carver, Bhavesh Govindbhai Patel
  • Patent number: 11921651
    Abstract: An integrated circuit is described. This integrated circuit may include: an interface module with a first power domain and a second power domain. The first power domain may include a digital controller, and the second power domain may include a first analog front end (AFE) circuit. Moreover, the interface module may include up/down level shifters that communicate electrical signals that include a DC component from the first power domain to the second power domain. In some embodiments, the integrated circuit may provide a fully on-chip solution to handle level shifting between the AFE circuit and a digital controller in Universal Serial Bus (USB) 2.0 during communication of electrical signals in a full-speed mode and/or a high-speed mode.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: March 5, 2024
    Assignee: AyDeeKay LLC
    Inventors: Mohammad Radfar, Scott David Kee, Jeffrey Michael Zachan, Craig Petku
  • Patent number: 11922218
    Abstract: Communication fabric-coupled computing architectures, platforms, and systems are provided herein. In one example, an apparatus includes a management entity configured to establish a compute unit comprising components from among a plurality of physical computing components by at least instructing a communication fabric communicatively coupling the plurality of physical computing components to establish logical isolation within the communication fabric to form the compute unit. Responsive to an indication of a change in workload associated with at least a software component deployed to a processing element of the compute unit, the management entity is configured to adjust the logical isolation to alter a quantity of the plurality of physical computing components in the compute unit in accordance with the change in the workload.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: March 5, 2024
    Assignee: Liqid Inc.
    Inventors: Christopher R. Long, James Scott Cannata, Jason Breakstone
  • Patent number: 11914537
    Abstract: Techniques are disclosed for managing the connection assignments of a plurality of accessory devices to one or more hub devices. In one example, a user device acting as a leader device receives an assignment request from an accessory device. The user device may obtain information corresponding to hub attributes from the one or more hub devices. The user device may also obtain accessory traits from the accessory device. The user device can compare the accessory traits with the hub attributes to determine a connection score for each hub device. The user device can then assign the accessory device to the hub device with the highest connection score.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: February 27, 2024
    Assignee: Apple Inc.
    Inventors: Jared S. Grubb, Robert M. Stewart, Gabriel Sanchez, Zaka ur Rehman Ashraf, David J. Chandler