Abstract: Methods are provided for controlling voiding caused by gasses in solder joints of electronic assemblies. In various embodiments, a preform can be embedded into the solder paste prior to the component placement. The solder preform can be configured with a geometry such that it creates a standoff, or gap, between the components to be mounted in the solder paste. The method includes receiving a printed circuit board comprising a plurality of contact pads; depositing a volume of solder paste onto each of the plurality of contact pads; depositing a solder preform into each volume of solder paste; placing electronic components onto the printed circuit board such that contacts of the electronic components are aligned with corresponding contact pads of the printed circuit board; and reflow soldering the electronic components to the printed circuit board.

Abstract: The apparatus for manufacturing an iron core for a dynamo-electric machine according to an embodiment of the present invention is provided with a rotary layering part for layering while rotating an iron core material punched from an electromagnetic steel sheet, a drive source for generating a drive force for rotating the rotary layering part, and a drive force transmission part for transmitting the drive force generated by the drive source to the rotary layering part. The drive force transmission part is configured from a plurality of gears arranged between the drive source and the rotary layering part. The rotary layering part is provided with a rotation position establishing means for establishing the rotation position of the rotary layering part.

Abstract: An electronic module having an electromagnetic shielding structure and its manufacturing method are provided. At first, a first substrate and a second substrate are separately provided. At least one electronic element and at least one connection pad are formed on a surface of the first substrate. The second substrate includes a conductive film and at least one conductive bump is formed on a surface of the conductive film. The first substrate and the second substrate are laminated together wherein the conductive bump is aligned with and connected to the connection pad to obtain the electronic module.

Abstract: A circuitized structure with a 3-dimensional configuration. A base structure is provided that includes an insulating substrate of electrically insulating material with a flat configuration, and further includes an electric circuit including at least one layer of electrically conductive material arranged on the insulating substrate. The insulating material includes a thermosetting material being partially cured by stopping a cure thereof at a B-stage before reaching a gel point. The base structure is formed according to the 3-dimensional configuration, and the cure of the thermosetting material is completed.

Abstract: A method of making a fusion bonded circuit structure. A substrate is provided with a seed layer of a conductive material. A first resist layer is deposited on the seed layer. The first resist layer is processed to create first recesses corresponding to a desired first circuitry layer. The first recesses expose, portions of the seed layer of conductive material. The substrate is electroplated to create first conductive traces defined by the first recesses. The first resist layer is removed to reveal the first conductive traces. The substrate is etched to remove exposed portions of the seed layer adjacent the first conductive traces. A portion of the seed layer is interposed between the first conductive traces and the substrate. A first layer of LCP is fusion boned to the first major surface of the substrate to encapsulate the first conductive traces in an LCP material. The first LCP layer can be laser drilled to expose the conductive traces.

Abstract: A device for the production of cable sensors that each have at least one sensor and a cable trimmed to a variably pre-definable length includes at least two processing units, and at least one conveying unit. The processing units are configured to load and cut a cable blank, and are further configured to sequentially convey the cable blank along a pre-defined motion track. At least one deflection unit is positioned between adjacent processing units. Each deflection unit includes at least one deflection element that is in contact with or is configured to contact the cable blank. A displacement unit is assigned to and is configured to modify a position of the deflection element in order to influence a length of the motion track of the cable blank so as to obtain variable lengths of cable.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to via and skip via structures and methods of manufacture. The method includes: forming a first metallization layer with a first capping layer over the first metallization layer; forming a second metallization layer with a second capping layer over the second metallization layer; forming a partial skip via structure to the first metallization layer by removing a portion of the first capping layer and the second capping and depositing conductive material in an opening formed in the second metallization layer; forming a third capping layer over the filled partial skip via and the second capping layer; and forming a remaining portion of a skip via structure in alignment with the partial skip via structure by opening the third capping layer to expose the conductive material of the partial skip via.

Abstract: Microelectronic assemblies and methods of making the same are disclosed.

Abstract: A dismantling device and a method for dismantling a backlight unit are provided, and the dismantling method includes: placing a liquid crystal module that includes a liquid crystal panel and a backlight unit placed oppositely and connected by a bonding portion onto a supporting table; bringing a line cutting portion that includes two ends and a cutting line therebetween into a gap between the liquid crystal panel and the backlight unit, with at least one of the two ends and the liquid crystal module configured to be movable with respect to each other; and applying a cutting force upon the bonding portion with the line cutting portion along a plane where the bonding portion is located, so as to separate the backlight unit from the liquid crystal panel. This method decreases the force upon the backlight unit to reduce chances of damaging the backlight unit during dismantling the same.

Abstract: A method for manufacturing a shaping structure having a generally helical profile and configured to support electrodes for delivering electric energy into a cylindrical lumen of a patient. The method comprises providing a mandrel with a circular cylindrical shape and forming a first hole in the mandrel along the elongate axis, such that opposing ends of a bore of the first hole emerge at the proximal end and at the distal end; forming a second hole in the mandrel to extend from the curved surface to connect with the first hole; wrapping a metal wire around the mandrel; and inserting opposing ends of the metal wire into the second and the third hole respectively, and threading the opposing ends of the metal wire until they emerge from the opposing ends of the bore of the first hole; finally, heating the mandrel and the wire.

Abstract: A method of making printed circuit board vias using a double drilling and plating method is disclosed. A first hole is drilled in a core, the first hole having a first diameter. The first hole is filled and/or plated with an electrically conductive material. A circuit pattern may be formed on one or two conductive layers of the core. A multilayer structure may then be formed including a plurality of cores that also include pre-drilled and plated via holes, wherein at least some of the pre-drilled and plated via holes are aligned with the first hole. A second hole is then drilled within the first hole and the aligned pre-drilled and plated holes, the second hole having a second diameter where the second diameter is smaller than the first diameter. A conductive material is then plated to an inner surface of the second hole.

Abstract: A reed for a reed switch and a reed switch are provided. The reed may include a first portion having a first thickness and a first length, a second portion having a second thickness and a second length, and a hinged portion disposed between the first portion and the second portion, the hinged portion having a third thickness and a third length, wherein the third length is less than 150% of the first thickness and the third thickness is less than each of the first thickness and the second thickness. The reed switch may include the reed disposed in an insulating housing with a reed deformer to deform the reed.

Abstract: A crimping die includes a tool engaging surface, a crimping area, and at least one selecting aperture to assist a user in selecting an appropriate connector or an appropriate conductor for use with the crimping die. The crimping die may include a first selecting aperture indicating an appropriately sized connector to be crimped with the die, a second selecting aperture indicating a minimum sized conductor to be crimped with the die, and a third selecting aperture indicating a maximum sized conductor to be crimped with the die.

Abstract: A coaxial cable of the present invention comprises a center conductor, a dielectric surrounding the center conductor, a shielding tape surrounding the dielectric, a braided metal surrounding the shielding tape, and an outer jacket surrounding the braided metal. The shielding tape comprises: (i) a first shielding layer bonded to a first separating layer; (ii) a second shielding layer bonded to the first separating layer and a second separating layer; and (iii) a third shielding layer bonded to the second separating layer. The present invention eliminates the potential problem of the outer shielding structures separating and interfering with connector attachment. Furthermore, the use of three or more shielding layers in the shielding tape of the present invention improves the flex life of the shield tape by covering micro-cracks in the metal layers with additional shielding layers, thus reducing signal egress or ingress.

Abstract: A method of forming an multi-chip carrier that includes providing a trace structure using an additive forming method. The method includes forming a metal layer on a trace structure to provide electrically conductive lines. A dielectric material may then be formed on the electrically conductive lines to encapsulate a majority of the electrically conductive lines. The ends of the electrically conductive lines that are exposed through the upper surface of the dielectric material provide a top processor mount location and the ends of the electrically conductive lines that are exposed through the sidewalls of the dielectric material provide a sidewall processor mount location.

Abstract: A packaged microelectronic component includes a substrate and a semiconductor die coupled to a top surface of the substrate. A method of attaching the packaged microelectronic component to a secondary structure entails applying a metal particle-containing material to at least one of a bottom surface of the substrate and a mounting surface of the secondary structure. The packaged microelectronic component and the secondary structure are arranged in a stacked relationship with the metal particle-containing material disposed between the bottom surface and the mounting surface. A low temperature sintering process is performed at a maximum process temperature less than a melt point of the metal particles to transform the metal particle-containing material into a sintered bond layer joining the packaged microelectronic component and the secondary structure. In an embodiment, the substrate may be a heat sink for the packaged microelectronic component and the secondary structure may be a printed circuit board.

Abstract: Disclosed herein are technologies related to film-insert molding (FIM) with deposited light-generating sources, such as printed light-emitting diodes. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.

Abstract: [Problem] To allow an efficient sheet layout of a flexible printed circuit board having a plurality of cable sections extending in different directions and to improve a yield.