Abstract: A three-stage Darlington transistor circuit having a power transistor (T.sub.3), a driver transistor (T.sub.2) and an initial transistor (T.sub.1) is provided. The collectors of these three transistors are connected with one another, while the emitter of the driver transistor (T.sub.2) is connected to the base of the power transistor (T.sub.3), and the emitter of the initial transistor (T.sub.1) is connected to the base of the driver transistor (T.sub.2). Connected to the base of the driver transistor (T.sub.2) is a series circuit comprising a first resistor (R.sub.1), which is connected directly to this base, and a Zener diode (ZD), the anode of the Zener diode being connected with the resistor (R.sub.1); and a second resistor (R.sub.2); the second resistor (R.sub.2) is connected in parallel to the emitter-base path of the driver transistor (T.sub.2). Upon the attainment of a predetermined voltage at the cathode of the Zener diode (ZD), the driver transistor (T.sub.2) and the power transistor (T.sub.

Abstract: An easily testable integrated logic circuit utilizes a plurality of flip-flops to form a feedback shift register. In some embodiments, means are provided for selectively forming the flip-flops into a feedback shift register and for selectively supplying either the flip-flop contents or a random signal as partial inputs to the combinational logic circuit. In other embodiments, the feedback shift register is coupled to the AND logic array outputs of a combinational circuit which also includes and OR logic array.

Abstract: In a peripheral driver circuit a switching output transistor is operated from digital logic control and is provided with a shut off circuit which turns the output transistor off when its collector supply current exceeds its saturation current. A controlled base drive current is generated in a circuit that includes a scaled reference transistor that is operated at the same current density and the same collector voltage as the output transistor at its rated current. The reference transistor base current is amplified in a circuit having a current gain equal to the scaling between the reference and output transistors. Thus the base current applied to the output transistor is related to the driver rated current which ensures that saturation will occur up to at least the rated current and above which the shut off will be effective.

Abstract: A diode driver circuit having low power consumption. A differential amplifier (17) receives phase inverted signals (a, a'). During a first phase switch, a low impedance circuit (9) is driven to provide a reverse voltage which switches the driven diode (13) from forward bias to reverse bias while discharging the forward charge stored therein. During this time, the constant current circuit (11) is cut off due to the charging of the capacitor (10). When a second phase switch occurs, the capacitor (10) discharges, causing the constant current circuit (11) to provide an excess current which discharges the reverse stored charge of diode (13) and switches the diode from reverse bias back to forward bias.

Abstract: Each of a plurality of circuit paths between a common input terminal and respective output terminals includes a switching device which can be switched between a high and a low impedance state. When a device in one path is switched into its low impedance state in response to a path selection signal, the devices in the remaining paths automatically are switched to their high impedance state in response to a portion of the signal to be passed through the path with the low impedance device. In this way, one of the circuit paths may be selected for coupling the input terminal to a selected output terminal and all other circuit paths are automatically blocked.

Abstract: A power switching circuit for controlling the power from a DC supply to a regenerative load. The switching circuit includes a plurality of parallel connected MOSFETs. A first diode is connected in parallel with the MOSFET switches and poled to conduct reverse current from the load. A second diode is connected in series with the MOSFETs to block the flow of reverse current through the MOSFETs.

Abstract: A pulse width modulator circuit for use with DC power converters. The circuit contains an oscillator having a nonlinear output, a first comparator for comparing the output of the oscillator with an input voltage, and a second comparator for selecting portions of the output waveform of the first comparator for supplying to the output of the modulator.

Abstract: In a logic circuit, a transistor performs the function of a binary switching device and is controlled by the currents applied to the base thereof through differently weighted resistors. The resistors are connected to inputs to which signals representing different binary variables can be applied. The base of the transistor is also connected to a source of voltage through a variable resistor. By varying the value of the variable resistor, the logical function performed by the gate can be varied.

Abstract: A logarithmic amplifier with a large range of input signal magnitude at high frequency. The amplifier comprises a number of similar stages arranged in cascades. Each stage has a logarithmic converter and an input stage constructed to maintain a consistent phase of signal and to feed a different range of signal amplitude to the respective converters. The outputs are summed.

Abstract: A liquid crystal driver circuit has first to fourth resistors serially connected between a positive power source terminal and a reference power source terminal, first and second MOS transistors respectively connected in parallel with the first and fourth resistors, a common electrode driver circuit for generating common electrode bias signals in accordance with common electrode selection signals, and a segment electrode driver circuit for generating segment electrode bias signals in accordance with segment data. A third switching MOS transistor is coupled between the reference power source terminal and the series circuit of the first to fourth resistors.

Abstract: An analog switch device has p- and n-channel metal oxide semiconductor field effect transistors, each having a source electrode, a drain electrode, a gate electrode and a substrate electrode. The p- and n-channel metal oxide semiconductor field effect transistors are connected parallel to each other. First and second analog signals are received and produced at a pair of nodes between the p- and n-channel metal oxide semiconductor field effect transistors. Control signals which are inverted with each other are respectively supplied to the gate electrodes of the p- and n-channel metal oxide semiconductor field effect transistors. A voltage buffer circuit is provided for applying a predetermined voltage to the substrate electrode of one of the p- and n-channel metal oxide semiconductor field effect transistors so as to decrease a change in a threshold voltage due to the source-substrate bias effect.

Abstract: A digital driver circuit employs an output transistor having an uncommitted collector that can act as a current sink connectable to a peripheral element that is to be controlled. The base of the output transistor is coupled to a driver circuit that controls the output transistor conduction. The driver input is coupled to a pair of cascaded current mirrors which act to switch the driver off and on. An input stage is coupled to control the current mirrors in response to a low current logic signal.

Abstract: An output driver circuit for fast memories and microprocessors and the li The driver circuit is responsive to a binary input voltage and includes first and second signal control paths respectively coupled to a pair of series connected output stage transistors coupled between two high and low reference voltages and switched alternately between conducting and non-conducting states in mutual opposition to provide a binary output voltage substantially equal to either of the two reference voltages depending upon the binary state of the input voltage. Additionally included is an anticipatory circuit having means responsive to both an externally applied precharge signal and a feedback signal corresponding to the binary state of the output voltage which alternately predrive the transistors close to their respective conducting switching points for increasing the speed of transition of the transistors between conductive and non-conductive states.

Abstract: A flame detecting apparatus used in a combustion control apparatus for a water heater provided with a gas burner comprises a pressure switch serving as means for detecting presence or absence of flame and a voltage comparison circuit serving as means for determining the presence or absence of the flame on the basis of the input signal supplied by the pressure switch. The voltage comparison circuit has an offset voltage and has a non-inverting input terminal connected only to the ground.

Abstract: An input signal is applied to a first flip-flop whose output is coupled to the input of a second flip-flop. The two flip-flops are clocked, at a time t.sub.1 and at a subsequent time t.sub.2, for storing the value (SI.sub.1) of the input signal at time t.sub.1 in one flip-flop and for storing the value (SI.sub.2) of the input signal at time t.sub.2, in the other flip-flop. Logic gates coupled between the first and second flip-flops and a third, set/reset, flip-flop sense the values (SI.sub.1 and SI.sub.2) of the input signal stored by the first and second flip-flops and either: (a) set the third flip-flop to a condition indicative of the value of the input signal at times t.sub.1 and t.sub.2 if SI.sub.1 is equal to SI.sub.2 ; or (b) maintain the third flip-flop undisturbed in the state to which it was set just prior to t.sub.1 if SI.sub.1 is not equal to SI.sub.2.

Abstract: An integrated circuit device such as a gate array or a master slice LSI device which is formed on a semiconductor chip and which comprises an inner cell array including a plurality of inner cells, an outer cell array including a plurality of outer cells formed around the inner cell array, a power supply portion having one or more outer power supply lines, and a plurality of inner power supply lines connected to the outer power supply lines and formed on the inner cell array. The ratio of the pitch length of the outer cells to the pitch length of the inner power supply lines or the inner cells is determined by the ratio of two integers. In the integrated circuit device, at least one set of an outer cell, and an inner cell which are arranged in a predetermined positional relation, is formed a plurality of times along a side of the semiconductor chip.

Abstract: A circuit for eliminating transient pulses generated by bouncing mechanical contacts within a switch. A shift register accepts a series of binary input signals from the switch and propagates the signal out the register in parallel to a logic device for generating a resultant binary signal corresponding to the switch's debounced signal state.

Abstract: An optically-coupled/isolated electronic single pole double throw power relay switch with few parts routes a.c. power to one of two loads in response to a low-level control signal. Two gate-controlled bidirectional thyristors (Triacs) are made to switch in a complementary mode by gate-controlling one Triac from a light-sensitive element, and gate-controlling the other Triac from a gating circuit responsive to voltage appearing across the first Triac in its OFF state.

Abstract: An error amplifier receives an on/off signal and supplies an error signal to an integrator. The latter provides a ramp output, which is fed back to the error amplifier whereby the error signal therefrom further is dependent upon the ramp output. The error signal is selectively clamped positively and negatively whereby the resulting ramp output has a constant ramp time, with no ramp on/off delay.

Abstract: An electrical control circuit particularly adapted for providing high current pulses in a wide frequency pulse range. The circuit is comprised of a timing and control circuit, a high power switching circuit, and an interfacing isolating circuit. The timing and control circuit includes a plurality of variable frequency pulse generators whose outputs are distinguished and combined to form a single wave signal. The power switching circuit includes a plurality of high speed switches for applying high current pulses to a load in associated response to the wave signal. The isolating circuit includes a plurality of isolating switches for insulating the timing and control circuit from interference from the power switching circuit while permitting the timing and control circuit output to control the application of higher energy and frequency pulses by the power switching circuit to a load than was heretofore available.