Abstract: A Pockels cell driver useful to operate the Pockels cell as an optical shutter to select one or more laser pulses out of a train of laser pulses when the Pockels cell is placed between crossed polarizers. The Pockels cell is connected through a storage capacitor, of higher capacitance than the capacitance of the Pockels cell, directly to a high voltage source and is charged to high voltage. The cell is charged and the storage capacitor is discharged through a microwave triode which is triggered by an avalanche transistor switch circuit. By directly charging the Pockels cell, lower currents are used than with conventional Pockels cell drivers using transmission lines to connect to the Pockels cell and gas filled tubes to switch a pulse-forming line.

Abstract: A dual mode timer circuit has first and second two-input NOR gates with inputs connected to receive a trigger pulse and outputs respectively coupled to first and second RC charging networks. An output NOR gate has its two inputs connected to the RC charging networks respectively, and its output connected to an output terminal. A control input voltage signal is coupled to a fourth NOR gate whose output is connected to control activation of the second RC charging network which has a shorter time constant than the first RC network. The output signal duration is dependent upon which RC network is effective. The output terminal is connected to the other inputs of the first and second NOR gates to render the circuit independent of trigger pulse duration.

Abstract: In power circuit designs, it is sometimes necessary to connect two or more semiconductor power switches in parallel and to simultaneously operate both so that current levels in excess of the rated current handling capability of one of the devices can be conducted. Such operation, however, encounters the problem of current sharing which results from variations in the characteristics of the parallel-connected devices. The method of the present invention obviates the difficulties encountered with current sharing by operating N parallel-connected semiconductor devices one at a time in sequential fashion so that each device conducts an average current equal to the desired average output current divided by N.

Abstract: A high withstand voltage Darlington transistor circuit is comprised of a Darlington transistor and a bypass circuit. This bypass circuit is comprised of a bypass transistor whose collector is connected to the base of an earlier stage transistor of the transistors which make up the Darlington transistor and whose emitter is connected to the base of a later stage transistor. The base of the bypass transistor is connected to the collector of the Darlington transistor via a diode and the resistor. When the collector-emitter voltage of the Darlington transistor crosses a specified value, the bypass transistor operates and a base current of the Darlington transistor is supplied to the base of the later stage transistor without being supplied to the earlier stage transistor. The result is that the current amplification ratio of the Darlington transistor is substantially decreased, and the withstand voltage is substantially increased.

Abstract: A current conversion circuit employing negative feedback includes an operational amplifier, a diode and a time constant circuit cascade connected, a transistor having a base connected to the output of the time constant circuit, and an impedance element connected between the inverting input terminal of the operational amplifier and the emitter of the transistor to obtain conversion current from the collector of the transistor. With this arrangement, the inventive circuit can perform the same functions as a conventional current conversion circuit but has a simpler construction and smaller number of components.

Abstract: A drive circuit having a transformer with its secondary winding connected to the base of a transistor and its primary winding connected to a drive source by which the transistor is driven to switch, wherein a directional element is connected between a tap provided on the secondary winding and one end of the secondary winding so as to select the ratio between the forward base current and reverse base current of the transistor.

Abstract: A driving circuit which can operates stably without being affected by noise or the like is disclosed.

Abstract: A ramp function generator is provided which produces a precise linear ramp unction which is repeatable and highly stable. A derivative feedback loop is used to stabilize the output of an integrator in the forward loop and control the ramp rate. The ramp may be started from a selected baseline voltage level and the desired ramp rate is selected by applying an appropriate constant voltage to the input of the integrator.

Abstract: A dual bus driver including a voltage input, a current source, a single data input, a first driver transistor for driving one bus, a second driver transistor for driving the other bus, a first pair of differential transistors for turning on either the first driver transistor or the second driver transistor to couple an input signal at the data input to the one bus or the other bus, and a second pair of differential transistors for disabling both driver transistors. By providing a driver that drives both buses, reduced power consumption, fewer circuit components and less integrated circuit layout complexities are achieved.

Abstract: The invention relates to a circuit arrangement having several signal paths which can be activated by a switchable current source. For the current source, use is made of I.sup.2 L gates whose injector connections are combined in two groups. When a switch-over is made from one signal path to another, a decreasing current is applied to the injector connection of the I.sup.2 L gate connected to one signal path while an increasing current is applied to the corresponding connection of the I.sup.2 L gate associated with the other signal path.

Abstract: The invention relates to an electronic switching apparatus having a power transistor as a switching element and an RCD circuit in parallel with the CE path of the power transistor. The apparatus has an anti-saturation circuit with a diode thereof connected to the junction between the capacitor and resistor of the RCD circuit so that the anti-saturation circuit only becomes effective when the RCD capacitor has discharged the high operating voltage to below the low control voltage of the control signal generator.

Abstract: An input drive apparatus of a power transistor is constituted by a transformer having a core with an air gap, a primary winding energized from an input source in accordance with a forward input bias instruction, and a secondary winding, a first transistor electrically insulated from the input source and turned ON by the voltage of the secondary winding for supplying a forward input bias to the power transistor, and a second transistor electrically insulated from the input source and turned ON in accordance with a reverse input bias instruction for supplying electromagnetic energy stored in the transformer to the input electrode of the power transistor to act as a reverse bias current in accordance with a reverse bias instruction.

Abstract: This teaches that logic circuits such as Cascode circuits can be D.C. tested for normally untestable defects, such as emitter shorts or collector opens, by applying to the output of the circuit, or portion of the circuit, under test an additional voltage though an impedance. The specific embodiment teaches a resistor and diode in series as the impedence.

Abstract: A log-amp or log-ratio circuit for producing a temperature-independent output signal corresponding to the logarithm of the ratio of a pair of input currents. The basic logarithm function is generated by a pair of opposed P-N junctions through which the respective input currents flow. Temperature compensation is effected by a circuit including a second pair of opposed P-N junctions which receive a PTAT current split between the junctions in accordance with a modulation factor proportional to the desired logarithmic function. The temperature-induced signal variations produced by the PTAT current source are equal and opposite to the temperature-induced signal variations produced in the first pair of P-N junctions, and a temperature-independent output signal is developed in accordance with the modulation factor applied to the PTAT current through the second pair of P-N junctions.

Abstract: A solid state relay circuit for switching power to an electrical load including an N-channel MOS-FET (20) having a drain (22) and source (24) and gate (26) terminals with the drain terminal (22) connected to the positive power supply lead (16) and the source terminal (24) connected to the load lead (12). The MOS-FET (20) is driven into conduction by being supplied voltage from a voltage multiplier (28-34) which is in turn supplied by a gated oscillator (36) which receives its power from an amplifier (38). Resistors (74, 76) may be added for slowly allowing the MOS-FET (20) to move into full conduction and/or for slowly decreasing the conduction of the MOS-FET. All this is in response to an electrical signal on a low level signal input lead (18).

Abstract: An adjustable frequency ON/OFF delay circuit 2 is provided by ON and OFF delay counters 6 and 14 and respective adjustable frequency oscillators 4 and 20. The ON delay counter 6 is enabled by an input ON signal and clocked by its oscillator 4 to a given count for outputting a delayed output ON signal. This counter 6 is disabled by an input OFF signal and outputs the OFF signal without delay. The second counter 14 responds to the first counter 6 for outputting the delayed output ON signal without further delay, and for delaying the output OFF signal. Circuit 2 is ideal for proximity switch applications, particularly photoelectric type proximity switches, for providing a delayed output signal following a given sensed condition.

Abstract: A driver circuit is disclosed which is capable of supplying current at a relatively low range for a relatively large supply voltage range. The driver comprises a plurality of output stages designed to operate in parallel. At a low power supply level all the output stages are activated. As the supply voltage is increased the number of output stage is decreased. All the elements of the circuit may be implemented by using transistors so that the whole circuit may be formed on a single IC chip.

Abstract: A circuit for driving a serial data bus with serial logic data that is supplied to the circuit while buffering the logic data supplying circuit from the data bus. The circuit provides logic output pulses having controlled slew rates wherein the input logic data is not distorted but which inhibits undesired high frequency components associated with the fast rise and fall times of the leading and trailing edges of the input logic data pulses. The circuit comprises an inverting amplifier having capacitive feedback between the output and the inverting input of the amplifier, a buffer amplifier between the output of the inverting amplifier and the output of the circuit, and current switching circuitry for sinking and sourcing currents of equal magnitude at the input of the inverting amplifier depending on the relative magnitude of the input logic data pulses.

Abstract: The disclosure relates to a linearizer circuit capable of substantially replicating a non-linear waveform on a piece-wise linear basis by providing a pair of circuits, one capable of reducing the slope of an output circuit curve when a predetermined output level has been reached and the other capable of increasing the slope of an output circuit curve when a different predetermined output level has been reached. Such circuits are cascaded in required order and with predetermined slope parameters to replicate a non-linear curve on a piece-wise linear basis.

Abstract: A plurality of input stages having their outputs connected to provide differential currents to a load. When a bias current flows through a selected one of the input stages, the differential currents are provided in response to a differential signal provided to the selected stage. The input stages are each comprised of a pair of emitter-coupled transistors. Resistors are connected in series with the emitters of the transistors and the bias current is directly proportional to absolute temperature. The resistors may be adjusted to cause the offset voltages of the input stages to substantially equal zero at all temperatures.