Patents Examined by Barry C. Bowser
  • Patent number: 5841293
    Abstract: Integrated circuit chips are screened for susceptibility to latch-up by first applying power and ground to the chips to be tested while limiting current flow to a non-destructive compliance value. Next, the chips are irradiated with a pulse of radiation having an energy dose calibrated to trigger latch-up in latch-up sensitive chips. Upon termination of the radiation, the current is detected. Chips having current persisting at the compliance value are indicated as failing. The current in passing chips returns approximately to the original standby current value. In the preferred embodiment, the radiation is visible light and the radiation energy dose is selected to cause a percentage of chips to latch-up approximating the percentage of failures expected at burn-in.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: November 24, 1998
    Assignee: International Business Machines Corporation
    Inventor: James Marc Leas
  • Patent number: 5773989
    Abstract: A method and apparatus for measuring the concentration of mobile ions in the oxide layer of a semiconductor wafer from the contact potential shift caused by ion drift across the oxide that includes depositing charge (e.g., using a corona discharge device) on the surface of the oxide and heating the wafer to allow mobile ions in the oxide (especially Na.sup.+) to drift. The difference in the contact potential measured before and after heating provides an indication of the mobile ion concentration in the oxide layer.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: June 30, 1998
    Assignees: University of South Florida, Semiconductor Diagnostics, Inc.
    Inventors: Piotr Edelman, Andrew M. Hoff, Lubek Jastrzebski, Jacek Lagowski
  • Patent number: 5757203
    Abstract: In order to measure IDDQ in a large integrated circuit, multiple IDDQ monitors sampling the current drawn by selected portions of the circuit are placed on the integrated circuit chip. The output of each IDDQ monitor is combined and supplied to one output port when any of the IDDQ monitors detect current in excess of a predetermined threshold. The output of each IDDQ monitor is also stored in a memory for subsequent readout at a second output port for detection of particular portions drawing the excessive current.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: May 26, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Charles Allen Brown
  • Patent number: 5757199
    Abstract: The test carrier for the semiconductor integrated circuit device according to the present invention comprises a substrate and a substrate covering sheet. The substrate includes thereon a semiconductor chip, in which a semiconductor integrated circuit is formed, such that electrodes of the semiconductor chip are positioned upwardly. The covering sheet has contact pads to be contacted to the electrodes of the semiconductor chip and formed on one surface thereof, and has connecting wirings to be connected to the contact pads and formed on the other surface thereof.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: May 26, 1998
    Assignee: Fujitsu Limited
    Inventor: Shigeyuki Maruyama
  • Patent number: 5703492
    Abstract: In a fault analysis of large-scale integrated (LSI) circuits, a potential distribution image of a non-defective product and another potential distribution image of a defective product are displayed alternately and continuously in time, so that it is possible to acquire in real time an image of any location within a whole surface of the LSI chip. As a result, it can be viewed as if the potential distribution image of the non-defective product and the potential distribution image of the defective product are overlapped or superimposed with over time. Accordingly, a different portion between the non-defective and defective potential distribution images can be seen distinguishably from a coincident portion between the non-defective and defective potential distribution images, so that it is possible to trace the different portion in real time.
    Type: Grant
    Filed: January 10, 1995
    Date of Patent: December 30, 1997
    Assignee: NEC Corporation
    Inventors: Toyokazu Nakamura, Yasuko Hanagama, Tohru Tsujide, Kenji Morohashi
  • Patent number: 5701088
    Abstract: A method of evaluating a MIS-type semiconductor device which comprises an insulative layer(s) and a conductive layer (s) formed one after another on a semiconductor substrate wherein: using a sample with an interface trapped charge density of 1.times.10.sup.10 /cm.sup.2 .multidot.eV or less and a mobile ionic charge density of 3.times.10.sup.10 /cm.sup.2 or less in said insulative layer, said MIS-type semiconductor device is treated by applying a positive or negative voltage in the range of 1-5 MV/cm between said semiconductor substrate and said conductive layer at a temperature of 100.degree.-300.degree. C.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: December 23, 1997
    Assignee: Shin-Etsu Handotai Co., Ltd
    Inventor: Nobuyoshi Fujimaki
  • Patent number: 5694048
    Abstract: An optical subassembly for monitoring the emission of a semi-conductor laser is disclosed. The subassembly is diced from a wafer having mounted thereon the devices to be tested as well as the testing optical devices. The devices of the wafer are burned-in and those sections of the wafer having lasers that pass the burn-in testing are diced and form the subassemblies of the present invention.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: December 2, 1997
    Assignee: The Whitaker Corporation
    Inventors: Robert A. Boudreau, Hongtao Han, Robert Wallace Roff, Randall Brian Wilson
  • Patent number: 5691635
    Abstract: An auxiliary device (such as probe or the like) identification system for measuring instruments (such as oscilloscopes or voltmeters or the like) incorporates a commercially-available containing stored personality identification information, that is interrogated by the measuring instrument to establish correct operating mode, setup, and scaling to measure electrical signals provided by the auxiliary device. The measuring instrument includes an RF generator, a transceiver, and a demodulator to extract the stored personality information from the transponder.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: November 25, 1997
    Assignee: Fluke Corporation
    Inventors: Rene Paulus Maria Pot, Heinrich Peter Dijkstra
  • Patent number: 5689193
    Abstract: Probes include proximal ends electrically connected to the respective conductive patterns of said insulating substrate, and free ends for being contact with the respective electrode pads of the object. The probes can be buckled in such a manner that the free ends are brought into contact with the respective electrode pads of the object under a predetermined contact pressure. Probes are formed from a wire for wire bonding by means of a wire bonder, and include proximal ends wire-bonded to each corresponding conductive patterns on the insulating substrate, and free ends formed by being cut after the wire is wire-bonded to a dummy substrate.
    Type: Grant
    Filed: July 20, 1995
    Date of Patent: November 18, 1997
    Assignee: Tokyo Electron Limited
    Inventor: Kaoru Matsuda
  • Patent number: 5689194
    Abstract: An apparatus for monitoring and processing of motor currents to determine motor characteristics under various loads. In the preferred embodiment, the invention employs a spectrum analyzer that having a plurality of digitally controlled switched capacitor filters under control of a personal computer. Sampling of both voltage and current simultaneously allows for calculation of instantaneous motor power and power factor, which are used to monitor the motor's performance. An acoustical output, generated under computer control is used to give the operator feedback on the motor's operation. The output signal is derived from low frequency or infrasonic sensing and is then stepped up to a frequency that the operator can hear. This permits the analyst to "hear" the condition of the motor under load. A CRT display to show the frequency spectrum and time display.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: November 18, 1997
    Assignee: Framatome Technologies, Inc.
    Inventors: Reginald D. Richards, II, Robert T. Proffitt, Anthony F. Lexa
  • Patent number: 5677632
    Abstract: A calibrating pickup circuit detects, using primary and secondary pickups, the primary and secondary voltages of an ignition coil of known turns ratio. The pickup circuit includes a programmable gain amplifier, responsive to the detected secondary voltage waveform signal and to a gain control feedback signal for generating an amplified secondary voltage waveform signal wherein the feedback signal has an initial predetermined value in calibration mode and has a calibration value in signal monitor mode. A waveform multiplexing circuit is selectively operable in calibration mode to alternately sample the primary and the amplified secondary voltage waveform signals over a predetermined period to generate a single interlaced waveform signal.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: October 14, 1997
    Assignee: Snap-on Technologies, Inc.
    Inventor: Michael B. Meeker
  • Patent number: 5672965
    Abstract: An evaluation board for evaluating electrical characteristics of an IC package has an electrically insulating support board having signal wire patterns for contact by a measurement probe formed on a first surface and mounting pads for contact with solder balls of an IC package formed on a surface. The signal wire patterns and the mounting pads are electrically connected with each other via through holes formed in the support board. The signal wire patterns are surrounded by and spaced from a ground pattern formed on the first surface.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Kurafuchi, Hiroshi Seki, Mitsuyuki Takada
  • Patent number: 5666064
    Abstract: A semiconductor device comprises a plurality of leads respectively made up of an inner lead and an outer lead, a semiconductor chip electrically connected to the inner leads of the leads, and a package encapsulating at least the inner leads of the leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package has an upper part and a lower part which have mutually different sizes such that a stepped part is formed between the upper and lower parts by the different sizes, and each of the outer leads have a wide part which is wider than other parts of the outer lead extending outwardly of the package only within the stepped part of the package.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: September 9, 1997
    Assignees: Fujitsu Limited, Kyushu Fujitsu Elecronics Limited, Fujitsu Automation Limited
    Inventors: Junichi Kasai, Kazuto Tsuji, Norio Taniguchi, Takashi Mashiko, Masao Sakuma, Yukio Saigo, Yoshiyuki Yoneda, Masashi Takenaka
  • Patent number: 5666065
    Abstract: The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation, and a logic circuit immediately turns off the FET to result in a very short FET on time. If a short is present before the FET is commanded on, a detector and the logic circuit prevents FET conduction to avoid firing or degrading the squib.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: September 9, 1997
    Assignee: Delco Electronics Corp.
    Inventors: Richard Joseph Ravas, Terrell Anderson, Robert Keith Constable
  • Patent number: 5666063
    Abstract: An apparatus and method for laser ablating residue off of probe tips. In one embodiment, the probe tips of the probe needles (16) contact the test pads of an integrated circuit on a wafer (18). The probe tips build up a residue over time. This residue is due to the probe tips coming into contact with integrated circuit wafer layers such as layers (114), (120), (122), (124), and (126). This residue can be vaporized from the surface of the probe needles via exposure to a laser light. The probe needles (16) are exposed to a laser light created by a laser source (28) and ported to the probe tips by a fiber optic cable (26).
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: September 9, 1997
    Assignee: Motorola, Inc.
    Inventors: David A. Abercrombie, Whitson G. Waldo
  • Patent number: 5663654
    Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a die cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical test, it is possible to establish interconnection between the single dice or separate and package the dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: September 2, 1997
    Assignee: Micron Technology, Inc.
    Inventors: Alan G. Wood, Tim J. Corbett, Warren M. Farnworth
  • Patent number: 5661407
    Abstract: The invention provides efficient probe testing of integrated circuits. Bonding pads of the integrated circuits are provided with logic state components and data recording components. Logic circuits of the above components are serially connected to form shift registers. The shift registers permit input and output of data by an integrated circuit test device through a small number of test pads. The number of test pads remain the same for different types of integrated circuits. A single set of test pads may be used to probe test all the integrated circuits of a single semiconductor wafer.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: August 26, 1997
    Assignee: Kawasaki Steel Corporation
    Inventor: Yukio Shibata
  • Patent number: 5656941
    Abstract: TAB tape is used to contact integrated circuit chip electrodes (without actual metallurgical bonding) at approximately 10 grams per lead contact force. The chip is clamped to the TAB leads, and held in place so that the tape site can be transported, tested, and burned-in like a TAB chip on tape. A TAB tape frame is utilized with the inner lead bond fingers angled upwards so that the ends of the fingers perform a scrubbing action on the chip contacts when the IC chip is engaged with the TAB tape slide carrier socket. A silicone bead provides a spring-like action underneath the fingers.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: August 12, 1997
    Inventors: Thomas Alan Bishop, Ernest Ricky Nolan
  • Patent number: 5656929
    Abstract: An economical, wide range and accurate power measurement technique switches an RF detector between an applied RF IN to be measured and a COMPARISON RF IN, to thus develop a difference signal. The difference signal is filtered, amplified by a logarithmic amplifier, and then converted into a DC error signal by a synchronous detector operating in step with the switching of the RF detector. The DC error signal is applied to an integrator whose output is a loop control signal. Assuming a square law detector, the square of the loop control signal is linearly proportional to the applied RF IN once a servo loop is hulled by making COMPARISON RF IN equal to RF IN. The desired power measurement is performed by digitizing the loop control signal and performing the appropriate arithmetic operations thereon. The loop control signal is also applied to an analog multiplier, where it combines with an internal RF reference signal to produce, at the output of an attenuator following the multiplier, the COMPARISON RF SIGNAL.
    Type: Grant
    Filed: October 25, 1995
    Date of Patent: August 12, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Melvin D. Humpherys
  • Patent number: 5654630
    Abstract: A sensor contactlessly driven by a single power supply is disclosed. A current flows in a resistor R.sub.L through the secondary winding of a coil in the direction corresponding to the direction of magnetic fluxes generated in the coil in accordance with discharge or charge mode of a main battery. The input terminal of a voltage follower is connected to the voltage-dividing point of a series circuit including resistors R.sub.1 and R.sub.2 and a reference voltage control circuit. The reference voltage control circuit changes the input voltage of the voltage follower in accordance with the direction of the current flowing in the resistor R.sub.L. It follows therefore that the measurement range is switched in accordance with discharge or charge mode of the main battery, with the result that the overall measurement range can be widened in spite of the fact that only a single power supply +Vcc is used.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: August 5, 1997
    Assignee: Yazaki Corporation
    Inventors: Kenichi Shimoyama, Youichi Arai, Tsutomu Saigo