Patents Examined by Barry C. Bowser
  • Patent number: 5604443
    Abstract: A probe test apparatus comprising a test section for testing a wafer, a cassette having an opening at one side through which the wafer is taken into and out of the cassette, grooves formed in inner faces of both sides of the cassette to hold wafers therein, and a convex member projected downward from the underside of the cassette, a stage on which the cassette is mounted keeping the wafers therein substantially horizontal, and holder members projected upward from the top of the cassette-mounted stage and having a recess into which the convex member of the cassette falls, wherein when the convex member is not fitted into the recess but contacted with the holder members, the wafers in the cassette are tilted and when it is fitted into the recess, they can be kept substantially horizontal in the cassette to thereby position the cassette relative to the test section.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: February 18, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoshisuke Kitamura, Munetoshi Nagasaka
  • Patent number: 5602490
    Abstract: A connector, for use with an automatic test system for testing integrated circuit boards, consists of a non-conductive carrier that supports a plurality of electrically conductive contacts. In a preferred embodiment, the carrier includes a plurality of holes, each of which is filled with a wire mesh. The wire mesh compresses as necessary to accommodate variations in the lengths of the leads of the device-under-test or the wires of a system component, such as the system fixture. In an alternative embodiment, a flexible carrier supports a plurality of wires. The wires may be embedded in the carrier, or they may be wrapped partially around the carrier, to electrically connect leads proximate to top of the carrier with leads or contacts proximate to the bottom of the carrier. In a second alternative embodiment, the connector consists of a plurality of conductive drops, that are strategically placed on the ends of wires, leads or contacts.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: February 11, 1997
    Assignee: GenRad, Inc.
    Inventor: Steven M. Blumenau
  • Patent number: 5602484
    Abstract: A multipath component detector detects the correlation between a received signal and a reference signal in a training period of the received signal and estimates and outputs the multipath received component levels at a plurality of timing points. A component ratio calculator calculates the ratio of each received component to the overall received power. By this, the level ratio of a specified received component can be detected. Power dissipation can be minimized by switching the detector to a differential detector or an adaptive equalizer in accordance with the result of the delay spread measurement.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: February 11, 1997
    Assignee: NTT Mobile Communications Network Inc.
    Inventors: Hiroshi Suzuki, Kazuhiko Fukawa
  • Patent number: 5602489
    Abstract: The present invention describes a method for testing the interconnect networks of a multichip module for opens and shorts. An electron beam lands on a pad of an interconnect network located on a substrate. The electron beam is used to interrogate the pad. An extract grid located above the substrate is maintained at a positive potential. While the electron beam interrogates the pad, the pad emits secondary electrons until such a point that the pad reaches a positive potential near that of the positive potential of the extract grid. The extract grid is then switched to a negative potential. The pad, still being interrogated by the electron beam, then collects secondary electrons until such a point that the pad reaches a negative potential near that of the negative potential of the extract grid. The test time, the length of time it takes for the pad to change from the positive potential to the negative potential, is measured and compared to a reference value.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: February 11, 1997
    Assignee: Alcedo
    Inventors: Auguste B. El-Kareh, Qing-Tang Jiang, MingYang Li
  • Patent number: 5600236
    Abstract: A converter and digital channel selector device is provided which is interconnected between a source measurement unit having a plurality of output terminal connectors and a probe station having a plurality of input probe terminal connectors. The channel selector device is used to selectively connect each one of the plurality of output terminals of the source measurement unit to corresponding one of the plurality of input probe terminal connectors, respectively. The channel selector device includes a converter for generating a plurality of digital control signals and a digital channel select logic circuit which is responsive to the digital control signals for selectively connecting respective ones of a plurality of its input channel connectors connected to the plurality of output terminal connectors to any one of a plurality of its output channel connectors connected to the plurality of input probe terminal connectors.
    Type: Grant
    Filed: November 1, 1994
    Date of Patent: February 4, 1997
    Assignee: VLAI Technology, Inc.
    Inventors: Mark W. Haley, Eric A. Sparks
  • Patent number: 5600257
    Abstract: An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.
    Type: Grant
    Filed: August 9, 1995
    Date of Patent: February 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: James M. Leas, Robert W. Koss, George F. Walker, Charles H. Perry, Jody J. Van Horn
  • Patent number: 5594330
    Abstract: A movement actuator includes an elongate filament made of a flexible material, and a strip of shape memory alloy disposed on the surface of one side of the filament. The shape memory alloy is responsive to actuation signals, heat or electrical signals, for changing its shape and when its shape changes, it causes the filament to move, i.e., bend, to accommodate the change in shape of the alloy. Also included is a signal supply device for selectively applying heat signals or electrical current to the strip of shape memory alloy to cause the alloy to change its shape and cause the filament to bend. Other patterns for the shape memory alloy could be disposed on the filament to cause other kinds of movements. For example, a helical pattern of the shape memory alloy about the filament would cause the filament to twist when the helical pattern were caused to shorten or lengthen.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 14, 1997
    Assignee: Sarcos Group
    Inventor: Stephen C. Jacobsen
  • Patent number: 5594349
    Abstract: An accurate dielectric breakdown prediction method and a prediction method in which accurate time dependent dielectric breakdown (TDDB) characteristics can be obtained on the basis of dielectric breakdown prediction by a step stress method are provided. In this method, dielectric breakdown is predicted on the basis of a plurality of reference currents in accordance with an applied voltage, or a reference current I.sub.cr is varied as the function of the applied voltage. In the step stress TDDB prediction, a Chen-Holland-Hu model or improved Chen-Holland-Hu model is employed. Since TDDB characteristics can be obtained from only dielectric breakdown prediction, this method is advantageous for early reliability prediction.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: January 14, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Mikihiro Kimura
  • Patent number: 5594328
    Abstract: The current density versus voltage characteristics of integrated circuit processing equipment such as a plasma etcher are determined using a passive probe including a semiconductor wafer in which one or more clusters of individual passive charge monitors are fabricated. Each monitor includes an EEPROM device having a control electrode and a floating electrode over a channel region connecting source and drain regions, a charge collecting electrode connected to the control electrode, and a current sensing resistor connecting the charge collection electrode to the substrate for developing a threshold varying voltage. By determining changes in device threshold voltage, a corresponding surface-substrate potential is determined which can be divided by the value of the current-sensing resistor to yield a current. The current can then be divided by the area of the charge collecting electrode to yield a value of the current density.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: January 14, 1997
    Inventor: Wieslaw A. Lukaszek
  • Patent number: 5594329
    Abstract: A method and apparatus for obtaining a voltage-isolated measurement channel in a measurement instrument is provided. An input signal is multiplied with a clock signal to obtain a modulated input signal that is coupled to an input winding of a balanced transformer. The modulated input signal is electromagnetically coupled from the input winding to an output winding. At the same time, the input winding and the output winding are voltage-isolated, meaning that the portion of the measurement channel coupled to the input winding is "floated" with the input signal whereas the remaining portion of the measurement channel is referenced to instrument ground. A sampling circuit coupled to the output winding samples the modulated input signal in the manner of a synchronous detector to extract the original input signal voltage which is provided to an analog to digital converter which generates the digital measurement values.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: January 14, 1997
    Assignee: Fluke Corporation
    Inventors: Rudolf G. van Ettinger, Martinus P. Eikendal
  • Patent number: 5592077
    Abstract: Systems and methods for testing ASIC and RAM memory devices are disclosed. The method comprises determining a signature map of valid power supply current values for a known good microcircuit wherein each valid power supply current value is measured at a fixed level of power supply voltage and corresponds to a unique test input stimuli pattern applied to the known good microcircuit. The signature map of power supply current values is stored in an electronic memory (300). The test input stimuli patterns are then applied to an unproven microcircuit (330) and the power supply current of the unproven microcircuit is forced to the levels stored in the signature map by a current supply (360) while the voltages across the power supply inputs of the unproven microcircuit are measured by a voltmeter (340). The measured power supply voltages for each power supply current value are then compared to the fixed voltage supply level used to test the known good microcircuit.
    Type: Grant
    Filed: February 13, 1995
    Date of Patent: January 7, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: Michael E. Runas, Kirit B. Patel
  • Patent number: 5589765
    Abstract: A method is provided for more efficiently and inexpensively testing semiconductor devices by an automated process of monitoring the performance of the test equipment and certifying that it is working properly, both before and after the actual tests of the devices are conducted. If the automated process can certify that the test equipment was working properly, prior and subsequent to the actual tests of the devices, then it can be assumed that the actual tests were performed correctly and the results are valid. Those devices that "passed" the actual tests are then ready for the next step in the fabrication process, or typically ready to be shipped to the customer. If the test equipment's performance degrades significantly during the actual tests, then the results of the actual tests are considered invalid. Consequently, the test equipment can be repaired or recalibrated and all of the devices retested.
    Type: Grant
    Filed: January 4, 1995
    Date of Patent: December 31, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Dale V. Ohmart, Willie B. Benitez, III, Deogracias D. Marrero, Douglas J. Mirizzi
  • Patent number: 5585739
    Abstract: The present invention relates to a double ended spring probe ring interface for multiple pin test heads, such as a 120 pin sentry style test head. The double ended spring probe ring is comprised of a non-conductive ring having a plurality of apertures equally spaced along an outer radius of the ring. A plurality of double-ended spring probes are held in the ring by a holding device which is coupled to each spring probe. The holding device holds the spring probe within the ring so as to maintain coplanarity among the spring probes.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: December 17, 1996
    Assignee: VLSI Technology, Inc.
    Inventor: Craig C. Staab
  • Patent number: 5585738
    Abstract: A probe system tests the electrical characteristics of chips arranged in a matrix on a semiconductor wafer. An XYZ stage movable in the directions of three-dimensional axes is disposed under a probe card having probes to be brought into contact with the electrode pads of the chips. A wafer table rotatable within a horizontal plane is disposed on the XYZ stage. A first image pickup means for picking up the probe images is mounted on the XYZ stage. A second image pickup means for picking up a wafer image is disposed above the table. The second image pickup means is movable horizontally to and from a use position under the probe card. A target is supported and moved by a driving member mounted on the XYZ stage, for aligning the focal points and optical axes of the first and second image pickup means. The target is moved between forward and retreat positions within and outside the field of view of the first image pickup means.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: December 17, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Motohiro Kuji, Haruhiko Yoshioka, Shinji Akaike, Shigeaki Takahashi
  • Patent number: 5583447
    Abstract: An analog test probe includes an integrated circuit having a large number of separate channels, each connected to one of its inputs. There is a plurality of probe tips and 100 ohm coaxial cables, each cable connecting one of said probe tips and one of the IC inputs. This structure introduces reverse signals into the channels that would seriously degrade probe operation if not removed. A capacitor and resistor in each probe tip, and in series with the coaxial cable and ground, match the impedance of the coaxial cable in the reverse direction, so that reverse signals are dissipated in the resistance and capacitance and do not reflect into the probe channels.
    Type: Grant
    Filed: February 3, 1995
    Date of Patent: December 10, 1996
    Assignee: Hewlett-Packard Company
    Inventor: David J. Dascher
  • Patent number: 5581193
    Abstract: Multiple frequency sources are used to apply a time varying signal to a scanning tunneling microscope and a current or voltage passing between the electrodes of the microscope is measured by a microwave spectrum/network analyzer which detects simultaneously at the multiple input frequencies and combinations thereof. This permits multiple substances to be monitored simultaneously. By choosing appropriate frequencies of input signals to be mixed or combined before application to the sample, it is possible to measure at a difference frequency which may improve signal to noise ratio and possible to match generating and reaction potentials and relaxation times to render detection possible. When applied to an array of Coulomb blockade devices used as a current standard, accuracy of the standard can be tested and the signal-to-noise ratio can be improved in the measurements, or the thresholds of the devices can be detected.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: December 3, 1996
    Assignees: Penn State Research Foundation, Biotechnology Research and Development Corporation
    Inventors: Paul S. Weiss, Stephan J. Stranick
  • Patent number: 5578936
    Abstract: A portable electronic test instrument is adapted for the automatic testing of semiconductor diodes regardless of the orientation of the diode relative to the test probes. The test instrument supplies an a.c. sine wave test voltage coupled to the test probes. The maximum negative voltage and the maximum positive voltage are measured and compared against a set of predetermined open and short circuit values to obtain a decision of open, short, or ok for each value. The combination of the two comparisons is used to determine the device status according to a decision criteria. The diode status is accordingly displayed on the graphical display of the test instrument, indicating the device is open, shorted, a diode with a forward orientation or a reverse orientation with respect to the test probes, or of an unknown type. The diode forward bias junction voltage is displayed regardless of its orientation.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: November 26, 1996
    Assignee: Fluke Corporation
    Inventors: Robert T. Gibson, Todd E. Holmdahl
  • Patent number: 5578937
    Abstract: A new instrument for monitoring the condition and speed of an operating electric motor from a remote location. The slip-poles component is derived from a motor current signal. The magnitude of the slip-poles component provides the basis for a motor condition monitor, while the frequency of the slip-poles component provides the basis for a motor speed monitor. The result is a simple-to-understand motor health monitor in an easy-to-use package. Straightforward indications of motor speed, motor running current, motor condition (e.g., rotor bar condition) and synthesized motor sound (audible indication of motor condition) are provided. With the device, a relatively untrained worker can diagnose electric motors in the field without requiring the presence of a trained engineer or technician.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: November 26, 1996
    Assignee: Martin Marietta Energy Systems, Inc.
    Inventors: Howard D. Haynes, Curtis W. Ayers, Donald A. Casada
  • Patent number: 5576632
    Abstract: A method for detecting a departure from normal operation of an electric motor comprises obtaining a set of normal current measurements for a motor being monitored; training a neural network auto-associator using the set of normal current measurements; making current measurements for the motor in operation; comparing the current measurements with the normal current measurements; and indicating abnormal operation whenever the current measurements deviate more than a predetermined amount from the normal current measurements. The method models a set of normal current measurements for the motor being monitored, and indicates a potential failure whenever measurements from the motor deviate significantly from a model. The model takes the form of an neural network auto-associator which is "trained"--using current measurements collected while the motor is known to be in a normal operating condition--to reproduce the inputs on the output.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: November 19, 1996
    Assignee: Siemens Corporate Research, Inc.
    Inventors: Thomas Petsche, Stephen J. Hanson
  • Patent number: 5576629
    Abstract: A plasma monitoring and control method and system monitor and control plasma in an electronic device fabrication reactor by sensing the voltage of the radio frequency power that is directed into the plasma producing gas at the input to the plasma producing environment of the electronic device fabrication reactor. The method and system further senses the current and phase angle of the radio frequency power directed to the plasma producing gas at the input to the plasma producing environment. Full load impedance is measured and used in determining characteristics of the plasma environment, including not only discharge and sheath impedances, but also chuck and wafer impedances, primary ground path impedance, and a secondary ground path impedance associated with the plasma environment. This permits end point detection of both deposition and etch processes, as well as advanced process control for electronic device fabrication.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: November 19, 1996
    Assignee: Fourth State Technology, Inc.
    Inventors: Terry R. Turner, James D. Spain, John R. Swyers