Patents Examined by Barry C. Bowser
  • Patent number: 5631573
    Abstract: A probe-type test handler includes a measurement module for performing electrical characteristic tests on an IC, a performance board electrically connected to the measurement module in an interchangeable manner that allows the type of the performance board to be selected according to the type of the IC to be measured, a probe card having a probe needle connected to the performance board, and a pressure mechanism that allows the tip of the linear portion of the probe needle to be pressed into contact with the lead projected out of the IC package near its IC package body. A test method using the test handler is also disclosed.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: May 20, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tosio Ohno
  • Patent number: 5629616
    Abstract: A circuit accurately measures the current flowing in a load which is powered by a pulse-width modulated (PWM) arrangement. The current measurement circuit is transformer-coupled to the load. A first flux cancellation device produces a voltage which tends to reduce the flux in the transformer core to zero. A pair of peak detection circuits determine maximum and minimum voltages at the output of the first flux cancellation device, and another circuit measures the difference between the maximum and minimum voltages. This difference is a voltage which is proportional to the current flowing in the load. A second flux cancellation device includes an integrator which integrates the outputs of the peak detection circuits, and the output of the integrator is fed back to the first flux cancellation device.
    Type: Grant
    Filed: July 13, 1995
    Date of Patent: May 13, 1997
    Assignee: Performance Conrols, Inc.
    Inventor: Craig R. Weggel
  • Patent number: 5629617
    Abstract: An analog electronic test probe includes hundreds of inputs each connected to two amplifiers, each in a separate multiplexer stage on an integrated circuit. A programmer, responsive to a dial, shifts data through a shift register of latches each of which is connected to one of the amplifiers, activating the amplifier(s) connected to the selected input, thereby multiplexing it (them) to selected output(s). Similarly, the gain for each output may be selected. An outdisable circuit connected to the outputs of each multiplexer and the outputs of each IC chip causes each output to appear electrically as an open circuit when no input associated with the multiplexer or chip is selected. This permits any number of multiplexers and IC chips to be daisy-chained together.
    Type: Grant
    Filed: January 6, 1995
    Date of Patent: May 13, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Thomas F. Uhling, David J. Dascher, Kenneth Rush, Keith C. Griggs
  • Patent number: 5627462
    Abstract: An apparatus and method for determining the power demand from a conventional watt-hour meter including a disk having a black mark imprinted on an edge thereof wherein the disk rotates in proportion to the amount of electrical power demanded by the energized electrical equipment connected thereto. The method comprising the steps of: positioning a scanning laser beam in front of the rotating disk of the watt-hour meter in a position transverse to the rotating disk such that the edge of the rotating disk is within the field of view of the scanning laser beam, scanning and then detecting the passings of the black mark as the disk rotates through at least two revolutions and computing the power demanded by the connected and energized electrical equipment based upon the amount of time between successive passings of the black mark.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: May 6, 1997
    Assignee: The Right Company
    Inventor: Culbreath C. Whitehead, Jr.
  • Patent number: 5627479
    Abstract: The present invention relates to a method for determining characteristic electrical properties of semi-conducting materials wherein the time/frequency dependent electrical impedance or admittance of the material is measured. The invention also relates to an apparatus for carrying out the method. A number of bulb and surface parameters characterize the electrical properties of a given piece of material. These parameters include the dielectric constant .epsilon. of the material, the difference .DELTA..mu..sub.ch in the chemical potential of the bulk of a material and the chemical potential of its surface and/or metal electrode--material surface interface, the density of the majority and minority electrical mobile charge carriers N and N.sub.min, respectively, in the bulk of the material, the electrical mobility .mu. of the majority electrical mobile charges in the bulk of the material and the electrical mobility .mu..sub.min of minority mobile charge carriers, the surface and bulk emission and capture rates E.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: May 6, 1997
    Assignee: Peter Viscor
    Inventors: Petr Viscor, Jan Vedde
  • Patent number: 5627463
    Abstract: A automatic multi-function testing machine for electric appliances includes an oval annular testing table, carriers moving around on the table for carrying electrical appliances to be tested, various testers and meters fixed on a gauge panel located on an oval support base located inside the table, a first electric rail annularly located near the peripheral edge of the oval support base and insulatingly separated into five stages. Each stage is electrically connected with one of the testers and the meters on the gauge panel. Each carrier has two brushes contacting and sliding under the first rail and a socket to connect with a plug of an appliance thereon. So the appliances are tested separately by all the testers and measured by the meters in a flowing system, when moved around with the carrier on the table for one round.
    Type: Grant
    Filed: February 12, 1996
    Date of Patent: May 6, 1997
    Inventor: Jui-Pin Lin
  • Patent number: 5623210
    Abstract: A current-voltage convertor 32 respectively generates positive and negative voltages Xa when a battery 20 is being charged and discharged. A voltage synthesizer 34 adds a prescribed positive voltage to the voltage Xa, and always generates a positive sample voltage Xs. This sample voltage Xs and prescribed reference voltages X1, X2 are compared by means of two differential amplifiers 40, 42 to obtain signals V1, V2 for the currents being charged and discharged. Then, these signals are supplied to a microcomputer 44.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: April 22, 1997
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Norinobu Sakamoto
  • Patent number: 5623202
    Abstract: A single IC testing machine can be used to test several IC chips connected in parallel by a unique hardware design and a special software program for execution, for instance, a single testing head and a single set of address input lines can be used for testing the chips by connecting the corresponding similar address input pins of the chips together first and then connecting to the address input lines of the testing machine, and connecting the data I/O pins of the chips to the data I/O pins of the testing machine, and then connecting the voltage input and the ground of the chips to separate voltage sources.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: April 22, 1997
    Assignee: United Microelectronics Corporation
    Inventor: C. Y. Yung
  • Patent number: 5621332
    Abstract: An apparatus for identifying and measuring in real time substances overlying a surface comprises a plurality of electrodes, a temperature sensor, an electrode control system connected to the plurality of electrodes for defining an electric field, an amplitude and phase measurement system connected to the plurality of electrodes and to the electrode control system for measuring a plurality of currents responsive to the electric field and converting the currents to a measurement set and computer for storing a map comprising a partition of a vector space of predetermined characteristics of substances into regions of profiles corresponding to the substances which could be overlying the surface. The computer correlates the measurement set with the map thereby identifying and quantifying the substances overlying the surface and generates an output signal corresponding to the identity and quantity of substances overlying the surface.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: April 15, 1997
    Inventors: Stuart Inkpen, John Hall, Chris Nolan, Chris Marshall
  • Patent number: 5619129
    Abstract: A multimeter is provided having an erroneous input prevention mechanism that allows more than one mode to be assigned to an input terminal hole located in a central section of a shutter board based on movement of a rotary switch. When the rotary switch is rotated, the first and the second drive-side protrusions formed at separate locations from the selector push away the first or second slave-side protrusions in the slave shell to rotate the shutter board about the center at the negative common terminal hole. Thus, only a specific terminal hole is in the open state. Even when the rotary switch is rotated to a predetermined position, the shutter board does not rotate to leaving the first input terminal hole in the open state.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: April 8, 1997
    Assignee: Seiko Epson Corporation
    Inventor: Manabu Kamiya
  • Patent number: 5619141
    Abstract: The invention comprises a method for determining the hole or electron concentration, transition temperature, ratio T.sub.c /T.sub.c (max), or state of doping of a material capable of exhibiting superconductivity when cooled below its critical temperature, by measuring the thermopower of a sample of the material above the critical temperature of the material and determining from the thermopower the hole or electron concentration, transition temperature, ratio T.sub.c /T.sub.c (max), or state of doping of the material as to whether it is underdoped, overdoped or optimally doped. The sample may be differentially heated and/or cooled to generate a temperature difference across the sample, the temperature difference across the sample measured, the voltage across the sample measured, and the hole concentration or similar determined from the measured temperature difference and the measured voltage. Means for determining the hole concentration, transition temperature, or doping of the material is also claimed.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: April 8, 1997
    Inventors: Jeffery L. Tallon, John R. Cooper, Sandro D. Obertelli
  • Patent number: 5617035
    Abstract: An integrated device test system (10, 40) having AC and DC measurement modes of operation comprises a drive circuit (11, 41), a programmable measurement unit (12) and a switch (18). The drive circuit (11, 41) may be a current mode drive circuit (11) or a voltage mode drive circuit (41). The drive circuit (11, 41) is coupled to the programmable measurement unit (12) and a device under test (64). In a DC mode of operation, the switch (18) is configured to couple a sense terminal (39) with one end of an isolation resistor (66). A second end of the isolation resistor (66) is connected to a pin (63) of the device under test (64). In an AC mode of operation, the switch (18) is configured to couple the sense terminal (39) with the drive circuit (11, 41) and the force terminal (35) of the programmable measurement unit (12).
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: April 1, 1997
    Assignee: Motorola, Inc.
    Inventor: Mavin C. Swapp
  • Patent number: 5617019
    Abstract: A direct current of high intensity having alternating current components superposed thereon is flowing in a conductor 1 through a magnetic circuit 5, 6. Two measuring coils 7, 8 are arranged inside opposite air-gaps of the magnetic circuit and are connected in an electric measuring circuit in series with each other and in parallel to voltage dividers 12, 13 and 14, 15. The alternating current components induce voltages in the coils 7 and 8 which add up, the sum thereof appearing across the series-connection of resistors 13, 15. This voltage is integrated by an integrating circuit 10 and then filtered in a band-pass filter 11. The magnetic circuit 5, 6 is screened by lateral screening members 30, 31 so that the remaining field lines of a lateral parasitic magnetic field produce in the magnetic circuit flux portions which are approximately equal and which are added to the useful flux in one air-gap and are substracted from the useful flux in the other air-gap.
    Type: Grant
    Filed: February 21, 1996
    Date of Patent: April 1, 1997
    Assignee: Liaisons Electroniques-Mecaniques LEM S.A.
    Inventor: Marcel Etter
  • Patent number: 5614838
    Abstract: A system for testing a high speed integrated circuit includes a test device having a test clock with a first maximum frequency for performing level sensitive scan design (LSSD) testing of the integrated circuit device under test, a frequency multiplier circuit for multiplying the test clock signal to a higher second frequency capable of operating the device under test, and a finite state machine for generating a first internal clock for testing the device under test. In a practical embodiment, the internal clock speed may be running at a frequency many multiples of the test clock.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: March 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Talal K. Jaber, Steven A. Schmidt
  • Patent number: 5614834
    Abstract: A Golay sampling receiver is used for optical sampling of voltage and charge at the internal nodes of analog and digital integrated circuits. The sampling receiver uses very high sampling rates together with narrow banding to recover very small signals in the presence of noise. The sampling system is based on harmonic mixing, which is the interaction of a laser sampling train with the electro-optic modulator formed in the GaBs substrate of the device under test. The application of the Golay sampling receiver to an electro-optic sampling system allows the flexibility of running the signal under test at a subharmonic of the laser pulse repetition rate, as well as any harmonic of these subharmonics. The subharmonics are determined by the length code used in the Golay receiver. For a given signal to be sampled, the fundamental frequency is chosen to be a function of the fixed sample rate divided by the code length, and the baseband offset.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: March 25, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Alistair Black, Raj B. Apte, David M. Bloom
  • Patent number: 5614817
    Abstract: A method for determining the real power of an electrical drive, preferably an electrical fitting drive, includes subtracting an ohmic or resistive power loss in a stator of the drive from a measured real power. It is intended that an ohmic or resistive power loss in a connecting line of the drive also be subtracted. A device for determining the real power of an electrical drive includes line pairs each connecting two connecting lines remotely from the drive, to a DC voltage source. A known ohmic or non-reactive resistor is inserted into one of the lines in each case. Each of the lines is connected on the side of the ohmic or non-reactive resistor facing toward the drive, through a voltmeter, to the other line. The voltmeters are connected to an evaluation unit.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: March 25, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventor: Heinz Kutzer
  • Patent number: 5608338
    Abstract: Time coefficient .beta., voltage coefficient d and temperature coefficient .phi..sub.0 of a jumbo TFT including a plurality of TFTs connected parallel to each other and manufactured under the same condition are obtained through experiment using -BT stress test, mean value .mu. and standard deviation .sigma.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: March 4, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shigenobu Maeda
  • Patent number: 5608337
    Abstract: A method and apparatus for testing an integrated circuit device. An integrated circuit device undergoes testing in at least two different stages of the manufacturing process. At one stage, the semiconductor wafer containing multiple chip dice is probed by a probe tester that tests each of the dice individually. At another stage, after an individual chip die has been encapsulated in a package, a package tester tests and exercises the functions of the chip.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 4, 1997
    Assignee: Altera Corporation
    Inventors: Matthew C. Hendricks, Ernest Allen
  • Patent number: 5604447
    Abstract: A probe card includes an oscillator generating an AC signal, an averaged value detecting circuit receiving a signal outputted from a prescaler IC, for generating an averaged DC signal, and a plurality of switches for changing a flow of a signal among the IC tester, the prescaler IC, the oscillator and the averaged value detecting circuit. The switches is so controlled that the AC signal is supplied to the prescaler IC, and the signal outputted from the prescaler IC is supplied to the averaged value detecting circuit and converted to the averaged DC signal, whereby a non-defective/defective of the AC function of the prescaler IC is discriminated on the basis of the obtained averaged DC signal. The switches are also so controlled that a DC test signal is supplied from the IC tester to the prescaler IC and a DC output signal outputted from the prescaler IC is supplied to the IC tester.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: February 18, 1997
    Assignee: NEC Corporation
    Inventor: Isamu Takano
  • Patent number: 5604445
    Abstract: An apparatus, and a corresponding method, for stress testing both wire bond-type semiconductor chips and C4-type semiconductor chips is disclosed.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: February 18, 1997
    Assignee: International Business Machines Corporation
    Inventors: Kishor V. Desai, Maganlal S. Patel, Sanjeev Sathe