Abstract: The present disclosure relates to a composition that includes a first layer that includes a perovskite defined by ABX3 and a second layer that includes a perovskite-like material defined by at least one of A?2B?X?4, A?3B?2X?9, A?B?X?4, A?2B?X?6, and/or A?2AB?2X?7, where the first layer is adjacent to the second layer, A is a first cation, B is a second cation, X is a first anion, A? is a third cation, B? is a fourth cation, X? is a second anion, and A? is different than A.

Abstract: Provided are a dielectric monolayer thin film, a capacitor and a semiconductor device each including the dielectric monolayer thin film, and a method of forming the dielectric monolayer thin film, the dielectric monolayer thin film including an oxide which is represented by Formula 1 and has a perovskite-type crystal structure, wherein the oxide has a surface chemically bonded with hydrogen. A2Bn?3CnO3n+1??<Formula 1> wherein, in Formula 1, A is a divalent element, B is a monovalent element, C is a pentavalent element, and n is a number from 3 to 8.

Abstract: In one or more embodiments, an apparatus generally comprises a microelectromechanical system (MEMS) module comprising a plurality of air movement cells and a power unit operable to control the plurality of air movement cells, and a housing configured for slidably receiving the MEMS module and positioning the MEMS module adjacent to a heat generating component of a network device. The MEMS module is operable to dissipate heat from the heat generating component and is configured for online installation and removal during operation of the heat generating component.

Abstract: A synthetic quartz glass cavity member (1) is bonded to a substrate (6) having an optical device (7) mounted thereon such that the device may be accommodated in the cavity member. The cavity member (1) has an inside surface consisting of a top surface (2a) opposed to the device (7) and a side surface (3a). The top surface (2a) is a mirror surface and the side surface (3a) is a rough surface.

Abstract: In an embodiment, an antenna may be formed by applying an insulator to a package body and forming at least a portion of the antenna as a conductor on the insulator.

Abstract: A semiconductor structure having an epitaxial structure is provided. The semiconductor structure includes a first fin and a second fin on a semiconductor substrate. The semiconductor structure also includes an isolation feature over the semiconductor substrate to surround the first fin and the second fin. The semiconductor structure further includes an epitaxial structure on the first fin and the second fin. In addition, the semiconductor structure includes outer spacers on opposite sides of the epitaxial structure. The semiconductor structure also includes an inner spacer structure between the first fin and the second fin, wherein the inner spacer structure has a U-shape and covers a sidewall of the epitaxial structure.

Abstract: The present disclosure provides a semiconductor device, and a capacitor device and its manufacture method, and relates to the field of semiconductor technologies. The manufacture method includes: forming, on a substrate, a plurality of storage node contact plugs distributed in an array and an insulation layer separating each of the storage node contact plugs; forming an electrode supporting structure on a side of the insulation layer away from the substrate, the electrode supporting structure having a plurality of through holes exposing each of the storage node contact plugs respectively, the through hole comprising a plurality of hole segments end-to-end jointing successively, the hole segment located on a side close to the substrate having an aperture greater than the hole segment located on a side away from the substrate; forming a dielectric layer; forming a second electrode layer.

Abstract: A MEMS element within a semiconductor device is enclosed within a cavity bounded at least in part by hydrogen-permeable material. A hydrogen barrier is formed within the semiconductor device to block propagation of hydrogen into the cavity via the hydrogen-permeable material.

Abstract: Some embodiments of a device comprise an image-forming medium and one or more sensors that are attached to the image-forming medium. Also, in some embodiments, the image-forming medium is paper or a medium that has paper-like characteristics, at least some of the one or more sensors are microelectromechanical systems (MEMS), or the one or more sensors are configured to be powered by wireless power transfer. And some embodiments of the device further comprise a system-on-a-chip that is in communication with the one or more sensors, a transceiver that is in communication with the system-on-a-chip, or a radio-frequency identification (RFID) tag.

Abstract: A semiconductor structure, and a method of making the same, includes an inner spacer located between channel nanosheets on a semiconductor substrate, a first portion of the inner spacer located on a first side of the semiconductor structure and a second portion of the inner spacer located on a second side opposing the first side, the first portion of the inner spacer on the first side including a protruding region extending outwards from a middle top surface of the first portion of the inner spacer, and a metal gate stack in direct contact with the inner spacer, the first portion of the inner spacer including the protruding region pinching off the metal gate stack for increasing a threshold voltage on the first side.

Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.

Abstract: This disclosure describes a process of generating a planarizing polyimide based dielectric film on a substrate with conducting metal pattern, wherein the process comprised steps of: (a) providing a dielectric film forming composition comprising at least one fully imidized polyimide polymer and at least one solvent; and (b) depositing the dielectric film forming composition onto a substrate with conducting metal pattern to form a dielectric film, wherein the difference in the highest and lowest points on a top surface of the dielectric film is less than about 2 microns.

Abstract: A MEMS element within a semiconductor device is enclosed within a cavity bounded at least in part by hydrogen-permeable material. A hydrogen barrier is formed within the semiconductor device to block propagation of hydrogen into the cavity via the hydrogen-permeable material.

Abstract: Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.

Abstract: A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

Abstract: A universal implantable integrated circuit medical device platform having integral and monolithic circuit traces. The platform allows for implanting into a mammalian body single and multi-functional interface devices for sensing, monitoring stimulating and/or modulating physiological conditions within the body. Microelectronic circuitry may be integrated onto the platform or may be joined as modular components to the platform.

Abstract: A semiconductor device may include: a substrate wafer, a bonding layer at least partially covering a front surface of the substrate wafer, a plurality of silicon pillars bonded to the front surface of the substrate wafer by the bonding layer, a single-crystal piezoelectric film having a first surface and an opposing second surface, a top electrode arranged adjacent to the first surface of the single-crystal piezoelectric film, and a bottom electrode arranged adjacent to the second surface of the single-crystal piezoelectric film. The single-crystal piezoelectric film may be supported by the plurality of silicon pillars such that the second surface of the piezoelectric film and the front surface of the substrate wafer enclose a cavity therebetween.

Abstract: A qubit array reparation system includes a reservoir of ultra-cold particle, a detector that determines whether or not qubit sites of a qubit array include respective qubit particles, and a transport system for transporting an ultra-cold particle to a first qubit array site that has been determined by the probe system to not include a qubit particle so that the ultra-cold particle can serve as a qubit particle for the first qubit array site. A qubit array reparation process includes maintaining a reservoir of ultra-cold particles, determining whether or not qubit-array sites contain respective qubit particles, each qubit particle having a respective superposition state, and, in response to a determination that a first qubit site does not contain a respective qubit particle, transporting an ultracold particle to the first qubit site to serve as a qubit particle contained by the first qubit site.

Abstract: A method for manufacturing a semiconductor device includes forming a plurality of first semiconductor layers alternately stacked with a plurality of second semiconductor layers on a semiconductor substrate, and laterally recessing the plurality of first semiconductor layers with respect to the plurality of second semiconductor layers to form a plurality of vacant areas on lateral sides of the plurality of first semiconductor layers. In the method, a plurality of first inner spacers are formed on the lateral sides of the plurality of first semiconductor layers in respective ones of the plurality of vacant areas, and a plurality of second inner spacers are formed on sides of the plurality of first inner spacers in the respective ones of the plurality of vacant areas. The method also includes laterally recessing the plurality of second semiconductor layers, and growing a plurality of source/drain regions from the plurality of second semiconductor layers.

Abstract: The present disclosure describes a method that includes forming a first two-dimensional (2D) layer on a first substrate and attaching a second 2D layer to a carrier film. The method also includes bonding the second 2D layer to the first 2D layer to form a heterostack including the first and second 2D layers. The method further includes separating the first 2D layer of the heterostack from the first substrate and attaching the heterostack to a second substrate. The method further includes removing the carrier film from the second 2D layer.