Patents Examined by Bilkis Jahan
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Patent number: 11094850Abstract: A light emitting device includes a substrate; a light emitting structure disposed on the substrate; a first insulation layer disposed on the light emitting structure; a second insulation layer disposed on the first insulation layer; a first electrode and a second electrode electrically connected to the light emitting structure; a first pad electrically connected to the first electrode; and a second pad electrically connected to the second electrode.Type: GrantFiled: July 18, 2019Date of Patent: August 17, 2021Assignee: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.Inventors: Woo Sik Lim, Jae Won Seo
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Patent number: 11088137Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.Type: GrantFiled: December 23, 2019Date of Patent: August 10, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
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Patent number: 11081488Abstract: A capacitive element includes a trench extending vertically into a well from a first side. The trench is filled with a conductive central section clad with an insulating cladding. The capacitive element further includes a first conductive layer covering a first insulating layer that is located on the first side and a second conductive layer covering a second insulating layer that is located on the first conductive layer. The conductive central section and the first conductive layer are electrically connected to form a first electrode of the capacitive element. The second conductive layer and the well are electrically connected to form a second electrode of the capacitive element. The insulating cladding, the first insulating layer and the second insulating layer form a dielectric region of the capacitive element.Type: GrantFiled: September 21, 2020Date of Patent: August 3, 2021Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Crolles 2) SASInventors: Abderrezak Marzaki, Arnaud Regnier, Stephan Niel, Quentin Hubert, Thomas Cabout
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Organic light emitting diode display device having a circuit structure buried in a substrate thereof
Patent number: 11081538Abstract: An organic light emitting diode (“OLED”) display device includes a substrate having a display region including a plurality of sub-pixel regions. A peripheral region at least partially surrounds the display region. A sub-pixel structure is disposed in each of the plurality of sub-pixel regions on the substrate. A circuit structure is disposed within the substrate in the sub-pixel region, and is located adjacent to the peripheral region.Type: GrantFiled: July 2, 2019Date of Patent: August 3, 2021Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Byungseok Choi, Hyung-Il Jeon, Sang-Hee Jang -
Patent number: 11075231Abstract: Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.Type: GrantFiled: March 3, 2020Date of Patent: July 27, 2021Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hyo Jin Kim, Won Kyu Lee, Seung Gyu Tae
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Patent number: 11075278Abstract: A three-dimensional (3D) capacitor includes a semiconductor substrate; one or more fins extending from the semiconductor substrate; an insulator material between each of the one or more fins; a dielectric layer over a first portion of the one or more fins and over the insulator material; a first electrode over the dielectric layer; spacers on sidewalls of the first electrode; and a second electrode over a second portion of the one or more fins and over the insulator material, wherein the first and second portions are different.Type: GrantFiled: April 25, 2019Date of Patent: July 27, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi-Wen Liu, Chao-Hsiung Wang
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Patent number: 11069757Abstract: An OLED display panel providing color compensation without overdriving light emitting units includes the light emitting units and a substrate. Each light emitting unit includes a light emitting element and an electrochromic element. The light emitting element is on a side of the electrochromic element away from the substrate. The electrochromic element includes first anode and cathode, and an electrochromic layer between them. The light emitting element includes second anode and cathode, and light emitting material between them. A portion of the second anode is shared with the first cathode. The present disclosure also provides a method for making such OLED display panel. The OLED display panel uses the electrochromic elements for color compensation, reducing the energy consumption of the display panel and prolonging service life.Type: GrantFiled: July 3, 2019Date of Patent: July 20, 2021Assignees: Interface Technology (ChengDu) Co., Ltd., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITEDInventors: Chin-Feng Chung, Hsien-Wei Chiang
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Patent number: 11063232Abstract: An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Förster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Förster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with a local maximum peak on the longest wavelength side of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.Type: GrantFiled: July 18, 2019Date of Patent: July 13, 2021Inventors: Shunpei Yamazaki, Satoshi Seo, Yoshiharu Hirakata, Takahiro Ishisone
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Patent number: 11063192Abstract: A light emitting device is provided. The light emitting device includes a light emitting element, a wavelength converting member, a light transmissive member, an adhesive member, and a light reflective member. The wavelength converting member has an upper surface and lateral surfaces, contains a fluorescent substance, and is placed on the light emitting element. The light transmissive member covers the upper surface of the wavelength converting member. The adhesive member is interposed between the light emitting element and the wavelength converting member, and covers the lateral surfaces of the wavelength converting member. The light reflective member covers the lateral surfaces of the wavelength converting member via the adhesive member.Type: GrantFiled: July 27, 2016Date of Patent: July 13, 2021Assignee: NICHIA CORPORATIONInventors: Hiroto Tamaki, Yoshiki Sato, Yoichi Bando
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Micro light source array, display device having the same, and method of manufacturing display device
Patent number: 11056473Abstract: Provided are a micro light source array for a display device, a display device including the micro light source array, and a method of manufacturing the display device. The micro light source array includes: a plurality of silicon sub-mounts provided on a substrate, each silicon sub-mount from among the plurality of silicon sub-mounts corresponding to a respective sub-pixel from among a plurality of sub-pixels of a display device, the plurality of silicon sub-mounts being separated from each other by a plurality of trenches; a plurality of light emitting device chips coupled to the plurality of silicon sub-mounts; and a plurality of driving circuits provided at the plurality of silicon sub-mounts.Type: GrantFiled: October 31, 2019Date of Patent: July 6, 2021Assignees: SAMSUNG ELECTRONICS CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Junhee Choi, Euijoon Yoon -
Patent number: 11056562Abstract: A present invention includes the following: a third impurity region having a second conductivity type and disposed in an outer peripheral region that is the outer periphery of a cell arrangement region in which a unit cell is disposed; a field insulating film disposed in the outer peripheral region; an interlayer insulating film; a first main electrode disposed on the interlayer insulating film. The third impurity region includes a fourth impurity region having the second conductivity type, having a higher impurity concentration than the third impurity region. A gate wire and a gate pad are disposed in the outer peripheral region. The fourth impurity region is adjacent to the cell arrangement region, surrounds at least a region below the gate pad, and is electrically connected to the first main electrode.Type: GrantFiled: September 23, 2016Date of Patent: July 6, 2021Assignee: Mitsubishi Electric CorporationInventors: Yasunori Oritsuki, Yoichiro Tarui
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Patent number: 11043501Abstract: A chip includes a semiconductor substrate, and a first N-type Metal Oxide Semiconductor Field Effect Transistor (NMOSFET) at a surface of the semiconductor substrate. The first NMOSFET includes a gate stack over the semiconductor substrate, a source/drain region adjacent to the gate stack, and a dislocation plane having a portion in the source/drain region. The chip further includes a second NMOSFET at the surface of the semiconductor substrate, wherein the second NMOSFET is free from dislocation planes.Type: GrantFiled: November 4, 2019Date of Patent: June 22, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jhon Jhy Liaw
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Patent number: 11038144Abstract: An organic light-emitting display apparatus is disclosed. In one embodiment, the display apparatus includes i) a substrate and ii) an organic light-emitting device formed on the substrate, the organic light-emitting device including a stack structure including a first electrode, an organic light-emitting layer, and a second electrode. The apparatus may further include a sealing layer formed on the substrate so as to cover the organic light-emitting device, the sealing layer including an inorganic layer and a porous layer interposed between the sealing layer and the organic light-emitting device. One embodiment can reduce a stress due to a sealing inorganic layer so as to maintain characteristics for a long time in a severe environment and not affect an organic light-emitting device.Type: GrantFiled: October 1, 2014Date of Patent: June 15, 2021Assignee: Samsung Display Co., Ltd.Inventors: Min-Ho Oh, Yoon-Hyeung Cho, Byoung-Duk Lee, Yong-Tak Kim, So-Young Lee, Yun-Ah Chung
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Patent number: 11024731Abstract: A power module is disclosed that includes a housing with an interior chamber wherein multiple switch modules are mounted within the interior chamber. The switch modules comprise multiple transistors and diodes that are interconnected to facilitate switching power to a load. In one embodiment, at least one of the switch modules supports a current density of at least 10 amperes per cm2.Type: GrantFiled: October 26, 2018Date of Patent: June 1, 2021Assignee: Cree, Inc.Inventors: Jason Patrick Henning, Qingchun Zhang, Sei-Hyung Ryu, Anant Kumar Agarwal, John Williams Palmour, Scott Allen
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Patent number: 11018197Abstract: A display panel and a fabrication method of the display panel are provided. The display panel includes a plurality of pixel rows, which includes first pixel rows and second pixel rows that are alternately arranged and is extended along a first direction. A first pixel row includes a plurality of first units, and a first unit includes two first sub-pixels arranged along a second direction with a same color. First sub-pixels in adjacent first units have different colors. The second direction intersects with and is non-perpendicular to the first direction. A second pixel row includes a plurality of second units, and a second unit includes two second sub-pixels arranged along the second direction with a same color. The first pixel rows and the second pixel rows are alternately arranged in a third direction perpendicular to the first direction. The first sub-pixels have a color different from the second sub-pixels.Type: GrantFiled: October 10, 2018Date of Patent: May 25, 2021Assignee: SHANGHAI TIANMA AM-OLED CO., LTD.Inventors: Yu Xin, Lijing Han, Xian Chen
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Patent number: 11011532Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a plurality of U-shaped memory strings, each of the plurality of U-shaped memory strings including a first columnar body, a second columnar body, and a conductive connection body. The conductive connection body connects the first columnar body and the second columnar body. A plurality of first memory cells are connected in series in the first columnar body and are composed of a plurality of first conductive layers, a first inter-gate insulating film, a plurality of first floating electrodes, a first tunnel insulating film, and a first memory channel layer. The plurality of first floating electrodes are separated from the plurality of first conductive layers by the first inter-gate insulating film. A plurality of second memory cells are connected in series in the second columnar body, similarly to the plurality of first memory cells.Type: GrantFiled: October 15, 2019Date of Patent: May 18, 2021Assignee: Toshiba Memory CorporationInventor: Keiichi Sawa
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Patent number: 11005019Abstract: A structure with micro devices includes a substrate, at least one micro device, and at least one holding structure. The micro device is disposed on the substrate. The micro device has a top surface and a bottom surface opposite to each other, a peripheral surface connected with the top surface and the bottom surface, a first-type electrode, and a second-type electrode. The holding structure is disposed on the substrate and is away from the first-type electrode and the second-type electrode. The holding structure includes at least one connecting portion and at least one holding portion. The connecting portion is disposed on an edge of the top surface of the micro device. The holding portion is connected to the connecting portion and extends onto the substrate.Type: GrantFiled: December 7, 2018Date of Patent: May 11, 2021Assignee: PlayNitride Inc.Inventors: Chih-Ling Wu, Yi-Min Su, Yu-Yun Lo
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Patent number: 11003084Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The method includes exposing a portion of the resist layer by performing an exposure process. The resist layer includes a compound, and the compound has a carbon backbone, and a photoacid generator (PAG) group and/or a quencher group are bonded to the carbon backbone. The method also includes performing a baking process on the resist layer and etching a portion of the resist layer to form a patterned resist layer. The method includes patterning the material layer by using the patterned resist layer as a mask and removing the patterned resist layer.Type: GrantFiled: October 3, 2018Date of Patent: May 11, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Li-Yen Lin, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 11004906Abstract: The present application discloses a display panel having a display area tessellated by repetition of a first subpixel group. The display panel includes an array of a plurality of first subpixel groups. Each of the plurality of first, subpixel groups includes a first subgroup and a second subgroup sequentially along a first direction. The first subgroup includes, a first subpixel of a first color, a first subpixel of a second color, and a first subpixel of a third color, sequentially along a second direction, the second direction being different from tire first direction. The second subgroup includes a second subpixel of the third color, a second subpixel of the second color, a second subpixel of the first color, a third subpixel of the third color, a third subpixel of the second color, and a third subpixel of the first color, sequentially along the second direction.Type: GrantFiled: September 18, 2017Date of Patent: May 11, 2021Assignees: BOE TECHNOLOGY GROUP CO., LTD., Chengdu BOE Optoelectronics Technology Co., Ltd.Inventors: Lan Lan, Jianpeng Wu, Zhongying Yang, Yi Qu
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Patent number: 10991775Abstract: A display substrate and a fabrication method thereof, and a display panel are disclosed. The display substrate includes: a base substrate; a pixel defining layer, on the base substrate and configured to define a plurality of sub-pixel regions, each sub-pixel region including a first electrode layer and a second electrode layer; an auxiliary electrode layer, on at least a portion of the pixel defining layer, the auxiliary electrode layer having a hydrophobic surface, and the hydrophobic surface being configured to be in contact with and electrically connected with the second electrode layer.Type: GrantFiled: May 21, 2019Date of Patent: April 27, 2021Assignee: BOE Technology Group Co., Ltd.Inventor: Ying Cui