Patents Examined by Bo B Jang
  • Patent number: 11961847
    Abstract: A display device includes pixels disposed in a display area and including first and second pixels that are adjacent to each other in a first direction, and a first integrated bank pattern disposed between the first and second pixels. Each of the pixels includes a first electrode and a second electrode that are spaced apart from each other along the first direction in a light emitting area and extend in a second direction, a first bank pattern portion overlapping the first electrode, and a second bank pattern portion overlapping the second electrode. The first integrated bank pattern includes a second bank pattern portion disposed at the first pixel, a first bank pattern portion disposed at the second pixel, and a protrusion extending in the second direction in a boundary area between the first pixel and the second pixel.
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: No Kyung Park, Kyung Bae Kim, Min Kyu Woo
  • Patent number: 11956982
    Abstract: Provided is an organic light-emitting device including: an anode; a cathode facing the anode; two or more light-emitting layers provided between the anode and the cathode and each having a maximum light emission peak of ?500 nm (?500 nm emission layer); and a light-emitting layer provided between the two or more ?500 nm emission layers, and having a maximum light emission peak at >500 nm (>500 nm emission layer), where a distance from the anode to the ?500 nm emission layer most adjacent to the anode is 100 nm to 200 nm, the distance from the anode to the ?500 nm emission most adjacent to the cathode is three to four times the distance from the anode to the ?500 nm emission layer most adjacent to the anode, and an N-type charge generation layer including an alkali metal and a P-type charge generation layer including a material with an electron affinity of ?4.8 eV are provided between each of the ?500 nm emission layers and the emission >500 nm emission layer.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: April 9, 2024
    Assignee: LG CHEM, LTD.
    Inventors: Minseung Chun, Seong So Kim, Jae Seung Ha
  • Patent number: 11949051
    Abstract: A wavelength conversion member includes a substrate, a phosphor layer, and a ventilated blade. The substrate is configured to rotate based on an axis. The phosphor layer is disposed on the substrate. The ventilated blade is disposed on the substrate and has a pore density between 10 ppi and 500 ppi or a volume porosity between 5% and 95%.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: April 2, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yen-I Chou, Jih-Chi Li, Wen-Cheng Huang
  • Patent number: 11942555
    Abstract: A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: March 26, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Yukinori Shima
  • Patent number: 11942494
    Abstract: An imaging device that includes a wiring substrate, an image sensor package mounted on the wiring substrate, a package frame attached to a light receiving surface side of the image sensor package, and a lens holder arranged to cover the package frame and holding a lens unit so that the lens unit faces the light receiving surface of the image sensor package. The package frame includes a material having a larger coefficient of linear expansion than a material of the lens holder, and includes a wall portion that extends in a direction perpendicular to the wiring substrate toward the wiring substrate. A gap is provided between the wall portion of the package frame and the image sensor package, and between an end of the wall portion of the package frame and the wiring substrate. The lens holder includes a wall portion facing the wall portion of the package frame.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideo Okamoto, Makoto Murai
  • Patent number: 11935898
    Abstract: A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 19, 2024
    Assignee: Japan Display Inc.
    Inventors: Tatsuya Toda, Toshinari Sasaki, Masayoshi Fuchi
  • Patent number: 11923382
    Abstract: A display device is disclosed. The display device includes a display area and a wiring area. The display area is disposed with a first thin film transistor which is an oxide thin film transistor and a second thin film transistor which is a low temperature poly-silicon thin film transistor. A distance between a first active layer of the first thin film transistor and a substrate is different from a distance between a second active layer of the second thin film transistor and the substrate. The first thin film transistor includes first vias that receive a first source/drain. The second thin film transistor includes second vias that receives a second source/drain. The wiring area is provided with a groove. The groove includes a first sub-groove and a second sub-groove that are stacked, and depths of the second vias are substantially equal to a depth of the second sub-groove.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: March 5, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Yang, Xinhong Lu
  • Patent number: 11923378
    Abstract: The present disclosure provides an electronic device including a substrate, a common electrode, and a plurality of pixels. The common electrode is disposed on the substrate. The pixels are disposed on the substrate, and at least one of the pixels includes a thin film transistor, a first electrode, a second electrode, and an auxiliary electrode. The first electrode is electrically connected to the thin film transistor. The auxiliary electrode is partially overlapped with the first electrode in a top view direction of the electronic device. The auxiliary electrode is electrically connected to the common electrode and electrically isolated from the first electrode, and the first electrode and the auxiliary electrode have a minimum distance less than a minimum distance between the first electrode and the common electrode.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: March 5, 2024
    Assignee: InnoLux Corporation
    Inventors: Chi-Lun Kao, Ker-Yih Kao, Ming-Chun Tseng, Kung-Chen Kuo
  • Patent number: 11915985
    Abstract: A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: February 27, 2024
    Assignee: CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
    Inventors: Qin Kong, Chien-Hung Lin
  • Patent number: 11916050
    Abstract: The present invention discloses a display device and a manufacturing method thereof, including the following steps: forming a thin-film transistor array substrate, the thin-film transistor array substrate including a first surface and a second surface that are disposed opposite to each other; forming a protective layer on the first surface; forming a metal layer on the second surface by a first patterning; forming a metal member by performing a second patterning on the metal layer; forming a patterned insulating layer on the second surface; forming an electrode layer on the metal member; forming a planarization layer on the electrode layer and the insulating layer; and removing the protective layer.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: February 27, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Chaode Mo
  • Patent number: 11908810
    Abstract: A hybrid semiconductor device includes an interposer substrate, a semiconductor package mounted on the interposer substrate, a molding member on the package substrate covering at least a portion of the semiconductor chip and exposing an upper surface of the semiconductor chip, and a stiffener disposed on an upper surface of the interposer substrate substantially around the semiconductor package.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heungkyu Kwon, Junso Pak, Heeseok Lee
  • Patent number: 11908916
    Abstract: A high voltage semiconductor device includes a semiconductor region of a first conductivity type having a first region and a second region, a first insulation pattern disposed over the first region of the semiconductor region to have a first thickness, a second insulation pattern disposed over the second region of the semiconductor region to have a second thickness greater than the first thickness, and a gate electrode disposed over the first and second insulation patterns to have a step structure over a boundary region between the first and second regions. The gate electrode has a doping profile that a position of a maximum projection range of impurity ions distributed in the gate electrode over the first region is located at substantially the same level as a position of a maximum projection range of impurity ions distributed in the gate electrode over the second region.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: February 20, 2024
    Assignee: SK hynix system ic Inc.
    Inventors: Soon Yeol Park, Yoon Hyung Kim, Yu Shin Ryu
  • Patent number: 11901376
    Abstract: The disclosure provides a display panel, a manufacturing method thereof and a displaying device. The display panel comprises a plurality of display units, and each display unit has an active area for display and an induction area for identifying fingerprints. The display unit comprises a substrate, a planarization layer, a pixel unit and an induction electrode, wherein the planarization layer is arranged on the substrate and comprises a first area and a second area, the first area is opposite to the active area, and the second area is opposite to the induction area and is provided with a concave-convex structure; the pixel unit is arranged on the planarization layer and located in the first area; and the induction electrode is arranged on the planarization layer and covers a concave-convex surface of the concave-convex structure.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: February 13, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zunqing Song, Hao Liu
  • Patent number: 11901172
    Abstract: A method for the surface treatment of a substrate surface of a substrate includes arranging the substrate surface in a process chamber, bombarding the substrate surface with an ion beam, generated by an ion beam source and aimed at the substrate surface, to remove impurities from the substrate surface, whereby the ion beam has a first component, and introducing a second component into the process chamber to bind the removed impurities. A device for the surface treatment of a substrate surface of a substrate includes a process chamber for receiving the substrate, an ion beam source for generating an ion beam that has a first component and is aimed at the substrate surface to remove impurities from the substrate surface, and means to introduce a second component into the process chamber to bind the removed impurities.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: February 13, 2024
    Assignee: EV Group E. Thallner GmbH
    Inventor: Nasser Razek
  • Patent number: 11901374
    Abstract: A display device in accordance with some embodiments may include a substrate, a first interlayer insulating layer on the substrate, a data conductor on the first interlayer insulating layer, a passivation layer on the data conductor, a pixel electrode layer on the passivation layer, and a shielding electrode between the data conductor and the pixel electrode layer, and defining a first contact opening and a second contact opening, wherein the data conductor and the pixel electrode layer are electrically coupled to each other in each of the first contact opening and the second contact opening.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: February 13, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hang Jae Lee, Yuk Hyun Nam, Sung Jae Yun
  • Patent number: 11894395
    Abstract: A display device includes a substrate including a display area and a non-display area driving circuits disposed in the non-display area; first voltage wirings and second voltage wirings extending from the display area to the non-display area; and a first auxiliary wiring electrically connected to the first voltage wirings and a second auxiliary wiring electrically connected to the second voltage wirings, the first auxiliary wiring and the second auxiliary wiring being electrically connected to the driving circuit, wherein the first voltage wirings electrically connected to an odd-numbered driving circuit among the driving circuits are electrically connected to the first auxiliary wiring through a first connection wiring, and the second voltage wirings electrically connected to an even-numbered driving circuit among the driving circuits are electrically connected to the second auxiliary wiring through a second connection wiring.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Yeon Kyung Kim
  • Patent number: 11894496
    Abstract: A light emitting device includes a LED having a light emitting first surface and a light emitting second surface that define a corner. A support layer is disposed to receive light emitted by the light emitting second surface and is disposed adjacent the corner. A luminophoric medium layer at least partially covers the light emitting first surface and the light emitting second surface where the luminophoric medium layer is at least partially supported by the support layer to prevent a narrowing of the luminophoric medium layer.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: February 6, 2024
    Assignee: CreeLED, Inc.
    Inventors: Robert Wilcox, Sarah Trinkle, Derek Miller, Peter Andrews, Colin Blakely
  • Patent number: 11887946
    Abstract: In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: January 30, 2024
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Adel A. Elsherbini, Sasha N. Oster
  • Patent number: 11887849
    Abstract: Disclosed herein are a method of forming a transition metal dichalcogenide thin film and a method of manufacturing a device including the same. The method of forming a transition metal dichalcogenide thin film includes: depositing a transition metal dichalcogenide thin film on a substrate; and heat-treating the deposited transition metal dichalcogenide thin film.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: January 30, 2024
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation, Sungkyunkwan University
    Inventors: Changhyun Kim, Sangwoo Kim, Kyung-Eun Byun, Hyeonjin Shin, Ahrum Sohn, Jaehwan Jung
  • Patent number: 11887997
    Abstract: A substrate and a display panel using the substrate are disclosed. The substrate includes a base layer; a magnetic material layer on a side of the base layer; and a thin film transistor (TFT) array layer on a side of the magnetic material layer away from the base layer.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: January 30, 2024
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Po-Liang Chen, Yung-Fu Lin