Patents Examined by Bo B Jang
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Patent number: 11764283Abstract: Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.Type: GrantFiled: April 13, 2022Date of Patent: September 19, 2023Inventors: Sunmin Moon, Young-Lim Park, Kyuho Cho, Hanjin Lim
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Patent number: 11764168Abstract: A chip package structure is provided. The chip package structure includes a wiring substrate having a surface. The chip package structure includes a chip structure over the surface of the wiring substrate. The chip package structure includes an antiwarpage structure over the surface of the wiring substrate. The antiwarpage structure surrounds the chip structure. The chip package structure includes a first anchor structure affixed to the surface of the wiring substrate and adjacent to a first lower portion of the antiwarpage structure. The first lower portion is between the first anchor structure and the chip structure, and the first anchor structure is electrically isolated from the chip structure.Type: GrantFiled: May 6, 2021Date of Patent: September 19, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hui-Ting Lin, Chin-Fu Kao, Chen-Shien Chen
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Patent number: 11749623Abstract: A method for fabricating memory devices includes forming a first portion of a memory device that includes a first device portion and one or more first interface portions. The first device portion includes a plurality of first memory strings, each of which includes a plurality of first memory cells vertically separated from one another. Each of the one or more first interface portions, laterally abutted to one side of the first device portion, includes a plurality of first word lines (WLs). The method further includes forming a plurality of first source lines (SLs) and a plurality of first bit lines (BLs) in the first device portion. The method further includes forming a first seal ring structure that laterally encloses both the first device portion and the first interface portion concurrently with forming the pluralities of SLs and BLs.Type: GrantFiled: August 27, 2021Date of Patent: September 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Meng-Han Lin, Chia-En Huang
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Patent number: 11749691Abstract: An electronic device substrate, a manufacturing method thereof, and an electronic device are provided. The electronic device substrate includes a base substrate, a first insulating layer, and light-emitting sub-units, a first conductive member and a second conductive member, which are on a side of the first insulating layer away from the base substrate. The light-emitting sub-units and the first conductive member are respectively in array region and periphery region, and the second conductive member is between the first conductive member and the array region; orthogonal projections of the first and second conductive members on the base substrate are spaced apart; each light-emitting sub-unit includes first and second driving electrodes, second driving electrodes of the light-emitting sub-units are integrated to form a first common electrode layer; the periphery region further includes a second common electrode layer electrically connected to the first conductive member and the first common electrode layer.Type: GrantFiled: June 23, 2022Date of Patent: September 5, 2023Assignee: BOE Technology Group Co., Ltd.Inventors: Kui Zhang, Pengcheng Lu, Li Liu, Yunlong Li, Dacheng Zhang
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Patent number: 11749658Abstract: A display device includes a substrate including a display area having a plurality of pixel areas and a non-display area located at at least one side of the display area; a pixel in each of the pixel areas; and a plurality of fan-out lines in the non-display area to form a first conductive layer. The pixel includes a pixel circuit layer including at least one transistor and a first bridge line and a second bridge line; and a display element layer on the pixel circuit layer. Each of the first and second bridge lines is electrically connected to a corresponding fan-out line from among the fan-out lines.Type: GrantFiled: June 16, 2022Date of Patent: September 5, 2023Assignee: Samsung Display Co., Ltd.Inventors: Ji Hye Lee, Kyung Bae Kim, Mee Hye Jung
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Patent number: 11749620Abstract: A semiconductor module includes: a semiconductor element; and a sealing member. The semiconductor element includes: a semiconductor substrate; a protection film on the semiconductor substrate; a metal film on the semiconductor substrate and having at least a part located between the semiconductor substrate and the protection film; and a dummy metal film on the semiconductor substrate between the metal film and the protection film. The surface of the semiconductor substrate has a recess. The protection film has an other recess or a hole. The dummy metal film is arranged in both the recess of the semiconductor substrate and the other recess or the hole of the protection film.Type: GrantFiled: November 4, 2021Date of Patent: September 5, 2023Assignee: DENSO CORPORATIONInventor: Junji Tanaka
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Patent number: 11749582Abstract: A package structure includes a bottom plate, a semiconductor package, a top plate, a screw and an anti-loosening coating. The semiconductor package is disposed over the bottom plate. The top plate is disposed over the semiconductor package, and includes an internal thread in a screw hole of the top plate. The screw penetrates through the bottom plate, the semiconductor package and the top plate, and includes an external thread. The external thread of the screw is engaged to the internal thread of the top plate, and the anti-loosening coating is adhered between the external thread and the internal thread.Type: GrantFiled: July 27, 2022Date of Patent: September 5, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chia Lai, Chen-Hua Yu, Chung-Shi Liu, Hsiao-Chung Liang, Hao-Yi Tsai, Chien-Ling Hwang, Kuo-Lung Pan, Pei-Hsuan Lee, Tin-Hao Kuo, Chih-Hsuan Tai
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Patent number: 11742378Abstract: A light emitting diode (LED) may include a conductive via in a first portion of an epitaxial layer and a first contact on a second portion of the epitaxial layer. The first portion and the second portion may be separated by an isolation region. The LED may include a transparent conductive layer on the epitaxial layer.Type: GrantFiled: April 28, 2022Date of Patent: August 29, 2023Assignee: Lumileds LLCInventors: Frederic Stephane Diana, Alan Andrew McReynolds
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Patent number: 11742462Abstract: A method for manufacturing a display device includes: providing a plurality of light emitting elements on a substrate; providing a first photosensitive resin layer on the light emitting elements; driving a plurality of first light emitting elements among the plurality of light emitting elements, the driving of the plurality of first light emitting elements hardening a portion of the first photosensitive resin layer which corresponds to the plurality of first light emitting elements; and providing a first color converting layer as the portion of the first photosensitive resin layer which is hardened, by removing a remaining portion of the first photosensitive resin layer.Type: GrantFiled: March 8, 2022Date of Patent: August 29, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Deukseok Chung, Shin Ae Jun
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Patent number: 11742361Abstract: A display substrate, a method for manufacturing a display substrate and a display device are provided, and the display substrate includes: a base having a first surface, a second surface and a side surface, the base includes a display area and an epitaxial area; a driving functional layer in the display area and first binding electrodes in the epitaxial area on the first surface, the first binding electrodes are coupled with the driving functional layer; second binding electrodes located on the second surface and coupled with the first binding electrodes through side wirings; a portion of each side wiring is located on the side surface; a blocking wall on the first surface and in the epitaxial region, an orthographic projection of the blocking wall on the base at least passes through spacing regions between every two adjacent first binding electrodes along an arrangement direction of the first binding electrodes.Type: GrantFiled: June 22, 2021Date of Patent: August 29, 2023Assignees: BOE MLED TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Linhui Gong, Chao Liu
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Patent number: 11735558Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: May 10, 2022Date of Patent: August 22, 2023Assignee: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Anurag Tripathi, Takeshi Nakazawa, Steve Cho
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Patent number: 11728463Abstract: An image display device includes a plurality of pixels each of which includes a plurality of first subpixels and a second subpixel. The plurality of first subpixels is configured to emit red light, green light, and blue light. The second subpixel is configured to emit blue light. The plurality of pixels includes at least one pixel in which the plurality of first subpixels includes a defective subpixel which is supposed to emit predetermined light with a predetermined color. The second subpixel includes a light-emitting element and a wavelength conversion layer provided over the light-emitting element to convert emission light emitted from the light-emitting element to converted light with the predetermined color if the predetermined color is red or green.Type: GrantFiled: November 4, 2021Date of Patent: August 15, 2023Assignee: NICHIA CORPORATIONInventor: Hajime Akimoto
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Patent number: 11728329Abstract: A semiconductor device includes: a capacitor disposed over a substrate including a lower electrode, a dielectric layer, and an upper electrode; and a discharge structure spaced apart from the capacitor, connected to the upper electrode of the capacitor, and suitable for discharging, to the substrate, a charge induced from a plasma process for forming the upper electrode of the capacitor.Type: GrantFiled: July 8, 2021Date of Patent: August 15, 2023Assignee: SK hynix Inc.Inventor: Sang Yun Nam
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Patent number: 11728371Abstract: An LED module includes light emission windows; LED cells corresponding to the light emission windows, the LED cells each including a lower and upper light emitting structure, the lower light emitting structure having an upper surface with first and second regions and having a first conductivity-type semiconductor layer, the upper light emitting structure being on the first region of the lower light emitting structure and having a second conductivity-type semiconductor layer, the LED cells including an active layer between the first and second conductivity-type semiconductor layers; a protective insulating film on a side surface of the lower light emitting structure and on the second region; a light blocking film on the protective insulating film, between the LED cells; a gap-fill insulating film on the protective insulating film between the LED cells and contacting a side surface of the upper light emitting structure; a first electrode; and a second electrode.Type: GrantFiled: April 8, 2022Date of Patent: August 15, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jihye Yeon, Hanul Yoo, Jihoon Yun, Suhyun Jo
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Patent number: 11728352Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.Type: GrantFiled: June 22, 2021Date of Patent: August 15, 2023Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xinhong Lu, Fangzhen Zhang, Guangcai Yuan, Zhanfeng Cao, Jiushi Wang, Ke Wang, Xiaoyan Zhu, Qi Qi, Jingshang Zhou, Zhaohui Qiang, Zhiwei Liang
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Patent number: 11728412Abstract: This application discloses a method for manufacturing a thin film transistor, and a display panel. The method for manufacturing a thin film transistor includes steps of providing a substrate; forming an amorphous silicon thin film layer on the substrate; patterning the amorphous silicon thin film layer to form an amorphous silicon layer; forming a metal seed layer made of a nickel disilicide (NiSi2) material on the amorphous silicon layer; converting the amorphous silicon layer into a polysilicon layer under an induction effect of the metal seed layer and through an annealing treatment; and forming a source and drain layer.Type: GrantFiled: December 5, 2019Date of Patent: August 15, 2023Assignee: HKC CORPORATION LIMITEDInventor: Bangtong Ge
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Patent number: 11721706Abstract: A display device includes pixels disposed in a display area and including first and second pixels that are adjacent to each other in a first direction, and a first integrated bank pattern disposed between the first and second pixels. Each of the pixels includes a first electrode and a second electrode that are spaced apart from each other along the first direction in a light emitting area and extend in a second direction, a first bank pattern portion overlapping the first electrode, and a second bank pattern portion overlapping the second electrode. The first integrated bank pattern includes a second bank pattern portion disposed at the first pixel, a first bank pattern portion disposed at the second pixel, and a protrusion extending in the second direction in a boundary area between the first pixel and the second pixel.Type: GrantFiled: May 19, 2021Date of Patent: August 8, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: No Kyung Park, Kyung Bae Kim, Min Kyu Woo
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Patent number: 11710762Abstract: A display device includes a substrate including a display area and a non-display area, and a first surface and a second surface; pixels disposed on the first surface; a signal line disposed on the first surface, and electrically connected to each pixel; a cushion layer disposed on the pixels and the signal line, and including at least one contact hole that exposes a portion of the signal line; a connector disposed in the at least one contact hole and electrically connected to the signal line; and a driver disposed on the cushion layer and electrically connected to the pixels through the connector. Each pixel includes a display element layer disposed on the first surface and including at least one light emitting element, and a pixel circuit layer disposed on the display element layer and including at least one transistor electrically connected to the at least one light emitting element.Type: GrantFiled: May 19, 2021Date of Patent: July 25, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Woong Sik Kim, Ji Hyun Kim, Sang Hyun Lee, Sae Hee Han
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Patent number: 11710684Abstract: A package is disclosed. In one example, the package comprises a substrate having at least one first recess on a front side and at least one second recess on a back side, wherein the substrate is separated into a plurality of separate substrate sections by the at least one first recess and the at least one second recess, an electronic component mounted on the front side of the substrate, and a single encapsulant filling at least part of the at least one first recess and at least part of the at least one second recess. The encapsulant fully circumferentially surrounds sidewalls of at least one of the substrate sections.Type: GrantFiled: October 14, 2020Date of Patent: July 25, 2023Assignee: Infineon Technologies AGInventors: Frank Singer, Martin Gruber, Thorsten Meyer, Thorsten Scharf, Peter Strobel, Stefan Woetzel
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Patent number: 11695092Abstract: A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.Type: GrantFiled: February 17, 2022Date of Patent: July 4, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yoonsuk Lee, Sangmoo Park, Doyoung Kwag, Byungchul Kim, Eunhye Kim, Minsub Oh, Dongyeob Lee