Abstract: Disposable food contact compatible microwaveable containers having one or more micronodular surface are disclosed. These containers, including plates, bowls, cups, trays, buckets, souffle dishes, and lids are prepared from a polyolefin selected from the group consisting of polypropylene, polypropylene polyethylene copolymer or blends, and mixtures of these, mica, and pigment and are thermoformed into the shape of a the aforementioned containers exhibiting (a) a micronodular surface on at least one side of the surface; (b) a melting point of not less than about 250.degree. F.; said containers being dimensionally stable and resistant to grease, sugar, and water at temperatures up to at least 250.degree. F. and being of sufficient toughness to resist cutting by serrated polystyrene flatware.
Type:
Grant
Filed:
October 8, 1997
Date of Patent:
September 19, 2000
Assignee:
Fort James Corporation
Inventors:
Cristian M. Neculescu, Richard J. Rogers, Mark B. Littlejohn, Anthony J. Swiontek
Abstract: An electrically conductive elastomer for grafting to an elastic substrate is disclosed. The conductive elastomer comprises a non-conductive elastic material having a quantity of conductive flakes interspersed therein. The conductive elastomer may further comprise a quantity of conductive particles interspersed in the non-conductive elastic material. Alternatively, a quantity of conductive particles may be imbedded in an outer surface of the conductive elastomer. The conductive elastomer is typically grafted to an elastic substrate by a thermal process.
Type:
Grant
Filed:
September 16, 1997
Date of Patent:
September 12, 2000
Assignee:
Thomas & Betts Inernational, Inc.
Inventors:
David R. Crotzer, Arthur G. Michaud, Neil N. Silva
Abstract: The present invention provides a power micromagnetic integrated circuit having a ferromagnetic core, a method of manufacture therefor and a power processing circuit employing the same, that includes: (1) a substrate; (2) an insulator coupled to the substrate and (3) a metallic adhesive that forms a bond between the insulator and the ferromagnetic core to secure the ferromagnetic core to the substrate.
Type:
Grant
Filed:
June 10, 1997
Date of Patent:
September 12, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Dean P. Kossives, Ashraf W. Lotfi, Lynn F. Schneemeyer, Michael L. Steigerwald, R. Bruce Van Dover
Abstract: A circuit assembly that includes a circuitized substrate having a dielectric interior layer with a first surface and at least one hole therein. A filler material substantially fills the hole within the dielectric interior layer. A first wiring layer is positioned on the first surface of the dielectric interior layer, wherein the first wiring layer substantially covers the hole and assists in retaining the filler material within the hole in the dielectric interior layer. A first dielectric photoresist layer is positioned on the first wiring layer and on the first surface of the dielectric interior layer. The first dielectric photoresist layer also includes at least one hole therein. The filler material also substantially fills the hole within the first dielectric photoresist layer. A second wiring layer is positioned on the first dielectric photoresist layer and includes a plurality of conductive pads as part thereof.
Type:
Grant
Filed:
March 2, 1998
Date of Patent:
September 5, 2000
Assignee:
International Business Machines Corporation
Inventors:
Anilkumar Chinuprasad Bhatt, Donald Herman Glatzel, Allen F. Moring, Voya Rista Markovich, Kostas Papathomas, David John Russell
Abstract: A pressure actuated switching apparatus includes first and second conductive layers and a plurality of discrete spaced apart dots between the first and second conductive layers. The dots serve as a standoff for separating the conductive layers and are fabricated from an insulative, elastomeric polymer foam which can collapse under the application of compressive force applied to the apparatus to allow contact between the conductive layers with minimized dead space. Alternatively, the standoff can include strips of electrically insulative elastomeric polymer foam.
Abstract: A laminate capable of mounting semiconductor elements thereon; comprising an insulating layer which is constituted by a resin portion of sea-island structure and a woven reinforcement. The resin portion of sea-island structure is, for example, such that a resin as islands are dispersed in a resin as a matrix. Thus, the insulating layer exhibits a coefficient of thermal expansion of 3.0.about.10 (ppm/K) in a planar direction thereof and a glass transition temperature of 150.about.300 (.degree.C.). Owing to these physical properties, thermal stresses which the laminate undergoes in packaging the semiconductor elements thereon can be reduced, so that the connections of the laminate with the semiconductor elements can be made highly reliable.
Abstract: A sealing label for sealing semiconductor element comprises a metal foil substrate or a heat-resisting organic film substrate having formed thereon a sealing material component layer for sealing a semiconductor element, wherein the sealing material component layer is convexly formed such that the layer has a thick flat portion at the central portion of the substrate as compared with the peripheral portion of the substrate. The use of the sealing label in molding a semiconductor device can provide a semiconductor device having a high quality without substantially having voids in the sealing resin.
Abstract: A thin film circuit substrate comprising multilayer conductor layers formed via insulating layers, wherein a signal transmission path in at least one of the conductor layers is embedded in a low dielectric constant insulator, and the low dielectric constant insulator is embedded in an insulator layer with a good adhesiveness. The thin film circuit substrate attains a low dielectric constant, and thus an improved signal propagation velocity, without lowering the interlayer adhesiveness.
Abstract: An article comprising a molded circuit for providing a path for electrical current is disclosed. The molded circuit is formed of a first material layer and a second material layer. The first material layer is an electrically insulating material. The second material layer is an electrically conductive material. In an alternate embodiment, the second material layer is surrounded between two layers of the first material layer. The molded circuit can be formed using multi-material injection molding such as co-injection molding or two-shot injection molding. A printed circuit board can comprise the molded circuit.
Abstract: A ceramic circuit substrate includes an insulating layer fabricated of a ceramic, a first surface conductor layer fabricated on a surface of the insulating layer and embedded in the insulating layer except at least its surface, and a second surface conductor layer fabricated to be stacked on the first surface conductor layer.
Type:
Grant
Filed:
September 22, 1997
Date of Patent:
August 15, 2000
Assignee:
Sumitomo Metal (SMI) Electronic Devices Inc.
Abstract: The invention related to a paste for via hole filling which enables inner via hole connection between electrode layers without employing through hole plating techniques, and a multi-layered printed circuit board using the same. The conductive paste composition of the invention comprises a) 70-90 wt % of copper particles of an average particle size of 0.5-8 .mu.m; b) 0.5-15 wt % of insulating particles of an average particle size of 8-20 .mu.m; and, c) 6-17 wt % of heat setting type liquid epoxy resin, in order to exhibit low viscosity and low volatility. The conductive paste is printed and filled into through holes passing through a laminated substrate which is provide with copper foils on both sides thereof, to form a printed circuit board in which the via holes are electrically connected after thermosetting.
Type:
Grant
Filed:
March 12, 1998
Date of Patent:
August 1, 2000
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A wiring substrate is provided in which a common core member is used and the cost can be reduced. Diameters of the penetrating filled vias (18) are the same and not more than 300 .mu.m, and the penetrating filled vias (18) are formed on a core substrate (20) into a matrix-shape at regular intervals of not more than 2 mm. On the surface of the core substrate (20), a plane wiring pattern (17) is formed through an insulating layer (16). Each pad portion on the wiring pattern (17) is electrically connected with each corresponding via of the filled vias (18) by one to one through a connecting via (28) which penetrates the insulating layer (16), and some of the filled vias (18) are not connected with the wiring pattern (17).
Abstract: A printed circuit board or card having plated through-holes is provided wherein plated through-holes are filled with a photocured polymerized composition. Also, a method for fabricating these printed circuit boards or cards is provided. Also provided are compositions and methods of providing carrier films coated with the compositions for use in filling vias or plated through-holes.
Type:
Grant
Filed:
September 1, 1998
Date of Patent:
July 18, 2000
Assignee:
International Business Machines Corporation
Inventors:
Gary Alan Johansson, Konstantinos I. Papathomas
Abstract: A security packaging incorporates security features as an integral part thereof. A blank made from a substantially rigid material incorporates at least one repeatedly verifiable authenticating security feature which cannot be separated from the material without causing damage to it. The security feature may comprise a multilayer laminate.
Abstract: An electromagnetic sheilding bonding film has a substantially transparent base film and an electroconductive metallic material layer geometrically patterned on the base film to have an aperture ratio of 50% or more. A bonding agent layer is placed at least over a part of the plastic base film not covered by the electroconductive metallic material layer and has a predetermined selectively given fluidity.
Abstract: One or more particulate active agents are fused to the surface of a substrate web by mixing the particulate agents with a particulate binder having a particle size not exceeding an average diameter of approximately 40 microns and coating the composite mixture onto the surface of the substrate. Thereafter, the coated substrate is heated to a temperature equal to or greater than the Vicat softening temperature of the binder and compressed within the nip of a pair of pressure rolls to achieve fusion. If desired, a top layer may be placed upon the coated composite prior to the compression step. Also disclosed are various products manufactured by the process.
Type:
Grant
Filed:
July 22, 1997
Date of Patent:
June 20, 2000
Assignee:
Koslow Technologies Corporation
Inventors:
Evan E. Koslow, Richard D. Kendrick, Gordon Spilkin
Abstract: An inductor element comprises a copper pattern on a PCB on which a magnetic powder is deposited. The inductor is formed according to the method of the invention by etching a copper layer of a PCB in a desired pattern. A magnetic powder-loaded ink is then screened or stenciled over the pattern of the inductor elements etched in the copper layer of the PCB. The resulting inductor element is enhanced, having increased low frequency inductance and increased high frequency loss. Multiple inductor elements may be formed on a single PCB in a single process without requiring further cost or steps in the method.
Abstract: There is provided a multi-layered printed wiring board including a power supply layer, a ground layer, a signal layer, and insulators sandwiched between those layers. The power supply layer is provided with a circuit in the form of wirings for imparting impedance thereto. For instance, the power supply layer may be formed to include main wirings for distributing a dc current entirely to the printed wiring board with a dc voltage drop being depressed, and branch wirings for enhancing high frequency impedance to isolate circuits in terms of high frequency, which circuits are mounted on the multi-layered printed wiring board and operated independently with each other. The invention makes it possible to provide a relatively great inductance to thereby decrease high frequency power supply current which is generated on IC/LSI operation and is to flow into decoupling capacitors.
Abstract: A multi-layered circuit substrate and a manufacturing method thereof comprising the steps of coating the upper surface of a substrate with a photosensitive insulating layer; exposing and developing the photosensitive insulating layer to form a photosensitive insulating layer of predetermined pattern and pattern spaces; forming a conductive layer by printing a conductive ink in the pattern spaces; and forming a plurality of layers by performing the previous steps, each layer comprising a photosensitive insulating layer of predetermined pattern and pattern spaces and a conductive layer formed in the pattern spaces.