Abstract: A parts-packaging substrate comprising a metal wiring plate having a mask coated on its surface with several openings. This structure eliminates the need for a thick base formed of an insulating body and a resist layer required in prior art substrates. By bending a terminal of the metal wiring plate to form a connecting terminal, a connector used to connect to another substrate can be eliminated, reducing the cost of manufacture.
Type:
Grant
Filed:
February 9, 1998
Date of Patent:
December 26, 2000
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: An improved interface pad or layer for use in combination with solid state electronic components adapted to be interposed along a heat dissipating path between the electronic device and a mounting chassis or heat-sink surface. The interface pads comprise a polyphenylsulfone binder or matrix blended with a particulate solid such as alumina, boron nitride, graphite, silicon carbide, diamond, metal powders, and mixtures or blends thereof. Advantageous formulations include up to 45% alumina. Another advantageous formulation includes between 10% and 20% by weight of boron nitride, balance polyphenylsulfone.
Abstract: A data transmission micromagnetic integrated circuit having a ferromagnetic core, a method of manufacture therefor and a data transmission circuit employing the same. In one embodiment, the micromagnetic integrated circuit includes: (1) a substrate; (2) an insulator coupled to the substrate and (3) a metallic adhesive that forms a bond between the insulator and the ferromagnetic core to secure the ferromagnetic core to the substrate.
Type:
Grant
Filed:
July 2, 1998
Date of Patent:
December 19, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Dean P. Kossives, Ashraf W. Lotfi, Lynn F. Schneemeyer, Michael L. Steigerwald, R. Bruce Van Dover
Abstract: An apparatus and method for evenly applying an atomized adhesive for bonding a die to a leadframe are disclosed. In one embodiment, the apparatus includes a hood in communication with an air supply and a vacuum plenum that encompass a semiconductor device component located in a target area during adhesive application so that the adhesive is selectively applied to specific portions of the leadframe or other semiconductor device component and adhesive is not allowed outside the system. A mask or stencil may be employed for further prevention of adhesive application to undesired areas. An air purge may be employed to direct the adhesive mist toward the component to be coated. In another embodiment, a fine adhesive spray is directed against the surface of the workpiece to be coated, selected areas being masked to prevent coating. Wafers may be coated, as well as leadframes.
Abstract: The present invention relates to a multilayer wiring substrate for mounting a semiconductor chip, etc. The multilayer wiring substrate is comprised of a plurality of double-sided circuit substrates, each comprised of an organic high molecular weight insulating layer and wiring conductor. An adhesive is used for laminating the double-sided circuit substrates. A Ni--Fe based alloy foil or a titanium foil is embedded within the organic high molecular weight insulating layer.
Abstract: The method (400, 500) and device (200) for reworkable direct chip attachment include a thermal-mechanical and mechanical stable solder joint for arranging connection pads on a top surface of the circuit board to facilitate connection for electronic elements, and affixing a reinforcement having apertures to accommodate solder joints to the top surface of the circuit board to facilitate solder attachment of the connection pads to the electronic elements wherein the reinforcement constrains deformation of the circuit board to provide reliable solder joints and facilitates attachment and removal of electronic elements from the circuit board.
Type:
Grant
Filed:
August 29, 1997
Date of Patent:
December 5, 2000
Assignee:
Motorola, Inc.
Inventors:
Wen Xu Zhou, Daniel Roman Gamota, Sean Xin Wu, Chao-pin Yeh, Karl W. Wyatt, Chowdary Ramesh Koripella
Abstract: The present invention provides a carrier film in which a cover resist layer made of epoxy acrylate resin including a fluorene skeleton is formed on a heat-resistant resin film including a conductive wiring pattern. The carrier film has heat resistance, moisture resistance, and close contact property, as well as chemical resistance in a plating process or the like, and does not warp because contraction in resin hardening is small.
Abstract: The present invention provides a method for producing a high-density multi-layer ceramic substrate with stable characteristics, the substrate incorporating therein a passive component such as a high-precision capacitor or inductor. The method comprises the steps of providing compact blocks containing a green ceramic functional material to form the passive components; providing a composite green laminate having a plurality of ceramic green sheets comprising a ceramic insulating material and in which the compact blocks are built in pre-disposed spaces and a paste containing a metal inducing, during firing, oxidation reaction accompanied by expansion is provided in space between inside walls of the spaces and the compact blocks; firing the composite green laminate in a state in which the laminate is sandwiched by the sheet-like supports formed of green ceramics that cannot be sintered at the sintering temperature, so as to prevent shrinkage of the laminate; and removing the unsintered sheet-like supports.
Abstract: Aspects for exposing local areas for desired nodes in a multi-layer integrated circuit from the backside are described. In an exemplary method aspect, the method includes removing a predetermined portion of a first backside layer, opening chosen local areas with focused ion beam etching through at least the first backside layer, and exposing a desired node in a metal layer lower than the first backside layer with reactive ion etching. The method further includes removing the predetermined portion by performing reactive ion etching to a predetermined stop point. Alternatively, the first backside layer is mechanically polished to a predetermined thickness. Additionally, the method includes utilizing a high current ion beam during the focused ion beam etching.
Abstract: The present invention relates to multi-layer ceramic packaging of hybrid micro-electronic devices, including those for implantable medical devices. The invention permits size reduction and design simplification in such packaging by eliminating the need for electrolytic or electroless plating, and by eliminating or substantially eliminating the shrinkage variation typically associated with surface metallization techniques.
Type:
Grant
Filed:
March 31, 1999
Date of Patent:
November 14, 2000
Assignee:
Medtronic, Inc.
Inventors:
Samuel F. Haq, Patrick F. Malone, Donald P. Varner
Abstract: A low dielectric constant composition with a dielectric constant of 4 or less is disclosed. The composition comprises a matrix resin and crosslinked resin particles having an average particle diameter in the range from 0.03 to 10 .mu.m, the crosslinked resin particles being prepared by the polymerization of 1-100 wt % of cross-linking monomers and 0-99 wt % of non-cross-linking monomers, having a dielectric constant of 3 or less, and having a 50 ppm or less average concentration of metal ions. The composition exhibits superior insulation properties and capable of producing an insulating material and sealing material with a low dielectric constant and low dielectric loss tangent (tan .delta.). An insulating material and a sealing material comprising this low dielectric composition and a circuit board provided with the insulating material or sealing material are also disclosed.
Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree.C. A semiconductor device is electrically attached to the laminated substrate.
Abstract: The present invention relates to electronic components and in particular relates to ceramic-based electronic components wherein a portion of the component comprises a metal-infiltrated ceramic. In a preferred embodiment, the metal-infiltrated ceramic comprises copper metal.
Type:
Grant
Filed:
October 13, 1997
Date of Patent:
November 7, 2000
Assignee:
Coorstek, Inc.
Inventors:
Marcus A. Ritland, Dennis W. Readey, James E. Stephan, Dean A. Rulis, Jack D. Sibold
Abstract: Thermoplastic printed wiring board spacers are fabricated by providing a water soluble partially hydrolyzed polyvinyl alcohol resin or fully hydrolyzed polyvinyl alcohol resin or a blend of partially hydrolyzed polyvinyl alcohol resin and fully hydrolyzed polyvinyl alcohol resin, the ratio thereof depending upon (1) the degree of hydrolyzation of the polyvinyl alcohol resins, (2) crystallinity associated with particular polyvinyl alcohol resins, (3) the fabrication temperatures of the printed wiring board to avoid spacer melting and (4) the degree of solubility in water of the spacer. The spacers are fabricated by injection molding the polyvinyl alcohol resins or desired polyvinyl alcohol resin mixture to provide a molded configuration having a runner system with spacers attached to a sub runner system by a very thin gate.
Abstract: Disclosed is a multilayer ceramic substrate, and a method for forming same, which has an outer unsealed layer having a metallic via, an inner sealed layer having a composite via of metallic and ceramic materials and a further unsealed layer having a metallic via.
Type:
Grant
Filed:
May 26, 1999
Date of Patent:
October 24, 2000
Assignee:
International Business Machines Corporation
Inventors:
Benjamin V. Fasano, Richard F. Indyk, Sundar M. Kamath, John U. Knickerbocker, Scott I. Langenthal, Daniel P. O'Connor, Srinivasa S. N. Reddy
Abstract: A method for forming a through-via in a laminated substrate by laser drilling the through-via in a laminated substrate from a top exposed surface of the substrate to a bottom exposed surface of the substrate using a plurality of laser pulses that are trepanned in a first predetermined pattern. Each pulse trepanned in the first predetermined pattern has a first energy density per pulse. Then, the through-via is laser drilled using a plurality of laser pulses that are trepanned in a second predetermined pattern. Each pulse trepanned in the second predetermined pattern has a second energy density per pulse that is greater than the first energy density per pulse. The second predetermined pattern is within the first predetermined pattern.
Abstract: Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil and a peelable film to the substrate, and forming holes in the substrate through the peelable film and foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is deposited onto a sacrificial carrier and the filler material is heated to at least partially cure it. The filler material is laminated onto the peelable film with sufficient heat and pressure to force the filler material to fill the holes. For thermoconductive filler the holes are filled sufficient for electrical connection through the holes. The peelable layer, sacrificial carrier and filler material remaining therebetween are peeled off the copper foil. The filler material is abraded to the level of the foil and is then copper plated. The copper is patterned to form a wiring layer.
Type:
Grant
Filed:
March 10, 1998
Date of Patent:
October 3, 2000
Assignee:
International Business Machines Corporation
Inventors:
Anilkumar Chinuprasad Bhatt, Donald Herman Glatzel, Allen F. Moring, Voya Rista Markovich, Kostas Papathomas, David John Russell
Abstract: A conformal coating and method for applying same to a printed electrical circuit board, components and leads for providing corrosion resistance. In a preferred embodiment, the conformal coating comprises a first coating layer of parylene which is vacuum deposited and removably bonded onto an ultra-clean surface of a printed circuit board including attached components and leads. Additionally, a second coating layer of a corrosion inhibiting viscous fluid is deposited onto the first coating layer to form a continuous, stratified, conformal coating which is sealed and corrosion resistant.
Type:
Grant
Filed:
December 11, 1997
Date of Patent:
October 3, 2000
Assignee:
American Meter Company
Inventors:
Randy L. L. McCullough, John Lee Wayt, James N. Butch
Abstract: A camouflage covering having a porous underlayer such as a knit mesh of 90% open area, and a plurality of dangling elements each having a base portion that is joined to and extends essentially transversely out from the porous underlayer. The dangling elements are arranged so as to essentially cover the porous underlayer so as to present a covering that has depth and provides a loft effect. The dangling elements are preferably strips having a low emissivity (0.02-0.50) inner layer and an external coating, which is thermally transparent but supports pigments that provide a visual and near infrared radiation signature suppression effect.
Type:
Grant
Filed:
January 23, 1998
Date of Patent:
October 3, 2000
Assignee:
Teledyne Industries, Inc.
Inventors:
Philip R. Cox, Jerry C. Edwards, Jody S. Loyd, Larry Watkins
Abstract: A substrate structure for surface mount devices includes: a plurality of substrate layers including at least a base layer and an outer layer; the base layer having a contact surface and a first array of conductive pads on the contact surface; the outer layer having a contact surface, a cutout and a second array of conductive pads on the contact surface; and the outer layer being mounted to the base layer with the cutout positioned over the first array, wherein the first array and the second array define in combination a device mounting site.
Type:
Grant
Filed:
March 10, 1998
Date of Patent:
September 19, 2000
Inventors:
John J. Luvara, Jay J Quigley, Ray Prasad