Patents Examined by Cathy Lam
  • Patent number: 7968187
    Abstract: A composite is provided, comprising a substrate and a film on the substrate. The film has an RMS surface roughness of 25 nm to 500 nm, a film coverage of 25% to 60%, a surface energy of less than 70 dyne/cm; and a durability of 10 to 5000 microNewtons. Depending on the particular environment in which the film is to be used, a durability of 10 to 500 microNewtons may be preferred. A film thickness 3 to 100 times the RMS surface roughness of the film is preferred.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: June 28, 2011
    Assignee: Integrated Surface Technologies
    Inventors: Jeff Chinn, W. Robert Ashurst, Adam Anderson
  • Patent number: 7968804
    Abstract: An article includes a polymeric film having a major surface, a discontinuous layer of a catalytic material on the major surface, and a metal pattern on the catalytic material. The discontinuous layer of catalytic material has an average thickness of less than 200 angstroms. Methods of forming these articles are also disclosed.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: June 28, 2011
    Assignee: 3M Innovative Properties Company
    Inventors: Matthew H. Frey, Tracie J. Berniard, Roxanne A. Boehmer
  • Patent number: 7964801
    Abstract: A circuit board structure and fabrication method thereof are disclosed, including: a circuit board with a circuit layer thereon; a reactant formed on the surface of the circuit layer, wherein the reactant is an organic metallic polymer having a polymer end and a metal ion end; and a dielectric layer formed above the reactant and the circuit board, thus forming a metallic bond between the metal ion end of the reactant and the circuit layer and forming a chemical bond between the polymer end of the reactant and the dielectric layer. Owing to enhanced bonding between the dielectric layer and the circuit board, electrical performance of the circuit board structure is improved, and the demand for fine circuits is met.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: June 21, 2011
    Assignee: Unimicron Technology Corp.
    Inventor: Chao-Wen Shih
  • Patent number: 7964289
    Abstract: A printed wiring board having a conductor circuit comprising a copper layer adjacent to an insulating layer and an electroless gold plating, wherein the insulating layer has ten-point mean surface roughness (Rz) of 2.0 ?m or less is provided. According to the present invention, there is no such a defect that gold plating is deposited on a resin, and fine wiring formation with accuracy is realized.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: June 21, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Kenji Takai, Norio Moriike, Kenichi Kamiyama, Katsuyuki Masuda, Kiyoshi Hasegawa
  • Patent number: 7957119
    Abstract: A metal film containing Ni as a main component and Mn and at least one element selected from the group consisting of the elements of Groups 3b, 4b, 5b, and 6b of the periodic table includes a central part and a peripheral part in which Mn and the element selected from the group consisting of the elements of Groups 3b, 4b, 5b, and 6b of the periodic table are present in a concentration higher in the peripheral part than that in the central part. The metal film used as a conductor layer can have an increased melting point at the peripheral part and thus can be prevented from shrinking during heating. The metal film used as a conductor layer in electronic components and the like can be prevented from plastically deforming or shrinking during heating so that the conductor layer can have a large effective area and high adhesion to ceramic layers.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: June 7, 2011
    Assignee: Kyocera Corporation
    Inventors: Katsuyoshi Yamaguchi, Koshiro Sugimoto
  • Patent number: 7955689
    Abstract: The present invention provides a metal clad laminate or a resin coated metal foil having a metal foil whose both surfaces are not substantially roughening-treated and an insulating resin composition layer using generally used insulating resin, and a printed wiring board and a manufacturing method thereof, in which the metal clad laminate or the resin coated metal foil is used, the reliability and circuit formability are high, and the conductor loss is extremely low.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: June 7, 2011
    Assignee: Hitachi Chemical Co, Ltd.
    Inventors: Kenji Takai, Takayuki Sueyoshi
  • Patent number: 7956472
    Abstract: A packaging substrate having an electrical connection structure and a method for fabricating the same are provided. The packaging substrate have a substrate body with a plurality of conductive pads on a surface thereof; a solder mask layer disposed on the substrate body with a plurality of openings corresponding to the conductive pads, the size of each of the openings being larger than each of the conductive pads; and electroplated solder bumps for covering the conductive pads to provide better bond strength and reliability.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: June 7, 2011
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Ping Hsu
  • Patent number: 7947332
    Abstract: A printed wiring board prepreg according to the present invention is a printed wiring board prepreg obtained by impregnation-drying of a base material with a thermosetting resin composition, and when it is bent by 90°, cracks do not occur in the base material.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: May 24, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Nozomu Takano, Kazumasa Takeuchi, Katsuyuki Masuda, Masashi Tanaka, Kazuhito Obata, Yuuji Ooyama, Yoshitsugu Matsuura
  • Patent number: 7947344
    Abstract: An artificial banana apparatus includes a plurality of artificial banana bodies, each artificial banana body being elongate and curved, each artificial banana body having a stem end and an opposed tip, and each stem end having a channel. The banana apparatus including a plurality of elongate stems, each stem having a first end telescopically received in a respective channel to allow a length of the stem outside said artificial banana body to be adjusted, each stem having a second end with a magnetic element. The apparatus includes a stem hub having at least one magnetic element complementary to the stem magnetic elements to removably couple the stems to the stem hub, the stem hub having at least two rows of sockets complementary to the stem second ends to receive the stem second ends in at least two rows.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: May 24, 2011
    Inventor: Judith J. Miller
  • Patent number: 7937835
    Abstract: A composite ceramic substrate for receiving an ejection head chip for a micro-fluid ejection head and a method for making the composite ceramic substrate. The substrate includes a high temperature previously fired ceramic base having a substantially planarized first surface and at least one fluid supply slot therethrough. A low temperature co-fired ceramic (LTCC) tape layer bundle having at least two LTCC tape layers is attached to the ceramic base at an interface between the LTCC tape layer bundle and the first surface of the ceramic base. The LTTC tape layer bundle has at least one chip pocket therein and at least one of the LTCC tape layers includes a plurality of conductors.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: May 10, 2011
    Assignee: Lexmark International, Inc.
    Inventors: Frank Edward Anderson, Michael John Dixon, Eric Spencer Hall, Elios Klemo, Bryan Dale McKinley, Jeanne Marie Saldanha Singh
  • Patent number: 7931973
    Abstract: Disclosed is a manufacturing method of metal structure in multi-layer substrate and structure thereof. The manufacturing method of the present invention comprises following steps: coating at least one photoresist layer on a surface of a dielectric layer, and then exposing the photoresist dielectric layer to define a predetermined position of the metal structure; therefore, removing the photoresist layer at the predetermined position and forming the metal structure at the predetermined position before forming at least one top-cover metal layer on a surface of the metal structure. The present invention can form a cover metal layer covering over the top surface and the two side surfaces, even the under surface of the metal structure, by one single photomask. Moreover, a finer metal structure with higher reliability can be manufactured. Furthermore, a metal structure can be used as a coaxial structure is also realized.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: April 26, 2011
    Assignee: Princo Corp.
    Inventor: Chih-kuang Yang
  • Patent number: 7931518
    Abstract: The present invention provides a process for preparing a light transmissive electromagnetic wave shielding material having an excellent light transmissive property, an excellent electromagnetic wave shielding property, an excellent appearance property and an excellent legibility by a simple method. A process for the preparation of a light transmissive electromagnetic wave shielding material comprising; (A1) printing a pretreatment agent for electroless plating comprising a noble metal compound and a mixture of silane coupling agent and azole compound or a reaction product thereof in a mesh pattern on a transparent substrate 11 to form a mesh-patterned pretreatment layer 12, and (A2) subjecting the pretreatment layer 12 to electroless plating to form a mesh-patterned metal conductive layer 13 on the pretreatment layer 12.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: April 26, 2011
    Assignee: Bridgestone Corporation
    Inventors: Hidefumi Kotsubo, Tatsuya Funaki, Kiyomi Sasaki
  • Patent number: 7915527
    Abstract: The present invention is directed to low-cost, low-processing temperature, and simple reinforcement, repair, and corrosion protection for hermetically sealed modules and hermetic connectors. A thin layer of glass is applied over the module's seal or the connector' glass frit. The layer of glass comprises an alkali silicate glass. The layer of glass is produced from a material which is a low viscosity liquid at room temperature prior to curing and is cured at low temperatures (typically no more than about 160 degrees Celsius). Subsequent to curing, the layer of glass is intimately bonded to the seal, watertight, and is stable from about negative two-hundred forty-three degrees Celsius to at least about seven-hundred twenty-seven degrees Celsius. The glass layer provides corrosion protection, seals any existing leaks, and possesses good flexibility and adhesion. The resulting bond is hermetic with good aqueous durability and strength similar to that of monolithic structures.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: March 29, 2011
    Assignee: Rockwell Collins, Inc.
    Inventors: Nathan P. Lower, David M. Brower, Ross K. Wilcoxon
  • Patent number: 7911801
    Abstract: A laminate includes base material layers and interlayer constraining layers disposed therebetween. The base material layers are formed of a sintered body of a first powder including a glass material and a first ceramic material, and the interlayer constraining layer includes a second powder including a second ceramic material that will not be sintered at a temperature for melting the glass material, and is in such a state that the second powder adheres together by diffusion or flow of a portion of the first powder including the glass material included in the base material layer at the time of baking. The incorporated element is in such a state that an entire periphery thereof is covered with the interlayer constraining layer.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: March 22, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yuichi Iida, Osamu Chikagawa
  • Patent number: 7910214
    Abstract: The present invention relates to a molded ferrite sheet having opposing surfaces and a thickness in a range of 30 ?m to 430 ?m, at least one surface of said opposing surfaces having the following surface roughness characteristics (a) to (c): (a) a center line average roughness is in a range of 170 nm to 800 nm, (b) a maximum height is in a range of 3 ?m to 10 ?m, and (c) an area occupancy rate of cross-sectional area taken along a horizontal plane at a depth of 50% of the maximum height in a square of side 100 ?m is in a range of 10 to 80%.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: March 22, 2011
    Assignee: Toda Kogyo Corporation
    Inventors: Tetsuya Kimura, Tomohiro Dote, Kazumi Yamamoto, Takanori Doi, Yoji Okano
  • Patent number: 7906200
    Abstract: A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: March 15, 2011
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chih-Peng Fan
  • Patent number: 7901761
    Abstract: The invention is a hermetic via in a ceramic substrate that is comprised of noble metal powder in a glass-free paste that contains an admixture of a particulate phase of niobium pentoxide. The electrically conductive platinum provides excellent electrical conductivity while the niobium pentoxide phase prevents shrinkage of the paste during thermal processing and binds to both the ceramic and the noble metal particulates in the via, thus maintaining a hermetic seal around the via.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: March 8, 2011
    Assignee: Alfred E. Mann Foundation For Scientific Research
    Inventors: Guangqiang Jiang, Attila Antalfy, Gary D. Schnittgrund
  • Patent number: 7892655
    Abstract: An ultrathin copper foil with a carrier not causing blistering at a release layer interface, having a low carrier peeling force, friendly to the environment, and enabling easy peeling of a carrier foil and an ultrathin copper foil even under a high temperature environment and a printed circuit board enabling a stable production quality of a base of a printed circuit board for fine pattern applications using the ultrathin copper foil with the carrier, that is, an ultrathin copper foil with a carrier comprising a carrier foil, a release layer, and an ultrathin copper foil, wherein the release layer is formed by a metal A for retaining a release property and a metal B for facilitating plating of the ultrathin copper foil, a content a of the metal A and a content b of the metal B forming the release layer satisfying an equation: 10?a/(a+b)*100?70 and a printed circuit board prepared by using such an ultrathin copper foil with a carrier.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: February 22, 2011
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Yuuji Suzuki, Takami Moteki, Kazuhiro Hoshino, Satoshi Fujisawa, Akira Kawakami
  • Patent number: 7887905
    Abstract: There is provided a constraining green including a first constraining layer having a surface disposed on the one of the top and bottom surfaces of the ceramic laminated body, the first constraining layer containing a first inorganic powder; and a second constraining layer disposed on a top of the first constraining layer and containing a second inorganic powder and a fly ash. The constraining green sheet serves to ensure less shrinkage of the ceramic laminated body and improve debinding characteristics.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Beom Joon Cho, Jong Myeon Lee
  • Patent number: 7888602
    Abstract: Provided is a printed circuit board having air vents and a semiconductor package that uses the printed circuit board having the air vents. The printed circuit board includes a substrate layer having a circuit pattern and a protection layer formed on the substrate layer, a molding region on which at least one semiconductor chip is mounted and for which a molding for the semiconductor chip is performed, and a plurality of air vents extending towards edges of the printed circuit board from the molding region.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Yong Park