Abstract: A ceramic circuit substrate and a manufacturing method thereof are provided, which has excellent thermal shock tolerance by forming a gap between a circuit pattern section and a ceramic substrate, and has a capability of preventing etchant residue from remaining therein. The ceramic circuit substrate according to the present invention includes patterns of brazing material (8 and 9) formed on the ceramic substrate, and a circuit pattern section jointed to the patterns of brazing material. The patterns of brazing material includes a line pattern along the edge of the circuit pattern. Also, a gap is formed within the line pattern located between the ceramic substrate and the circuit pattern.
Abstract: An ultrathin copper foil with a carrier not causing blistering at a release layer interface, having a low carrier peeling force, friendly to the environment, and enabling easy peeling of a carrier foil and an ultrathin copper foil even under a high temperature environment and a printed circuit board enabling a stable production quality of a base of a printed circuit board for fine pattern applications using the ultrathin copper foil with the carrier, that is, a ultrathin copper foil with a carrier comprising a carrier foil, a diffusion prevention layer, a release layer, and an ultrathin copper foil, wherein the release layer is formed by a metal A for retaining a release property and a metal B for facilitating plating of the ultrathin copper foil, a content a of the metal A and a content b of the metal B forming the release layer satisfying an equation: 10?a/(a+b)*100?70 and a printed circuit board prepared by using such a ultrathin copper foil with a carrier.
Abstract: A method for manufacturing a multilayer electronic component includes a step of preparing a laminate which includes a plurality of stacked insulator layers and a plurality of internal electrodes extending along the interfaces between the insulator layers, and in which an end of each of the plurality of internal electrodes is exposed at a predetermined surface corresponding to one of the first and second end surfaces; a step of forming external electrodes on the predetermined surfaces; and a step of forming thick-film edge electrodes at edge portions. The step of forming external electrodes includes a step of attaching a plurality of conductive particles having a particle size of about 1 ?m or more to the predetermined surfaces of the laminate, and a step of performing plating directly on the predetermined surfaces to which the conductive particles are attached.
Abstract: A circuit board, having improved adhesion between its via conductor and insulating layer, is provided. The circuit board includes a first wiring layer, a second wiring layer, the insulating layer, a filler, and the via conductor. The first wiring layer and the second wiring layer are electrically insulated from each other by the insulating layer. The filler which has a favorable thermal conductivity is added into the insulating layer. The via conductor establishing electrical connection between the first wiring layer and the second wiring layer is formed in a predetermined position of the insulating layer. The via conductor is in direct contact with part of the filler added into the insulating layer.
Abstract: The present invention relates to methods and arrangements for forming a solder joint connection. One embodiment involves an improved solder ball. The solder ball includes a perforated, metallic shell with an internal opening. Solder material encases the shell and fills its internal opening. The solder ball may be applied to an electrical device, such as an integrated circuit die, to form a solder bump on the device. The solder bump in turn can be used to form an improved solder joint connection between the device and a suitable substrate, such as a printed circuit board. In some applications, a solder joint connection is formed without requiring the application of additional solder material to the surface of the substrate. The present invention also includes different solder bump arrangements and methods for using such arrangements to form solder joint connections between devices and substrates.
Abstract: A manufacturing method of a clad board includes: sticking a releasing film to a pre-preg sheet; forming a non-through-hole or through-hole in the pre-preg sheet including the releasing film; filling the hole with conductive paste; peeling off the film; and heating and pressing a metal foil onto the pre-preg sheet. The clad board has a smooth face formed on one face or both the faces of the pre-preg sheet, so that the conductive paste is restrained from spreading in an interface between the pre-preg sheet and the releasing film. This structure can avoid short-circuit between circuits and prevent insulating reliability from lowering. As a result, an yield rate is improved, and a reliable circuit board is obtainable.
Abstract: In one aspect, a copper foil for lamination to a dielectric substrate includes a layer deposited on a surface of the copper foil. The layer is formed from chromium and zinc ions or oxides and is treated with an aqueous solution containing at least 0.5% silane. In another aspect, a peel strength enhancement coating is disposed between a copper foil laminate and a dielectric substrate. The peel strength enhancement coating comprises a metal and metal oxide mixture containing a metal selected from groups 5B, 6B, and 7B of the periodic table of the elements. The effective thickness of the peel strength enhancement coating is that thickness capable of providing less than or equal to 10% loss of peel strength, when measured in accordance with IPC-TM-650 Method 2.4.8.5 using a ? inch wide test specimen, after being immersed in 4N HCl at about 60° C. for 6 hours.
Type:
Grant
Filed:
December 4, 2003
Date of Patent:
July 6, 2010
Assignee:
GBC Metals, L.L.C.
Inventors:
William L. Brenneman, Andrew Vacco, Szuchain F. Chen
Abstract: The present invention provides a metal clad laminate or a resin coated metal foil having a metal foil whose both surfaces are not substantially roughening-treated and an insulating resin composition layer using generally used insulating resin, and a printed wiring board and a manufacturing method thereof, in which the metal clad laminate or the resin coated metal foil is used, the reliability and circuit formability are high, and the conductor loss is extremely low.
Abstract: Provided is a printed circuit board having a structure that can prevent the generation of cracks around a rectangular hole and a method of manufacturing a printed circuit board for a semiconductor package. The printed circuit board includes a base substrate in which at least one window slit is formed, a plurality of circuit patterns formed at least on a side surface of the base substrate, a protective layer formed on the base substrate and the circuit patterns, and a crack preventive layer that is formed along at least a portion of edges of the window slit and is not formed at least on the circuit patterns.
Abstract: The present invention provides a metal clad laminate or a resin coated metal foil having a metal foil whose both surfaces are not substantially roughening-treated and an insulating resin composition layer using generally used insulating resin, and a printed wiring board and a manufacturing method thereof, in which the metal clad laminate or the resin coated metal foil is used, the reliability and circuit formability are high, and the conductor loss is extremely low.
Abstract: The present invention provides a flexible electrode array, comprising a silicone containing body, at least one metal trace layer and at least one electrode pad on the surface.
Abstract: A capture pad structure includes a lower dielectric layer, a capture pad embedded within the lower dielectric layer, the capture pad comprising a plurality of linear segments. To form the capture pad, a focused laser beam is moved linearly to form linear channels in the dielectric layer. These channels are filled with an electrically conductive material to form the capture pad.
Abstract: A multilayer ceramic substrate includes a plurality of stacked glass ceramic layers and internal conductors. The glass ceramic layers contain at least one diffusion element selected from the group consisting of Ti, Zr and Mn. The internal conductors contain Ag as a conductive material. The multilayer ceramic substrate is produced by the steps of adding at least one diffusion element selected from the group consisting of Ti, Zr and Mn to conductive paste and diffusing the diffusion element in the glass ceramic layers around the conductive paste. As a result, defects otherwise possibly generated around the internal conductors can be eliminated with exactitude.
Abstract: An assembly structure is provided. The assembly structure includes a first substrate, a second substrate and a medium layer disposed between the first and second substrates. The medium layer includes a side edge, and the second substrate includes at least one lead wire. When the second substrate is disposed on the medium layer, the lead wire of the second substrate is relatively oblique to the side edge of the medium layer.
Abstract: An adhesive structure for use in a liquid crystal display (LCD) and a method for manufacturing the adhesive structure are provided. The adhesive structure includes a releasing paper which is provided with two anisotropic conductive films (ACFs) thereon. When the adhesive structure is attached onto the LCD, the two ACFs can be simultaneously attached onto the glass substrate of the LCD for connecting the integrated circuit and flexible printed circuit, respectively.
Abstract: Provided is an adhesion assisting agent fitted metal foil, comprising an adhesion assisting agent layer having a thickness of 0.1 to 10 ?m on a metal whose surface has a ten-point average roughness Rz of 2.0 ?m or less, wherein the adhesion assisting agent layer is formed from an adhesion assisting agent composition comprising: (A) an epoxy resin selected from the group consisting of a novolak epoxy resin and an aralkyl epoxy resin; and (C) an epoxy resin curing agent.
Abstract: A functional device fabrication apparatus is provided for forming a wiring pattern or an electronic device on a substrate using paper or paper-based material by depositing solid content of a solution on the substrate. The functional device fabrication apparatus includes a jet head. The jet head jets the solution including electronic function material onto the substrate as dot patterns. The jet head includes a device for dispensing a droplet of the solution from the jet head. A drive signal applied to the device is configured to cause the droplet jetted by the device to have a specific shape before impacting a face of the substrate.
Abstract: A circuit board includes: a plurality of wiring layers; an insulating layer which insulates the plurality of wiring layers, the insulating layer containing a fibrous filler and a resin; and a conductor part formed on a sidewall of a via piercing through the insulating layer. The fibrous filler protrudes from the sidewall and is covered with the conductor part, with a length greater than the thickness of the conductor layer.
Type:
Grant
Filed:
September 28, 2006
Date of Patent:
June 15, 2010
Assignee:
Sanyo Electric Co., Ltd.
Inventors:
Yasuhiro Kohara, Ryosuke Usui, Noriaki Kojima
Abstract: In the case of connecting a flexible substrate to a counterpart substrate by soldering, the area of a dead space on the counterpart substrate due to being covered with the flexible substrate is reduced to reduce the outside dimension of the counterpart substrate. Solder lands 61 and 62 on the flexible substrate 5 are soldered to solder lands 21 and 22 on the counterpart substrate 1. The flexible substrate 5 is divided into two branching pieces 71 and 72 by an incision 7 or a slit 8 formed in such a manner as to extend from an intermediate part in the arrangement direction R of circuit patterns to the leading end of the flexible substrate. The space between the solder lands 61 and 62 on the respective pieces 71 and 72 is made equal to the space between the two spaced-apart solder lands 21 and 22 on the counterpart substrate 1 by placing the pieces 71 and 72 formed by dividing the flexible substrate 5 on one another.
Abstract: A method for mounting a semiconductor package onto PCB is disclosed. A semiconductor package is provided, which comprises a plurality of outer terminals exposed out of an encapsulant. A PCB is provided and has a surface with a plurality of contact pads. Each contact pad has a first exposed side, an opposing exposed second side and a center between the exposed sides. A plurality of first pre-solders and a plurality of second pre-solders are formed on the surface by one single printing. The first pre-solders and the second pre-solders respectively cover the first and second exposed sides of the contact pads, spaces between the opposing first and second pre-solders expose the centers of the contact pads. Then the first and second pre-solders are reflowed and the semiconductor package is mounted on the PCB.
Type:
Grant
Filed:
December 26, 2007
Date of Patent:
June 1, 2010
Assignee:
Advanced Semiconductor Engineering, Inc.