Patents Examined by Colleen J O Toole
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Patent number: 11763855Abstract: Methods and apparatuses are provided for aligning read data in a stacked semiconductor device. An example apparatus includes a stacked semiconductor device comprising stacked first and second die. The stacked semiconductor device includes a first path having a first align (first die) and second align (second die) circuits for providing read data from the second die and a second path having a first replica align (first die) and second replica align (second die) circuits. During a timing align operation, a first control circuit sets the first align and replica align circuits to a first delay value based on a propagation delay of a clock signal through the second replica align circuit. After setting of the first delay value, a second control circuit sets the second align and replica align circuits to a second delay value based on a difference in propagation delays through the first and second replica align circuits.Type: GrantFiled: May 10, 2021Date of Patent: September 19, 2023Assignee: Micron Technology, Inc.Inventor: Seiji Narui
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Patent number: 11742850Abstract: According to one embodiment, a data transmission device includes a buffer circuit configured to set a voltage level of a data signal to high or low, a power supply line for supplying a power supply voltage to the buffer circuit, a buffer control circuit configured to control a switching operation of the buffer circuit, a current circuit configured to make a dummy current flow to the power supply line, and a current control circuit configured to control the dummy current based on one of the set voltage level and a transmission timing of the data signal.Type: GrantFiled: August 3, 2020Date of Patent: August 29, 2023Assignee: Kioxia CorporationInventor: Toshihiro Yagi
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Patent number: 11728737Abstract: An apparatus may include an electric power converter and pre-charge circuitry. The electric power converter may include a first circuit, a second circuit and an energy transfer device. The first circuit may be connected to a power supply. The second circuit may be connected to a load. The energy transfer device may have a first side connected to the first circuit and a second side connected to the second circuit. The pre-charge circuitry may be connected to a capacitor of the first circuit. The capacitor may be connected to the first side of the energy transfer device. The pre-charge circuitry may be configured to charge the capacitor during a pre-charge mode of the electric power converter. The electric power converter may be configured to exit the pre-charge mode and enter an energy transfer mode responsive to a charge level of the capacitor reaching a threshold pre-charge level.Type: GrantFiled: September 20, 2020Date of Patent: August 15, 2023Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Daniele Miatton, Kyrylo Cherniak, Hayri Verner Hasou, Erwin Huber, Sergio Morini, Volha Subotskaya
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Patent number: 11728730Abstract: A power converter is disclosed. The power converter includes a Single-Input-Multiple-Output (SIMO) device includes a first transistor connected to an input and a first end of an inductor, a second transistor connected to a second end of the inductor and a first output, and a third transistor connected to the second end of the inductor and a second output. The power converter also includes a controller connected to the SIMO device and is configured to maintain a minimum inductor current through the inductor between charging cycles and to cause the minimum inductor current to transition to a charging inductor current during a charging cycle. The charging inductor current is based on a difference between an output voltage signal and a target voltage signal.Type: GrantFiled: March 18, 2022Date of Patent: August 15, 2023Assignee: Maxim Integrated Products, Inc.Inventors: Cary Delano, Gaurav Mital
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Patent number: 11728647Abstract: Systems and methods are described for active harmonics cancellation. A wireless charging apparatus includes a wireless-power transfer circuit comprising a wireless-power transfer coil configured to generate or couple to a magnetic field to transfer or receive power and a plurality of tuning capacitors electrically coupled to the wireless-power transfer coil. The apparatus also includes a power converter circuit electrically coupled to the wireless-power transfer circuit. Additionally, the apparatus includes a signal generation circuit different from the power converter circuit and electrically coupled to one or more nodes between capacitors of the plurality of tuning capacitors. The signal generation circuit is configured to generate and inject a signal into the wireless-power transfer circuit at the nodes between the capacitors. The signal generation circuit includes a rejection filter tuned to an operating frequency of the wireless-power transfer coil.Type: GrantFiled: September 15, 2022Date of Patent: August 15, 2023Assignee: WiTricity CorporationInventors: Marcel Fischer, Mircea-Florian Vancu, Hans Peter Widmer, Prasanth Venugopal
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Patent number: 11716074Abstract: A high-speed comparator circuit is provided. The circuit includes an amplifier portion, a latch portion, and a negative capacitance portion. The amplifier portion includes an input coupled to receive an analog signal and an output. The latch portion is coupled to the amplifier portion. The latch portion is configured to provide at the output a digital value based on the analog signal. The negative capacitance portion is coupled to the output. The negative capacitance portion is configured to cancel parasitic capacitance coupled at the first output.Type: GrantFiled: June 28, 2019Date of Patent: August 1, 2023Assignee: NXP B.V.Inventors: Shagun Bajoria, Lucien Johannes Breems
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Patent number: 11705900Abstract: Circuitry for controlling current between a load and a power supply, the circuitry comprising: an output stage comprising: an input node configured to be coupled to the power supply; and an output node configured to be coupled to the load; and one or more control nodes for controlling a conduction path between the input node and the output node; and protection circuitry coupled to the one or more control nodes, the protection circuitry configured to break the conduction path between the input node and the output node when a load voltage at the output node exceeds a supply voltage at the input node, wherein the protection circuitry comprises: an active protection circuit configured to break the conduction path when the supply voltage exceeds an operational threshold of the active protection circuit; and a passive protection circuit configured to break the conduction path when the supply voltage is below an operation threshold of the active protection circuit.Type: GrantFiled: January 27, 2021Date of Patent: July 18, 2023Assignee: Cirrus Logic, Inc.Inventors: Andrew Buist, Mark McCloy-Stevens, Dave Smith, Gordon Russell, Huy Binh Le
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Patent number: 11705902Abstract: A supply voltage detecting circuit has a voltage detection circuit and a current clamping circuit. The voltage detection circuit receives and detects a supply voltage and is used to detect to generate a low-voltage detection signal. When the supply voltage is lower than a set level, the low voltage detection signal output by the voltage detection circuit turns off the current clamping circuit, and a transistor current flowing through the voltage detection circuit is proportional to the supply voltage; and when the supply voltage is higher than or equal to the set level, the low voltage detection signal output by the voltage detection circuit turns on the current clamping circuit, and the current clamping circuit provides a constant current to maintain the operation of the voltage detection circuit, wherein the transistor current flowing through the voltage detection circuit is proportional to the constant current.Type: GrantFiled: August 12, 2021Date of Patent: July 18, 2023Assignee: NUVOTON TECHNOLOGY CORPORATIONInventor: Ming-Hsin Huang
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Patent number: 11686746Abstract: A low power comparator and a self-regulated device for adjusting power saving level of an electronic device are provided. The low power comparator includes an input differential pair circuit, a self-regulated device, and a tail current switch. The input differential pair circuit is configured to receive input signals to be compared. The self-regulated device is coupled to the input differential pair circuit and includes a self-regulated circuit which has a first transistor with a first threshold voltage and a second transistor with a second threshold voltage and is configured to adjust a power saving level of the low-power comparator according to the first threshold voltage and the second threshold voltage. The tail current switch is coupled to the input differential pair circuit through the self-regulated circuit to provide a constant current to the input differential pair circuit.Type: GrantFiled: February 16, 2022Date of Patent: June 27, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Chow Peng, Chung-Peng Hsieh
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Patent number: 11683938Abstract: A magnetic field controlled transistor circuit includes a first electrode, a second electrode, and a channel including a magneto-resistive material. The channel is arranged between the first and second electrodes and electrically coupled to the first and second electrodes. The transistor circuit further includes a third electrode, a fourth electrode, and a control layer including an electrically conductive material. The control layer is arranged between the third and fourth electrodes and electrically coupled to the third and fourth electrodes. In addition, an insulating layer including an insulating material is provided. The insulating layer is arranged between the channel and the control layer and configured to electrically insulate the channel from the control layer. A related method for operating a transistor circuit and a corresponding design structure are also provided.Type: GrantFiled: December 30, 2020Date of Patent: June 20, 2023Assignee: International Business Machines CorporationInventors: Cezar Bogdan Zota, Bernd W. Gotsmann
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Patent number: 11652477Abstract: A voltage tracking circuit is provided and includes first and second P-type transistors and a voltage reducing circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The voltage reducing circuit is coupled between the first voltage terminal and the gate of the first P-type transistor. The voltage reducing circuit reduces a first voltage at the first voltage terminal by a modulation voltage to generate a control voltage and provides the control voltage to the gate of the first P-type transistor. The gate of the second P-type transistor is coupled to the first voltage terminal, and the drain thereof is coupled to a second voltage terminal. The source of the first P-type transistor and the source of the second P-type transistor are coupled to the output terminal of the voltage tracking circuit. The output voltage is generated at the output terminal.Type: GrantFiled: June 24, 2021Date of Patent: May 16, 2023Assignee: Vanguard International Semiconductor CorporationInventors: Shao-Chang Huang, Ching-Ho Li, Kai-Chieh Hsu, Chun-Chih Chen
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Patent number: 11640184Abstract: Aspects of the disclosure provide methods and apparatuses for generating an internal reset signal that is synchronous to a clock signal. In some embodiments, an apparatus includes a clock switch circuit and a plurality of serially coupled D flip-flops (DFFs). The clock switch circuit receiving the clock signal can output the clock signal in an on state and block the clock signal in an off state. The plurality of serially coupled DFFs are coupled to the clock switch circuit and driven by the clock signal. If an external reset signal is enabled, the plurality of serially coupled DFFs can enable the internal reset signal. If the external reset signal is disabled, after a predefined number of clock signal cycles, the plurality of serially coupled DFFs can disable the internal reset signal.Type: GrantFiled: July 1, 2020Date of Patent: May 2, 2023Assignee: MEDIATEK INC.Inventors: Chien-Wei Tseng, Mohammed Fathey Abdelfattah Hassan, Li-Shin Lai, Tzu-Yu Yeh, Ming-Da Tsai, Bernard Mark Tenbroek
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Patent number: 11641197Abstract: A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.Type: GrantFiled: April 28, 2021Date of Patent: May 2, 2023Assignee: Skyworks Solutions, Inc.Inventors: Péter Onódy, Tamás Marozsák, Michael R. May, Fernando Naim Lavalle Aviles, Patrick De Bakker
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Patent number: 11641204Abstract: Described herein are switches with asymmetrical anti-series varactor pairs to improve switching performance. The disclosed switches can include asymmetrical varactor pairs to reduce distortions. The asymmetry in the varactor pairs can be associated with geometry of each varactor in the pair. The disclosed switches can stack both symmetrical and asymmetrical varactor pairs. The disclosed switches with asymmetrical anti-series varactor pairs can be configured to improve both H2 and H3 simultaneously.Type: GrantFiled: December 31, 2021Date of Patent: May 2, 2023Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Yu Zhu, Oleksiy Klimashov, Paul T DiCarlo
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Patent number: 11614368Abstract: Methods and apparatus to provide an adaptive gate driver for switching devices are disclosed. An example apparatus includes an electrical switch to drive an electrical system; a condition characterizer to select a drive strength based on a first system parameter corresponding to the electrical system, the first system parameter including at least one of an input voltage corresponding to the electrical switch, an output current corresponding to the electrical switch, or a process variation of the electrical switch; and a driver to generate an output having a current corresponding to the selected drive strength.Type: GrantFiled: July 31, 2018Date of Patent: March 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Robert Allan Neidorff, Saurav Bandyopadhyay, Thomas Matthew LaBella
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Patent number: 11616495Abstract: Inter-integrated circuit input circuitry includes a pull-up current circuit and an input circuit. The input circuit includes an output inverter, an input inverter, and a pull-up circuit. The pull-up circuit is coupled to an input of the input inverter, and includes a pull-up transistor and a cascode transistor. The pull-up transistor is coupled to the input of the input inverter. The cascode transistor is coupled to the pull-up current circuit and the pull-up transistor, and configured to isolate the pull-up transistor from capacitance of a conductor coupled to the pull-up current circuit and the input circuit.Type: GrantFiled: February 26, 2021Date of Patent: March 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Mark Allan Shill
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Patent number: 11611338Abstract: Embodiments relate to circuit for reversing a threshold voltage shift of a transistor. The circuit includes a current mirror for sensing a transistor current and generating a mirrored current corresponding to the sensed transistor current, a gate biasing module for providing a gate bias to the transistor, and a calibration engine configured to receive the mirrored current from the current mirror and to control the gate biasing module in response to determining whether the mirrored current is outside of a predetermined range indicative of a shift in the threshold voltage of the transistor. The gate biasing module includes a gate biasing circuit configured to operate the transistor in a region where hot carrier injection (HCI) is present, and a gate switch for coupling the gate biasing circuit to a gate terminal of the transistor.Type: GrantFiled: August 11, 2021Date of Patent: March 21, 2023Assignee: Apple Inc.Inventors: Aly Ismail, Amr Haggag
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Patent number: 11601125Abstract: The present description concerns a method of controlling at least one switch (TH), including: the reception of signals (S3-i) having between one another at least one phase shift representative of a desired state of said at least one switch; the obtaining, from said signals, of a value (Si) representative of the desired state; and the application of the representative value to said at least one switch.Type: GrantFiled: June 8, 2021Date of Patent: March 7, 2023Assignee: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Dominique Bergogne, Thanh-Hai Phung
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Patent number: 11581889Abstract: Apparatuses and methods for temperature and process corner sensitive control of power gated domains are described. An example apparatus includes an internal circuit; a power supply line; and a power gating control circuit which responds, at least in part, to a first change from a first state to a second state of a control signal to initiate supplying a power supply voltage from the power supply line to the internal circuit, and continue supplying the power supply voltage from the power supply line to internal circuit for at least a timeout period from a second change from the second state to the first state of the control signal, in which the timeout period represent temperature dependency.Type: GrantFiled: April 29, 2019Date of Patent: February 14, 2023Assignee: Micron Technology, Inc.Inventor: Simon J. Lovett
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Patent number: 11581885Abstract: A pre-charge control circuit includes a control unit, a conversion unit, and a pre-charge switch. The control unit provides a control signal according to a PWM signal, and the conversion unit provides a control voltage according to the control signal. The pre-charge switch adjusts a magnitude of the current flowing through the input path of the electronic circuit according to the control voltage.Type: GrantFiled: September 3, 2020Date of Patent: February 14, 2023Assignee: DELTA ELECTRONICS, INC.Inventors: Li-Ching Yang, Wen-Lung Huang, Sheng-Hua Li