Abstract: A rapid shutdown device and a photovoltaic system are provided. The photovoltaic system includes an inverter and multiple serially-connected photovoltaic elements. The rapid shutdown device includes a switching circuit, a control circuit, a communication circuit and an auxiliary power circuit. The switching circuit includes a first switch and a second switch. A first terminal of the first switch is electrically connected with the positive terminal of a first photovoltaic element. A second terminal of the first switch is electrically connected with the negative terminal of a second photovoltaic element. A first terminal of the second switch is electrically connected with the negative terminal of the first photovoltaic element. The communication circuit receives a command signal from the inverter and transmits it to the control circuit. The control circuit controls the first switch and the second switch to turn on or turn off according to the command signal.

Abstract: A power module according to the present invention switches an operation mode between a control mode where an ON/OFF operation of a switching element having a first electrode, a second electrode, and a third electrode is controlled, and a deterioration determination mode where the deterioration is determined based on information including ?Vgs based on information including a threshold voltage detected before a stress current is supplied to the switching element and a threshold voltage detected after the stress current is supplied to the switching element. According to the power module of the present invention, the deterioration can be determined during an operation time and hence, breaking of the device can be prevented, and operation efficiency of the power module can be increased, and a manufacturing cost of the power module can be lowered.

Abstract: An integrated circuit includes: a first path suitable for transferring an input signal from a first point to a second point; a second path suitable for transferring the input signal from the second point to a third point; a first phase comparator suitable for comparing an edge of the input signal at the first point with an edge of the input signal at the second point; and a second phase comparator suitable for comparing an edge of the input signal at the second point with an edge of the input signal at the third point, wherein the first path includes a first delay circuit whose delay value is adjusted based on a comparison result of the first phase comparator, and the second path includes a second delay circuit whose delay value is adjusted based on a comparison result of the second phase comparator.

Abstract: Embodiments described herein provide foreign object detection based on coil current sensing. The transmitter power loss is computed directly based on the coil current, in conjunction with, or in place of the conventional computation based on transmitter input current. The enhanced precision of the computer power loss can be used to more accurately detect a foreign object near the transmitter coil during a wireless power transfer.

Abstract: Provided is a reference voltage circuit including a Zener diode having a cathode connected to a current source via a first node, and an anode connected to a ground point; a first resistor having one end connected to the first node; a second resistor having one end connected to another end of the first resistor; a first diode having an anode connected to another end of the second resistor via a second node, and a cathode connected to the ground point; and a current control circuit configured to generate a control current corresponding to an anode voltage of the first diode so that the current source supplies a reference current corresponding to the control current to the first diode.

Abstract: According to at least one aspect, a filter network is provided. The filter network comprises: an active filter comprising an amplifier (e.g., an operational amplifier), wherein the active filter is configured to add at least one member selected from the group consisting of a pole and a zero to a transfer function of the filter network; a passive filter coupled to the active filter and configured to add at least one pole to the transfer function of the filter network; and a non-inverting amplifier (e.g., a voltage buffer) having an input coupled to the passive filter and an output coupled to the active filter.

Abstract: A system for distributing DC bus voltage and control power to multiple motors includes a rectifier front end supplying a DC bus voltage and a DC control voltage. Both the DC bus voltage and the DC, control voltage are distributed via a common set of conductors. Diodes are operatively connected between the DC control voltage and the common set of conductors. The diodes allow forward conduction of the DC control voltage and distribution of control power to distributed devices when the DC bus voltage is not present. Once the DC bus voltage is present, the diodes block conduction of the DC control voltage. Each of the distributed devices are configured with an internal power supply that is operative to generate an internal control voltage from either the DC control voltage or the DC bus voltage.

Abstract: A switch comprising: a channel path comprising first and second MOS transistors with common source and gate terminals and drain terminals defining first and second terminals of the channel path; and control circuitry comprising: a third MOS transistor comprising: a gate coupled to the common source terminal; a source coupled to the common gate terminal by a resistor; and a drain coupled to a first reference terminal; a first current source coupled between the first reference terminal and the common gate terminal for providing a first current; a second current source coupled between the source terminal of the third MOS transistor and a second reference terminal for providing a second current greater than the first current; and a first switching arrangement configured to selectively enable and disable the first current source; and a second switching arrangement configured to selectively couple the common source terminal to the second reference terminal.

Abstract: A power converter is disclosed. The power converter includes a Single-Input-Multiple-Output (SIMO) device includes a first transistor connected to an input and a first end of an inductor, a second transistor connected to a second end of the inductor and a first output, and a third transistor connected to the second end of the inductor and a second output. The power converter also includes a controller connected to the SIMO device and is configured to maintain a minimum inductor current through the inductor between charging cycles and to cause the minimum inductor current to transition to a charging inductor current during a charging cycle. The charging inductor current is based on a difference between an output voltage signal and a target voltage signal.

Abstract: A driver circuit controls an output unit that switches whether or not to supply a current to an output line, in accordance with a potential difference between a first control signal to be input and a voltage of the output line. The driver circuit has a control line transmitting the first control signal to the output unit; a connection switching unit switching whether or not to connect the control line and the output line; a pre-stage control unit that is provided between a high potential line and a low potential line and selects and outputs a potential of any one of the high potential line and the low potential line in accordance with a second control signal; and a post-stage control unit causing the connection switching unit to connect the control line and the output line when the pre-stage control unit outputs a voltage higher than a predetermined threshold value.

Abstract: A RF switching arrangement (400) is described including a bias swap circuit (30). The bias swap circuit switches the bias voltage dependent on the state of the RF switch. This improves the performance of the RF switch without requiring charge pump circuitry.

Abstract: To make it possible to use a transistor with relatively low gate withstand voltage at an output stage in an apparatus including a differential amplifier. An apparatus is provided. The apparatus includes: a differential amplifier having a first current path and a second current path that form a differential pair; a first output-stage transistor that has: a first main terminal connected on a power-supply potential side; a second main terminal connected on a reference-potential side; and a control terminal connected to the second current path; and a first voltage-clamp circuit connected between the control terminal and second main terminal of the first output-stage transistor.

Abstract: Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.

Abstract: A power supply ECU is configured to carry out extreme value search control for searching for a frequency at which a detected value of power loss is minimized, by oscillating a frequency of output power from an inverter. Then, the power supply ECU determines whether or not extreme value search in extreme value search control is poorly proceeding, and when extreme value search is poorly proceeding, the power supply ECU increases an amplitude of frequency oscillation of output power from the inverter.

Abstract: A low power comparator and a self-regulated device for adjusting power saving level of an electronic device are provided. The low power comparator includes an input differential pair circuit, a self-regulated device, and a tail current switch. The input differential pair circuit is configured to receive input signals to be compared. The self-regulated device is coupled to the input differential pair circuit and includes a self-regulated circuit which has a first transistor with a first threshold voltage and a second transistor with a second threshold voltage and is configured to adjust a power saving level of the low-power comparator according to the first threshold voltage and the second threshold voltage. The tail current switch is coupled to the input differential pair circuit through the self-regulated circuit to provide a constant current to the input differential pair circuit.

Abstract: An example analog signal multiplexer includes two differential input signal ports for receiving a first and a second differential input signals, IN1 and IN2. The multiplexer further includes a differential output signal port with two output terminals OUT+ and OUT?, for outputting a signal based on one or more of the input signals IN1 and IN2. Furthermore, the multiplexer includes a pair of load elements, and an additional differential output signal port that has two output terminals TERM+ and TERM?. The load elements are not coupled directly to the output terminals OUT+ and OUT?, but, rather, are coupled to the output terminals of the additional output signal port, TERM+ and TERM?, enabling a modular approach where multiple instances of the multiplexer may be combined on an “as-needed” basis to realize multiplexing between a larger number of differential inputs that a single multiplexer would allow.

Abstract: The present application discloses a driving device for a power device, which includes a control circuitry configured to receive at least a system switching command and a feedback signal of a power device, and to generate a pull-up strength control signal or a pull-down strength control signal according to the received signals; and a pull-up array and/or a pull-down array, coupled between the control circuitry and the power device, and configured to provide a corresponding pull-up or pull-down strength for the power device according to the pull-up or pull-down strength control signal. The present application also discloses the corresponding electric appliance and power device driving method.

Abstract: In an embodiment, a circuit provided by the present invention includes a transistor connected to allow current to flow from a voltage supply to an output port. The circuit further includes a resistance ladder digital-to-analog converter (RDAC) configured to receive a digital input that indicates a voltage scaling factor. The RDAC is further configured to receive an input voltage (VB) at a voltage input port and produce an output voltage (VA). The circuit further includes an amplifier having an output port connected to a gate of the first transistor, an inverting input port receiving the output voltage (VA), and a non-inverting input connected to the output port of the first transistor.

Abstract: This application relates to a method and apparatus for outputting signals. In one aspect, the apparatus includes a signal control unit configured to generate two or more control signals upon two or more conditions, which respectively correspond to the two or more control signals being satisfied. The apparatus also includes a signal output unit configured to output a final output signal depending on the two or more control signals upon an input signal being inputted into the signal output unit.

Abstract: In a delay control circuit having a plurality of series-coupled delay stages, an input signal is routed through one of the series-coupled delay stages via a first delay element if a first delay control value is in a first state, the first delay element imposing a first signal propagation delay according to a first bias signal. If the delay control value is in a second state, the input signal is routed through the one of the series-coupled delay stages via a second delay element instead of the first delay element, the second delay element imposing a second signal propagation delay according to a second bias signal. The first and second bias signals are calibrated such that the second signal propagation delay exceeds the first propagation delay by a predetermined time interval that is substantially briefer than the first signal propagation delay.