Patents Examined by Daborah Chacko-Davis
  • Patent number: 10353293
    Abstract: The conductive pattern formation method according to the present invention comprises a step of providing a photosensitive conductive film including a conductive layer containing conductive fibers, a photosensitive resin layer containing a photosensitive resin and an inorganic filler, and a support film in this order, and laminating the conductive layer and the photosensitive resin layer on a base material such that the conductive layer side is closely bonded to the base material, and a step of exposing and developing the photosensitive resin layer and the conductive layer on the base material to form a conductive pattern.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: July 16, 2019
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Masahiko Ebihara, Emiko Oota, Yasuharu Murakami, Hiroshi Yamazaki, Hiroyuki Tanaka
  • Patent number: 10345705
    Abstract: Methods herein form a photoresist on an exterior of a cylinder and expose the photoresist to a light source while rotating the cylinder. Such methods develop the photoresist, after exposing, to change the photoresist into a patterned protective layer on the exterior of the cylinder. Then, these methods pattern the exterior of the cylinder while rotating the cylinder using the patterned protective layer to produce a patterned cylinder.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: July 9, 2019
    Assignee: Xerox Corporation
    Inventors: Karl E. Kurz, Amir Prizant, Christopher D. Blair
  • Patent number: 10349525
    Abstract: The present disclosure concerns an electrical circuit pattern on a substrate, as well as a method and system for forming same. In a typical embodiment, a light pattern is projected through a transparent layer to cause a patterned release of adhesion between a continuous material layer and the transparent layer. A release layer adhered to the patterned material layer is pulled off the substrate to separate the material having lower adhesion while leaving the material that was not exposed to form the electrical circuit pattern thereon.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: July 9, 2019
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Rob Jacob Hendriks, Edsger Constant Pieter Smits, Sandeep Menon Perinchery, Pim Groen
  • Patent number: 10331026
    Abstract: A photographic mask is provided in the present disclosure. The photographic mask includes a silicon-on-insulator (SOI) base and a stepped opening formed in the SOI base. The SOI base includes a silicon substrate, a median layer and a silicon layer, the median layer is arranged between the insulator substrate and the insulator layer. The stepped opening includes a first opening portion and a second opening portion, the first opening portion penetrates through the silicon layer and has a first opening area; the second opening portion at least penetrates through the silicon substrate and is aligned with the first opening portion. The second opening portion has a second opening area greater than the first opening area of the first opening portion. The present disclosure further provides a method for making a photographic mask.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: June 25, 2019
    Assignee: AAC ACOUSTIC TECHNOLOGIES (SHENZHEN) CO., LTD.
    Inventors: Linlin Wang, Ye Zhou, ChengYen Liu, Zhenkui Meng
  • Patent number: 10317801
    Abstract: In accordance with some embodiments of the disclosed subject matter, a method for forming a photolithographic pattern is provided. The method comprises: providing a substrate with a negative photoresist layer formed on the substrate; performing an exposure process on a portion of the negative photoresist layer to form an exposed region, wherein a remaining portion of the negative photoresist layer is an unexposed region; performing a first developing process using a water-based developing solution to remove an upper portion of the exposed region, and to reveal a top surface and a side wall of the unexposed region; and performing a second developing process using an organic developing solution after the first developing process to remove the unexposed region and form the photolithographic pattern.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: June 11, 2019
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Hui Wang
  • Patent number: 10317791
    Abstract: A photomask blank includes a substrate, a phase shifting layer disposed on the substrate, a first light blocking layer disposed on the phase shifting layer, a first resist layer disposed on the first light blocking layer, a second light blocking layer disposed on the first resist layer, and a second resist layer disposed on the second light blocking layer.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: June 11, 2019
    Assignee: SK hynix Inc.
    Inventor: Dong Sik Jang
  • Patent number: 10319735
    Abstract: Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Suk Koo Hong, Miyeong Kang, Hyosung Lee, Kyoungyong Cho, Bora Kim, Hyeji Kim, Sunkak Jo
  • Patent number: 10312074
    Abstract: A method of producing a layer structure includes forming a first organic layer by applying a first composition including an organic compound on a substrate having a plurality of patterns, applying a solvent on the first organic layer to remove a part of the first organic layer, and applying a second composition including an organic compound on a remaining part of the first organic layer and forming a second organic layer through a curing process.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 4, 2019
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Min-Soo Kim, Hyun-Ji Song, Sun-Hae Kang, Sung-Min Kim, Sung-Hwan Kim, Young-Min Kim, Yun-Jun Kim, Hea-Jung Kim, Youn-Hee Nam, Jae-Yeol Baek, Byeri Yoon, Yong-Woon Yoon, Chung-Heon Lee, Seulgi Jeong, Yeon-Hee Jo, Seung-Hee Hong, Sun-Min Hwang, Won-Jong Hwang, Songse Yi, MyeongKoo Kim, Naery Yu
  • Patent number: 10303316
    Abstract: [Object] To provide a method for manufacturing a touch sensor capable of concurrently forming routed circuit patterns on both surfaces of a base film and capable of aligning the routed circuit patterns on the top and bottom surfaces with each other with high accuracy. [Solution] A method for manufacturing a touch sensor includes forming electrode patterns on both surfaces of a base film through concurrent light exposure on both surfaces and development using photosensitive electrically conductive films each including a support film, an electrically conductive layer disposed on the support film and containing an electrically conductive fiber, and a second photosensitive resin layer disposed on the electrically conductive layer. Routed circuit patterns obtained by patterning the light-shielding metal layers are formed in advance on both surfaces of the base film.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: May 28, 2019
    Assignee: NISSHA CO., LTD.
    Inventors: Ryomei Omote, Takao Hashimoto, Takeshi Nishimura
  • Patent number: 10297403
    Abstract: A method for manufacturing a lighting button key is provided. The method includes forming a button body by processing a metal plate, attaching a thin film to the button body and performing double etching on a rear surface of the button body to process a symbol pattern. Additionally, the method includes press-forming the rear surface of the button body and an injection material of a transparent or translucent material into the rear surface of the button body to perform injection molding.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: May 21, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation, Daesung Electric Co., Ltd.
    Inventors: Young Ju Lee, Chang Hyeon Noh, Hye Kyung Kim, Dae Ig Jung, Keon Soo Jin, Hak Soo Kim, Won Jo Joo
  • Patent number: 10257926
    Abstract: A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: April 9, 2019
    Assignee: NITTO DENKO CORPORATION
    Inventors: Yuu Sugimoto, Yoshito Fujimura, Hiroyuki Tanabe
  • Patent number: 10248024
    Abstract: The invention relates to a method for making a micro- or nano-scale patterned layer of material by photolitography, comprising steps of: positioning a photomask between a light source and a layer of light sensitive material, said mask comprising a support and a layer of micro- or nano-light focusing elements fixed to the support, activating the light source so that the light source emits light radiations through the mask towards a surface of the layer of light sensitive material, developing the layer of light sensitive material so as to obtain the micro- or nano-scale patterned layer of material, wherein, during exposure of the layer of light sensitive material to light radiations, the photomask is positioned relative to the light sensitive layer so that the distance between the surface of the light sensitive layer and the layer of micro- or nano-light focusing elements is greater than a back focal length of the micro- or nano-light focusing elements.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: April 2, 2019
    Assignees: UNIV PARIS XIII PARIS-NORD VILLETANEUSE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)
    Inventors: Alexis Fischer, Getachew Ayenew, Azzedine Boudrioua, Jeanne Solard
  • Patent number: 10241394
    Abstract: In a pattern formation method according to an embodiment, a resist pattern is formed on a first film formed on a substrate. In the process for forming the resist pattern, the resist pattern includes a first pattern including a defect in a predetermined region on the first film. Next, a second film is accumulated on the first pattern in the predetermined region. Furthermore, a second pattern is formed in the first film with the resist pattern and the second film. Then, a third pattern is formed in the predetermined region on the first film.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 26, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Keiko Morishita, Shingo Kanamitsu, Hideaki Sakurai
  • Patent number: 10209613
    Abstract: An integrated extreme ultraviolet (EUV) blank production system includes: a vacuum chamber for placing a substrate in a vacuum; a first deposition system for depositing a planarization layer having a planarized top surface over the substrate; and a second deposition system for depositing a multi-layer stack on the planarization layer without removing the substrate from the vacuum. The EUV blank is in an EUV lithography system includes: an extreme ultraviolet light source; a mirror for directing light from the EUV source; a reticle stage for placing a EUV mask blank with a planarization layer; and a wafer stage for placing a wafer. The EUV blank includes: a substrate; a planarization layer to compensate for imperfections related to the surface of the substrate, the planarization layer having a flat top surface; and a multi-layer stack on the planarization layer.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: February 19, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Cara Beasley, Ralf Hofmann, Majeed Foad, Timothy Michaelson
  • Patent number: 10209544
    Abstract: The present invention discloses a flexible substrate and a manufacturing method thereof, and a display device, comprising: disposing a detachable layer on a rigid substrate, and fixing the flexible base on the rigid substrate by the detachable layer, wherein the detachable layer comprises a mesh layer and a plurality of mutually independent supporting parts disposed in meshes of the mesh layer; forming a functional layer on the flexible base to obtain a flexible substrate; separating the flexible substrate from the rigid substrate by applying an external force on the mesh layer. The present invention makes it easier for the flexible substrate to be stripped off after it is manufactured, improves the yield rate; moreover, the present invention has the process compatibility of ordinary production lines, and saves costs.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: February 19, 2019
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.
    Inventor: Junwei Wang
  • Patent number: 10204801
    Abstract: A process of forming, on a surface of the substrate a plurality of resist layers made of two kinds of dry film resist that differ in main peak wavelength in spectral photosensitivity. An exposure process of selectively exposing and affecting a particular resist layer in accordance with a first pattern upon using a first exposure mask overlaid on the plurality of resist layers. A second exposure process of exposing another resist layer in accordance with a second pattern upon using a second exposure mask overlaid on the plurality of resist layers. Partially uncovering the surface of the substrate by removing unexposed portions of the plurality of resist layers, to form a resist mask having an aperture. Finally, forming a coat layer by plating a portion of the substrate where the surface thereof is uncovered; and a process of removing the resist mask.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: February 12, 2019
    Assignee: OHKUCHI MATERIALS CO., LTD.
    Inventor: Shigeru Hosomomi
  • Patent number: 10186283
    Abstract: A method of forming a peg of a NFT, the peg having a tapered portion, the method including depositing a layer of dielectric material; forming a three dimensional shape from at least a portion of the dielectric material the three dimensional shape having two side surfaces and two end surfaces; and depositing plasmonic material on at least one side surface of the three dimensional shape of dielectric material, wherein the plasmonic material deposited on the at least one side surface forms the tapered portion of the peg.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: January 22, 2019
    Assignee: Seagate Technology LLC
    Inventors: Sridhar Dubbaka, YongJun Zhao, David Michael Grundman
  • Patent number: 10175579
    Abstract: A manufacturing method of a glass substrate is provided, in which a mask including a light-blocking area, a transparent area and a partial-transparent area is adopted. The partial-transparent area protrudes from edges of the light-blocking area to admit some of the UV rays to pass through. In addition, a glass substrate manufactured with the method is also disclosed. By arranging the partial-transparent area on the edges of the light-blocking area, the mask is formed with a slope having a small angle after a lithography process. As such, in an etching process, an edge of a thin film is formed with a slope having a small angle, which contributes to the formation of a second thin film. The thin films are prevented from being fragmented around the slope and the ITO layer is also prevented from fragmented around the periphery of the through hole.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: January 8, 2019
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Li Chai
  • Patent number: 10175526
    Abstract: A method of manufacturing a linear grid on a substrate to form a linear grid pattern of a display panel, the method including: laminating a negative photoresist layer having a linear grid pattern on a first area of a substrate, said substrate including a pattern forming layer disposed thereon; laminating a positive photoresist layer having a linear grid pattern on a second area of the substrate and overlapping at least a portion of the negative photoresist layer of the first area; covering the second area with a mask and exposing the first area; and forming a linear grid pattern by removing the mask and etching the pattern forming layer.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-hwan Kim
  • Patent number: 10175570
    Abstract: A reticle is provided. The reticle comprises a substrate having at least a first region and a second region; and an organic layer aligned in certain directions by an irradiation of a polarized UV light formed on a surface of the substrate. Wherein the organic layer in the first region has a first polarization direction; the organic layer in the second region has a second polarization direction; and the first polarization direction and the second polarization direction have a predetermined angle.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: January 8, 2019
    Assignees: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Xiaomin Liu, Long Zhang, Ting Zhou, Poping Shen