Abstract: A retinomorphic sensor is demonstrated employing organic semiconductors. The sensor produces an output voltage in response to changes in illumination, but zero output voltage under constant illumination. The device is stable for periods up to one hour, exhibits a decay constant tunable through choice of external resistor, with fastest response times below 10 ?s.

Abstract: Disclosed are a quantum dot light emitting device and a manufacturing method thereof as well as a display apparatus. The quantum dot light emitting device includes: a substrate; a pixel definition layer, wherein the pixel definition layer includes a plurality of pixel openings and pixel partition bodies, and a surface of each pixel partition body has a hydroxide radical; a quantum dot layer, located in the pixel openings; and a polymer structure sealing the quantum dot layer in the pixel openings, wherein the polymer structure is a of fully enclosed structure at least formed by polymerization of siloxane, thiol siloxane and the hydroxide radical, the siloxane, the hydroxide radical and the thiol siloxane are all polymerized, and a sulfur atom of a thiol in the thiol siloxane is combined with a coordinating atom of the quantum dot layer.

Abstract: The present application provides a method of manufacturing a semiconductor structure having vias with different dimensions and a manufacturing method of the semiconductor structure. The method includes: providing a first wafer including a first substrate, a first dielectric layer over the first substrate, and a first conductive pad surrounded by the first dielectric layer; providing a second wafer including a second dielectric layer, a second substrate over the second dielectric layer, and a second conductive pad surrounded by the second dielectric layer; forming a passivation over the second substrate; forming a first conductive via extending from the first conductive pad through the second wafer and the passivation, and having a first width surrounded by the second wafer; and forming a second conductive via extending from the second conductive pad through the passivation and the second substrate and partially through the second dielectric layer, and having a second width surrounded by the second wafer.

Abstract: A composite material, quantum dot light-emitting diode and preparation method thereof. The preparation method includes: providing ZnO nanoparticles and Au source, Au source is at least one of bulk Au or Au particles; mixing ZnO nanoparticles, Au source, S source with first organic solvent, performing hydrothermal reaction to prepare composite material. By performing hydrothermal reaction in organic solvent using ZnO nanoparticles, bulk Au and/or Au particles, and S source, S source can vulcanize surface of ZnO nanoparticles to form ZnS layer on surface of ZnO nanoparticles, Au source can be thermally dissolved and diffused into isolated distribution of atomic-level Au to realize loading on surface of ZnS layer, to obtain composite material with ZnO nanoparticles as core material, ZnS and Au as shell material. ZnS and Au in composite material can synergistically increase electron transmission efficiency of LED adopting same.

Abstract: A semiconductor package includes: a semiconductor structure including: a first bonding semiconductor chip; a second bonding semiconductor chip on the first bonding semiconductor chip, the second bonding semiconductor chip having a cross-section area in a horizontal direction less than a cross-section area of the first bonding semiconductor chip in the horizontal direction; a chip connection pad between the first bonding semiconductor chip and the second bonding semiconductor chip; and a wire bonding pad on the first bonding semiconductor chip to be outside of the second bonding semiconductor chip; a first stacked semiconductor chip on the semiconductor structure and including a first chip pad on an upper surface thereof; and a second stacked semiconductor chip on the first stacked semiconductor chip to expose the first chip pad and including a second chip pad on an upper surface thereof.

Abstract: An imaging device includes: a semiconductor substrate; a plurality of pixel electrodes located above the semiconductor substrate and each electrically connected to the semiconductor substrate; a counter electrode located above the plurality of pixel electrodes; a first photoelectric conversion layer located between the counter electrode and the plurality of pixel electrodes; and at least one first light-shielding body located in the first photoelectric conversion layer or above the first photoelectric conversion layer. The first photoelectric conversion layer contains semiconductor quantum dots that absorb light in a first wavelength range and a coating material that covers the semiconductor quantum dots, the coating material absorbing light in a second wavelength range, the coating material emitting fluorescence in a third wavelength range. The at least one first light-shielding body absorbs or reflects light with a wavelength in at least part of the second wavelength range.

Abstract: A sensor-embedded display panel includes a substrate, a light emitting element on the substrate and including a light emitting layer, and a light absorption sensor on the substrate and including a light absorbing layer arranged in parallel with the light emitting layer along an in-plane direction of the substrate. The light absorbing layer is configured to absorb light of a red wavelength spectrum, a green wavelength spectrum, a blue wavelength spectrum, or any combination thereof. The light emitting layer includes a first organic material and the light absorbing layer includes a second organic material. A difference between respective sublimation temperatures of the first and second organic materials is less than or equal to about 150° C., wherein each sublimation temperature is a temperature at which a weight reduction of 10% relative to the initial weight occurs during thermogravimetric analysis under an ambient pressure of about 10 Pa or less.

Abstract: A display device includes signal lines and pixels connected thereto. A first pixel includes a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode, a first source region, and a second drain region facing the first source region, with the first channel region interposed between the first source region and the second drain region. A third transistor includes a third gate electrode, a third channel region overlapping the third gate electrode, a third drain region connected to the first gate electrode, and a third source region facing the third drain region with the third channel region interposed between the third source region and the third drain region. A shielding part overlaps a boundary between the third source region and the third channel region and does not overlap a boundary between the third drain region and the third channel region.

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, the 3D IC comprises a first IC die comprising a first substrate, a first interconnect structure disposed over the first substrate, and a first through substrate via (TSV) disposed through the first substrate. The 3D IC further comprises a second IC die comprising a second substrate, a second interconnect structure disposed over the second substrate, and a second TSV disposed through the second substrate. The 3D IC further comprises a bonding structure arranged between back sides of the first IC die and the second IC die opposite to corresponding interconnect structures and bonding the first IC die and the second IC die. The bonding structure comprises conductive features disposed between and electrically connecting the first TSV and the second TSV.

Abstract: The disclosure concerns an electronic device provided with two high electron mobility transistors stacked on each other and having in common their source, drain, and gate electrodes. For example, each of these electrodes extends perpendicularly to the two transistors. For example, the source and drain electrodes electrically contact the conduction channels of each of the transistors so that said channels are electrically connected in parallel.

Abstract: A backend electrostatic discharge (ESD) diode device structure is presented comprising: a first structure comprising a first material, wherein the first material includes metal; a second structure adjacent to the first structure, wherein the second structure comprises a second material, wherein the second material includes a semiconductor or an oxide; and a third structure adjacent to the second structure, wherein the third structure comprises the first material, wherein the second structure is between the first and third structures.

Abstract: A semiconductor structure includes a substrate including a first surface; a dielectric layer disposed over the first surface of the substrate; a first conductive line surrounded by the dielectric layer and extended over the first surface of the substrate; a second conductive line disposed adjacent to the first conductive line, surrounded by the dielectric layer and extended parallel to the first conductive line; a conductive via disposed over the first conductive line and extended through the dielectric layer; and a cross section of the conductive via substantially parallel to the first surface of the substrate, wherein the cross section of the conductive via is at least partially protruded from the first conductive line towards the second conductive line. Further, a method of manufacturing the semiconductor structure is also disclosed.

Abstract: Provided is an imaging element that includes a photoelectric conversion section. The photoelectric conversion section includes a first electrode, a photoelectric conversion layer including an organic material, and a second electrode that are stacked, an inorganic oxide semiconductor material layer is formed between the first electrode and the photoelectric conversion layer, and when a composition of an inorganic oxide semiconductor material included in the inorganic oxide semiconductor material layer is represented by MaNbSncO (where M denotes an aluminum (Al) atom, and N denotes a gallium atom (Ga) or a zinc (Zn) atom, or a gallium (Ga) atom and a zinc (Zn) atom), a+b+c=1.00, 0.01?a?0.04, and b<c are satisfied.

Abstract: To provide a novel photoelectric conversion device that is highly convenient, useful, or reliable. The photoelectric conversion device includes a first electrode, a second electrode, and a first unit. The first unit is located between the first electrode and the second electrode. The first unit contains a first electron-donating material and a first electron-accepting material. The first electron-donating material is a condensed aromatic compound, and the first electron-accepting material has a perylene skeleton and two or more alkyl groups. The alkyl groups each independently have 1 to 13 carbon atoms.

Abstract: The enclosed disclosure relates to a method and apparatus for depositing functionalized nanoparticles within a semiconductor structure in order to create a nano-layer capable of enhancing imaging and contrast, The semiconductor structure can include any type of VNAND structure or 3D structure, The nanoparticles are formed in high-aspect ratio trenches of the structure and form a nano-layer. The functionalized nanoparticles comprise synthesized nanoparticles as well as organic molecules. The organic molecules are chosen to selectively bind to certain nanoparticles and surface materials.

Abstract: A photodetection device is configured to detect light and the photodetection device includes a substrate having a largest surface; a dielectric formed over the largest surface of the substrate; a first metallic electrode formed on the dielectric; a second metallic electrode formed on the dielectric, at a given distance from the first metallic electrode, to form a channel; and a single-crystal linear-chain polyfluorinated dibromo-platinum(II) diimine complex located in the channel.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A deep UV light emitting diode includes a substrate, an n-type semiconductor layer located on the substrate, a mesa disposed on the n-type semiconductor layer, and including an active layer and a p-type semiconductor layer, an n-ohmic contact layer in contact with the n-type semiconductor layer, a p-ohmic contact layer in contact with the p-type semiconductor layer, an n-bump electrically connected to the n-ohmic contact layer, and a p-bump electrically connected to the p-ohmic contact layer. The mesa includes a plurality of vias exposing a first conductivity type semiconductor layer.

Abstract: A method for manufacturing a semiconductor device including steps as follows is provided. A first nitride-based semiconductor layer is formed over a substrate. A second nitride-based semiconductor layer is formed on the first nitride-based semiconductor layer. A gate electrode is formed over the second nitride-based semiconductor layer. A first passivation layer is formed on the second nitride-based semiconductor layer to cover the gate electrode. A first blanket field plate is formed on the first passivation layer. The first blanket field plate is patterned to form a first field plate above the gate electrode using a wet etching process. A second passivation layer is formed on the first passivation layer to cover the first field plate. A second blanket field plate is formed on the second passivation layer. The second blanket field plate is patterned to form a second field plate above the first field plate using a dry etching process.

Abstract: A display substrate. In a plane parallel to the display substrate, the display substrate includes a plurality of sub-pixels, at least one sub-pixel includes a pixel driving circuit and a light emitting device connected to the pixel driving circuit, the pixel driving circuit at least includes a storage capacitor and a plurality of transistors, the plurality of transistors at least includes a driving transistor and at least one switching transistor of a dual-gate structure. In a plane perpendicular to the display substrate, the display substrate includes a plurality of conductive layers, the first polar plate and the gate electrode of the drive transistor are arranged in the same layer, the second polar plate and the first power line are arranged in the same layer.