Abstract: A display apparatus includes a device substrate with a display area and a bezel area, an upper planarization layer on the device substrate, an upper interlayer insulating layer between the device substrate and the upper planarization layer, a dam pattern, a light-emitting device, a pad portion on the bezel area, link wirings extending across the display area and the bezel area between the device substrate and the upper interlayer insulating layer, and a power voltage supply line on the upper interlayer insulating layer. The power voltage supply line may include a main wiring and an external connecting wiring. The main wiring may be spaced apart from the encapsulating dam. The external connecting wiring is electrically connected to the main wiring.

Abstract: A display panel and a manufacture method thereof are provided in embodiments of the present disclosure, and the display panel includes at least one photosensitive element each including a first electrode, a photosensitive semiconductor layer and a second electrode. The photosensitive semiconductor layer is disposed on the first electrode, and the second electrode is disposed on the photosensitive semiconductor layer. The photosensitive element further includes a connection insulation layer disposed between the second electrode and the photosensitive semiconductor layer. In the present application, leakage current in a dark state is lowered and an uniformity of different photosensitive elements is improved.

Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a gate structure on the barrier layer, a gate spacer on the gate structure, and a gate contact on the gate spacer. The gate contact includes a first portion and a second portion respectively at two sides of the gate spacer and directly contacting the gate structure.

Abstract: Discussed in an organic light emitting display apparatus, which can include a plurality of pixels on a substrate, each pixel including a plurality of subpixels, and each of the plurality of subpixels having an emission region, a planarization layer including a light extraction pattern, the light extraction pattern disposed at the emission region of each of the plurality of subpixels and including a plurality of concave portions; and a light emitting device layer on the light extraction pattern of each of the plurality of subpixels. The emission region of each of the plurality of subpixels includes a reference point disposed at a concave portion of the plurality of concave portions. The light extraction pattern of each of the plurality of subpixels has a rotation angle with respect to the reference point.

Abstract: A photodetector focal plane array (FPA) with enhanced detection capability and reduced thermal current is provided. The FPA includes light-concentrating dielectric structures in a form of arrays of elements with three-dimensional geometrical shapes. The elements have tapered sidewalls that taper inwardly toward a surface portion with a reduced width. A photodetector is joined to the portion with a reduced width. A metallic layer is disposed over the tapered sidewalls of the elements and the portion of the surface of the elements with a reduced width. The metallic layer provides mirror reflection properties to concentrate electromagnetic fields towards the detectors. The photodetector focal plane array may be used for infrared (IR) imaging applications in mid-wave IR (MWIR) and long-wave IR (LWIR) cameras as night vision and thermal imaging devices.

Abstract: Provided are a display panel and a display device. The display panel includes: a via hole penetrating through the display panel; a cutting residual area on the periphery of the via hole and includes a base substrate, and a packaging layer: and at least one annular relief structure between the packaging laver and the base substrate in the cutting residual area. The at least one annular relief structure is sequentially distributed around the via hole. At least one relief structure is provided with a surface facing away from the base substrate, and a side face connected to the surface, at least one of the surface and the side face is of a relief shape. The first relief structure is the relief structure with a smallest distance from the center of the via hole.

Abstract: A light-emitting device and a manufacturing method thereof, a display substrate and a display apparatus are provided in the embodiments of the present disclosure. The light-emitting device includes: a first electrode disposed on a base substrate; a quantum dot light-emitting layer disposed at a side of the first electrode away from the base substrate; and an electron transport layer disposed at a side of the quantum dot light-emitting layer close to or away from the first electrode, the electron transport layer including a first transport sub-layer and a second transport sub-layer which are arranged in layer configuration, a material of the first transport sub-layer and a material of the second transport sub-layer both including n-type metal oxides, and an oxygen content of the first transport sub-layer being less than an oxygen content of the second transport sub-layer.

Abstract: A semiconductor device includes a substrate, an interconnect, a memory cell, and a plurality of first barrier structures. The interconnect is disposed over the substrate. The memory cell is disposed in the interconnect within a memory region of the substrate, where the memory cell includes a transistor and a capacitor. The transistor includes a gate, source/drain elements respectively standing at two opposite sides of the gate, and a channel disposed between the source/drain elements and overlapped with the gate. The capacitor is disposed over the transistor and electrically coupled to one of the source/drain elements. The plurality of first barrier structures line sidewalls and bottom surfaces of the source/drain elements, and each include a first barrier layer and a second barrier layer disposed between the source/drain elements and the first barrier layer, where a first absorption interface is disposed between the first barrier layer and the second barrier layer.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A non-dispersive ligand-containing portion containing a monodentate ligand that is coordinated to a QD to render the QD non-dispersible in a solvent is formed in a part of a QD film containing the QD, and a portion of the QD film other than the non-dispersive ligand-containing portion is removed by a solvent to form a QD layer pattern.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: An array substrate and a display panel. The array substrate includes: a base layer including at least one base sub-layer each being a light-transmitting layer; a transistor layer on the base layer, the transistor layer including a plurality of transistors; and at least one light adjustment layer on a side of the transistor layer facing the base layer, the at least one light adjustment layer being configured to block, at least in a preset state, light from at least one side of the at least one light adjustment layer. In the array substrate, the amount of light irradiated on the transistor layer from the side of the base layer is reduced and the photo-induced leakage current in the transistors in the transistor layer is reduced, thus alleviating locally non-uniform brightness of a displayed image.

Abstract: A semiconductor device includes a substrate, an epitaxial layer, a well region, a current spreading layer, a source region, a base region and a gate layer. The epitaxial layer is on the substrate. The well region is in the epitaxial layer. The current spreading layer is in the epitaxial layer and below the well region. The current spreading layer includes a plurality of the first doped regions and a plurality of the second doped regions, the first doped regions includes a plurality of dopants of the first semiconductor-type, the second doped regions includes a plurality of dopants of the second semiconductor-type, and the second semiconductor-type is different from the first semiconductor-type. The source region is in the well region. The base region is in the well region and adjacent to the source region. The gate layer is over the epitaxial layer.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A method for manufacturing a display apparatus with high display quality is provided. The method is for manufacturing a display apparatus including first to third insulators, first and second conductors, and a first EL layer. The first conductor is formed over the first insulator, and the second insulator is formed over the first insulator and over the first conductor. Next, a first opening portion reaching the first conductor is formed in a region of the second insulator overlapping with the first conductor. A positive photoresist is applied to regions over the first and second insulators and over the first conductor, and a second opening portion with an inversely tapered structure reaching the first conductor and the second insulator is formed in a region of the photoresist overlapping with the first opening portion and the first conductor.

Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.

Abstract: A thin-film transistor including: a gate electrode; a gate insulating layer that is in contact with the gate electrode; a semiconductor layer insulated from the gate electrode by the gate insulating layer; and a source electrode and a drain electrode that are in contact with the semiconductor layer, wherein the semiconductor layer includes a perovskite compound represented by Formula 1: [A]2[B][X]6:Z??Formula 1 wherein, in Formula 1, A includes a monovalent organic-cation, a monovalent inorganic-cation, or a combination thereof, B includes Sn4+, X includes a monovalent anion, and Z includes a metal cation or a metalloid cation.

Abstract: A display substrates and display device are provided, belong to the field of display technology, and can solve the problem that the performance of the light-emitting layer of the optical sensor in the existing display substrate is unstable, and the light absorbing layer becomes insensitive to the light after a long time of use. The display substrate includes: a substrate, light-emitting devices on the substrate, and an optical sensor between at least a portion of adjacent ones of the plurality of light-emitting devices. The optical sensor includes: a P-type organic material layer and an N-type organic material layer stacked with each other, and a difference between an energy level of a highest occupied molecular orbital of the P-type organic material layer and an energy level of a lowest unoccupied molecular orbital of the N-type organic material layer is less than 2.0 eV or greater than 2.7 eV.