Abstract: A non-dispersive ligand-containing portion containing a monodentate ligand that is coordinated to a QD to render the QD non-dispersible in a solvent is formed in a part of a QD film containing the QD, and a portion of the QD film other than the non-dispersive ligand-containing portion is removed by a solvent to form a QD layer pattern.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: An array substrate and a display panel. The array substrate includes: a base layer including at least one base sub-layer each being a light-transmitting layer; a transistor layer on the base layer, the transistor layer including a plurality of transistors; and at least one light adjustment layer on a side of the transistor layer facing the base layer, the at least one light adjustment layer being configured to block, at least in a preset state, light from at least one side of the at least one light adjustment layer. In the array substrate, the amount of light irradiated on the transistor layer from the side of the base layer is reduced and the photo-induced leakage current in the transistors in the transistor layer is reduced, thus alleviating locally non-uniform brightness of a displayed image.

Abstract: A semiconductor device includes a substrate, an epitaxial layer, a well region, a current spreading layer, a source region, a base region and a gate layer. The epitaxial layer is on the substrate. The well region is in the epitaxial layer. The current spreading layer is in the epitaxial layer and below the well region. The current spreading layer includes a plurality of the first doped regions and a plurality of the second doped regions, the first doped regions includes a plurality of dopants of the first semiconductor-type, the second doped regions includes a plurality of dopants of the second semiconductor-type, and the second semiconductor-type is different from the first semiconductor-type. The source region is in the well region. The base region is in the well region and adjacent to the source region. The gate layer is over the epitaxial layer.

Abstract: A method for manufacturing a semiconductor device includes preparing a substrate of a first conductivity type having a drain region, forming a first source region and a second source region of the first conductivity type in the substrate separated from each other, and forming a gate trench of a gate region disposed closely next to or in adjoining neighbor to the first source region. The method may further include forming a first sidewall body region of a second conductivity type to separate the first source region from the second source region, forming a link region of the second conductivity type such that the link region and the gate trench are disposed spatially opposite to each other, forming a gate insulation layer to coat and line sidewalls and a bottom of the gate trench, and using a gate conductive material to fill the gate trench.

Abstract: A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.

Abstract: A method for manufacturing a display apparatus with high display quality is provided. The method is for manufacturing a display apparatus including first to third insulators, first and second conductors, and a first EL layer. The first conductor is formed over the first insulator, and the second insulator is formed over the first insulator and over the first conductor. Next, a first opening portion reaching the first conductor is formed in a region of the second insulator overlapping with the first conductor. A positive photoresist is applied to regions over the first and second insulators and over the first conductor, and a second opening portion with an inversely tapered structure reaching the first conductor and the second insulator is formed in a region of the photoresist overlapping with the first opening portion and the first conductor.

Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.

Abstract: A thin-film transistor including: a gate electrode; a gate insulating layer that is in contact with the gate electrode; a semiconductor layer insulated from the gate electrode by the gate insulating layer; and a source electrode and a drain electrode that are in contact with the semiconductor layer, wherein the semiconductor layer includes a perovskite compound represented by Formula 1: [A]2[B][X]6:Z??Formula 1 wherein, in Formula 1, A includes a monovalent organic-cation, a monovalent inorganic-cation, or a combination thereof, B includes Sn4+, X includes a monovalent anion, and Z includes a metal cation or a metalloid cation.

Abstract: A display substrates and display device are provided, belong to the field of display technology, and can solve the problem that the performance of the light-emitting layer of the optical sensor in the existing display substrate is unstable, and the light absorbing layer becomes insensitive to the light after a long time of use. The display substrate includes: a substrate, light-emitting devices on the substrate, and an optical sensor between at least a portion of adjacent ones of the plurality of light-emitting devices. The optical sensor includes: a P-type organic material layer and an N-type organic material layer stacked with each other, and a difference between an energy level of a highest occupied molecular orbital of the P-type organic material layer and an energy level of a lowest unoccupied molecular orbital of the N-type organic material layer is less than 2.0 eV or greater than 2.7 eV.

Abstract: A transparent display panel (10) and a display apparatus are provided, including: a substrate (100); a signal transmission layer (110), located on the substrate (100), where the signal transmission layer (110) has a plurality of hollowed-out areas (LB); and a first electrode layer (130), located on the substrate (1000), where the first electrode layer (130) has a plurality of first electrodes (130) arranged at intervals; where an orthogonal projection of at least one of the plurality of first electrodes (130) on the substrate (100) and an orthogonal projection of at least one of the plurality of hollowed-out areas (LB) on the substrate (100) have an overlapping area.

Abstract: A high voltage transistor may include a stepped dielectric layer between a field plate structure and a channel region of the high voltage transistor in a substrate. The stepped dielectric layer may increase the breakdown voltage of the high voltage transistor by reducing the electric field strength near the drain region of the high voltage transistor. In particular, a portion of the stepped dielectric layer near the drain region includes a thickness that is greater relative to a thickness of another portion of the stepped dielectric layer near the gate structure. The increased thickness near the drain region provides increased electric field suppression near the drain region (which operates at high voltages). In this way, the stepped dielectric layer enables the high voltage transistor described herein to achieve higher breakdown voltages without increasing the distance between the gate structure and the drain region of a high voltage transistor.

Abstract: A semiconductor device of an embodiment includes a SiC layer including a first face parallel to first direction and second direction perpendicular to the first direction, a trench extending in the first direction, a gate electrode, an n-type first SiC region, a p-type second SiC region between the first SiC region and the trench, extending in the second direction, an n-type third SiC region extending in the second direction, and alternately and repeatedly provided with the second SiC region in the first direction, a p-type fourth SiC region between the third SiC region and the first face, an n-type fifth SiC region between the fourth SiC region and the first face. The first face is inclined with respect to a (0001) face by 0.1 to 8 degrees in a <11-20> direction, and the first direction is along the <11-20> direction, and the second direction is along a <1-100> direction.

Abstract: Techniques are provided for suppressing the accumulation of holes in floating region and improving the switching time of a semiconductor device such as an Insulated Gate Bipolar. The semiconductor device includes a trench gate and a trench emitter formed in a semiconductor substrate, and a floating region of a first conductivity type formed in the semiconductor substrate sandwiched between the trench gate and the trench emitter. The bottom of the floating region is located below the bottom of the trench gate and the trench emitter, and the floating region has a crystal defect region including crystal defects selectively formed at a position near an upper surface of the semiconductor substrate in the floating region.

Abstract: An embodiment of the present disclosure provides a display substrate, which includes: a base; a plurality of pixel units; each of the pixel units includes a pixel driving circuit located on the base, and each of the pixel unit further includes a plurality of light-emitting elements located on a side, away from the base, of the pixel driving circuit and connected with the pixel driving circuit, where at least two of the light-emitting elements in each of the pixel units are sequentially stacked in a direction away from the base. Embodiments of the present disclosure further provide a method for manufacturing a display substrate, a method for driving a display substrate, a display panel and a display device.

Abstract: A display apparatus with a high aperture ratio can be provided. A display apparatus with a personal authentication function can be provided. A display apparatus having high display quality can be provided. A highly reliable display apparatus can be provided. A display apparatus that can have a higher resolution can be provided. A display apparatus with low power consumption can be provided. An imaging device includes a pixel electrode, a first layer over the pixel electrode, an insulating layer covering part of the top surface of the first layer, and a common electrode covering the first layer and the insulating layer, and the first layer includes a photoelectric conversion layer.

Abstract: A method for manufacturing a SONOS memory discloses forming first a thin oxide layer as a sidewall protection layer and a blocking layer. This layer prevents the high dielectric-constant layer at the bottom of the stacked gate structure from being exposed on the surface. An lightly doped drain (LDD) implantation area is defined by a lateral thickness of a thin oxide layer, so that the channel width may be controlled by controlling the thickness of the thin oxide layer. Thus, the width of a current channel at the bottom of a gate is reduced under the same ion implantation condition into the active area, thereby improving a current capacity of the SONOS memory without adding any mask or photolithography step, and thus bring no additional patterning costs or active area ion implantation costs.

Abstract: Disclosed is a TFET with an OR-AND logic function. By arranging a horizontal channel and a vertical channel in different directions, three gates are not connected and will not be affected by each other, and can control the current of a whole channel jointly; when a first gate and a second gate are both at a high level, the TFET will be turned on, and when the first gate and a third gate are both at a high level, the TFET will also be turned on; the horizontal channel not only isolates the second gate from the third gate, but also reduces the strength of coupling between the second gate and the third gate, so only a small current passes through the horizontal channel when the second gate and the third gate are both at a high level, and the TFET will not be turned on at this moment.

Abstract: Provided is an organic photodiode device including at least one photodiode including a first organic layer between a first electrode and a second electrode, a bank covering an edge of the first electrode, and a rib surrounding the first organic layer. The second electrode covers the rib. The organic photodiode device further includes a common electrode connected to the second electrode, and the rib may be located between the common electrode and the first organic layer. The first organic layer may include a polymer compound. The at least one photodiode includes a plurality of photodiodes, and the first organic layer may be shared by the plurality of photodiodes.

Abstract: A quantum dot light-emitting device, a display apparatus, and a manufacturing method are provided. The quantum dot light-emitting device includes a base substrate and a plurality of sub-pixels having different light-emitting colors located on one side of the base substrate. Each sub-pixel includes a first electrode; a quantum dot light-emitting portion, the quantum dot light-emitting portion being located on the side of the first electrode facing away from the base substrate; an electrical response portion, the electrical response portion being located between the first electrode and the quantum dot light-emitting portion and having a conjugated polymer or a reaction product of the conjugated polymer; and a second electrode, the second electrode being located on the side of the quantum dot light-emitting portion facing away from the electrical response portion.