Patents Examined by Daniel P Shook
  • Patent number: 12035590
    Abstract: Disclosed is a light emitting display panel in which a portion overlapped with data lines is patterned in a cathode electrode, and a light emitting display apparatus using the same. The light emitting display panel comprises a substrate, a first signal line along a first direction of the substrate, a first insulating film covering the first signal line, a second insulating film covering the first insulating film, an anode electrode patterned by each pixel, a bank covering ends of the anode electrode, a first light emitting layer on the anode electrode disposed at a first side of the bank, a second light emitting layer on the anode electrode disposed at a second side of the bank, a first cathode electrode on the first light emitting layer, and a second cathode electrode on the second light emitting layer, wherein the first and second cathode electrodes are separated from each other on the upper surface of the bank.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: July 9, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Howon Choi, Dohong Kim, Chanil Park
  • Patent number: 12035587
    Abstract: A display panel and a display device are provided. The display panel includes: a display part including a plurality of data lines; a fan-out part including a plurality of fan-out lines; and a lead wire part including a plurality of first lead wires which are respectively connected with the plurality of data lines through the plurality of fan-out lines, and the plurality of fan-out lines are fanned out between the lead wire part and the display part. The plurality of first lead wires each include a first lead wire subpart and a compensation part to form a plurality of first lead wire subparts and a plurality of compensation parts, the plurality of first lead wire subparts are respectively connected with the plurality of compensation parts; the first lead subparts (WS1) have a width different from that of the compensation parts.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: July 9, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaofeng Jiang, Linhong Han, Huijuan Yang, Huijun Li, Xin Zhang, Meng Zhang, Lulu Yang, Jie Dai, Lu Bai, Siyu Wang, Yu Wang, Yupeng He, Yi Qu
  • Patent number: 12029106
    Abstract: An object of the present invention is to provide a n-type semiconductor element having improved n-type semiconductor characteristics and excellent stability, where the n-type semiconductor element includes a second insulating layer, where the second insulating layer contains: A. (a) a compound having one carbon-carbon double bond or one conjugated system bound to at least one group represented by general formula (1) and at least one group represented by general formula (2); and (b) a polymer; or B. a polymer having, in its molecular structure, the remaining group after removing some hydrogen atoms from R1, R2, R3, or R4 in the compound (a), or the remaining group after removing some hydrogen atoms from the carbon-carbon double bond or the conjugated system in the compound (a).
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: July 2, 2024
    Assignee: Toray Industries, Inc.
    Inventors: Kazuki Isogai, Yasuhiro Kobayashi, Seiichiro Murase
  • Patent number: 12029107
    Abstract: An object of the present invention is to provide a n-type semiconductor element having improved n-type semiconductor characteristics and excellent stability with a convenient process, where the n-type semiconductor element includes: a substrate; a source electrode, a drain electrode, and a gate electrode; a semiconductor layer in contact with the source electrode and the drain electrode; a gate insulating layer for insulating the semiconductor layer from the gate electrode; and a second insulating layer positioned on the opposite side of the semiconductor layer from the gate insulating layer and in contact with the semiconductor layer, where the semiconductor layer contains nanocarbon, and the second insulating layer contains (a) a compound with an ionization potential in vacuum of 7.0 eV or less, and (b) a polymer.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: July 2, 2024
    Assignee: Toray Industries, Inc.
    Inventors: Yasuhiro Kobayashi, Kazuki Isogai, Seiichiro Murase
  • Patent number: 12016212
    Abstract: A display device includes signal lines and pixels connected thereto. A first pixel includes a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode, a first source region, and a second drain region facing the first source region, with the first channel region interposed between the first source region and the second drain region. A third transistor includes a third gate electrode, a third channel region overlapping the third gate electrode, a third drain region connected to the first gate electrode, and a third source region facing the third drain region with the third channel region interposed between the third source region and the third drain region. A shielding part overlaps a boundary between the third source region and the third channel region and does not overlap a boundary between the third drain region and the third channel region.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: June 18, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jun Won Choi, Dong Soo Kim, Hyun-Chol Bang, Chang Soo Pyon, Ji-Eun Lee
  • Patent number: 12016204
    Abstract: A display panel, a manufacturing method thereof and a display apparatus are provided. In some embodiments, the display panel includes a substrate, pixel structures in an array, a protruding ring, an encapsulation layer, and solid sealant. The substrate includes a predetermined hole region, first adjacent region surrounding the hole region, second adjacent region surrounding the first adjacent region, and a display region surrounding the second adjacent region and in which the pixel structures are located. The protruding ring is located in the second adjacent region. The encapsulation layer covers the pixel structures and sides of the protruding ring away from the substrate. The protruding ring and the encapsulation layer covering the protruding ring form a dam. The solid sealant fills the first adjacent region and the hole region enclosed by the dam and is provided with an opening configured to release stress generated by the solid sealant during full curing.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: June 18, 2024
    Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Zerui Zhang, Jenyu Lee, Haoyuan Fan, Zifeng Wang, Qicheng Chen
  • Patent number: 12004365
    Abstract: An display device may include a substrate including an active area and an inactive area surrounding the active area, a plurality of thin film transistors disposed in the active area, each of the thin film transistor including a semiconductor layer and a first electrode, a light emitting elements disposed in the active area, each of the light emitting element including an anode electrode and an organic light emitting layer, a connection area and a peripheral area disposed in the inactive area, and a first reflective electrode disposed in the connection area.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: June 4, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Hong-Gyu Han, Byung-Jun Lim, Hwa-Jun Jung
  • Patent number: 12002905
    Abstract: A light emitting device, a display device comprising same, and a method for manufacturing a display device are provided. The light emitting device comprises: a first conductivity type semiconductor doped to have a first polarity, an active layer on the first conductivity type semiconductor, a second conductivity type semiconductor on the active layer and doped to have a second polarity different from the first polarity and an insulating material layer surrounding side surfaces of the first conductivity type semiconductor, the second conductivity type semiconductor, and the active layer, wherein the insulating material layer includes an insulating material film and an element orienter bonded to an outer peripheral surface of the insulating material film.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: June 4, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae Hoon Jung, Sung Chan Jo
  • Patent number: 11996487
    Abstract: In an example, the present invention provides a method of manufacturing a solar module. The method includes providing a substrate member having a surface region, the surface region comprising a spatial region, a first end strip comprising a first edge region and a first interior region, the first interior region comprising a first bus bar, a plurality of strips, a second end strip comprising a second edge region and a second interior region, the second edge region comprising a second bus bar, the first end strip, the plurality of strips, and the second end strip arranged in parallel to each other and occupying the spatial region such that the first end strip, the second end strip, and the plurality of strips consists of a total number of five (5) strips. The method includes separating each of the plurality of strips, arranging the plurality of strips in a string configuration, and using the string in the solar module.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: May 28, 2024
    Assignee: Maxeon Solar Pte. Ltd
    Inventor: Kevin R. Gibson
  • Patent number: 11980092
    Abstract: It is an object of the present invention to provide an organic EL element including a capping layer constituted by two layers consisting of a first capping layer and a second capping layer that has a refractive index that is higher than that of the first capping layer, in order to improve the light extraction efficiency compared with an organic EL element including a capping layer constituted by a single layer. The present invention provides an organic electroluminescent element at least including an anode, a hole transport layer, a light emitting layer, an electron transport layer, a cathode, and a capping layer arranged in this order, wherein the capping layer has a structure constituted by two layers consisting of a first capping layer and a second capping layer, a refractive index of the second capping layer is higher than a refractive index of the first capping layer throughout a wavelength range from 450 to 650 nm, and the second capping layer contains an arylamine compound having a specific structure.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 7, 2024
    Assignees: HODOGAYA CHEMICAL CO., LTD., SFC CO., LTD.
    Inventors: Yuta Hirayama, Shunji Mochizuki, Takeshi Yamamoto, Shuichi Hayashi, Young-hwan Park
  • Patent number: 11968846
    Abstract: A photoelectric conversion element according to an embodiment of the present disclosure include a first electrode, a second electrode opposed to the first electrode, and an organic photoelectric conversion layer provided between the first electrode and the second electrode and formed using a plurality of materials having average particle diameters different from each other, the plurality of materials including at least fullerene or a derivative thereof, and a particle diameter ratio, of a first material having a smallest average particle diameter among the plurality of materials with respect to a second material having a largest average particle diameter among the plurality of materials, is 0.6 or less.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: April 23, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Shingo Takahashi
  • Patent number: 11965124
    Abstract: The present application discloses a QLED manufacturing method, which includes following steps of: providing a substrate provided with a bottom electrode, and preparing a quantum dot light emitting layer on the substrate; illuminating after depositing a first compound solution on a surface of the quantum dot light emitting layer, here a first compound is a compound capable of being photodegraded into ions after the illumination.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: April 23, 2024
    Assignee: TCL TECHNOLOGY GROUP CORPORATION
    Inventors: Jie Zhang, Chaoyu Xiang
  • Patent number: 11957027
    Abstract: A display panel and a display device are provided. The display panel includes a photosensitive array layer including a plurality of photosensitive units arranged in an array, a light-emitting function layer, and a color resist layer. The light-emitting function layer is disposed between the color resist layer and the photosensitive array layer. The color resist layer includes a first light-shielding layer and a plurality of first color resist units. The first light-shielding layer contains a plurality of first openings and a plurality of second openings. A first opening of the plurality of first openings corresponds to a photosensitive unit of the plurality of photosensitive units, and a first color resist unit of the plurality of first color resist units at least covers a second opening of the plurality of second openings. At least one of the plurality of second openings is connected with the first opening.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventor: Yaodong Wu
  • Patent number: 11957033
    Abstract: Provided are a display panel, a manufacturing method thereof, and a display device. The display panel includes an alignment mark region arranged within a flat region of a peripheral region of the display panel. The peripheral region is a region of the display panel other than an active area of the display panel. An alignment mark pattern is arranged within the alignment mark region, and/or at least one film layer within the alignment mark region is hollowed out.
    Type: Grant
    Filed: May 9, 2020
    Date of Patent: April 9, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huijuan Yang, Tingliang Liu, Tinghua Shang, Yang Zhou, Pengfei Yu, Yi Zhang, Junxi Wang
  • Patent number: 11955177
    Abstract: A three-dimensional flash memory including an intermediate wiring layer and a method of manufacturing the same are disclosed.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yun Heub Song
  • Patent number: 11955578
    Abstract: Provided are an optoelectronic apparatus including an on-chip optoelectronic diode capable of receiving and emitting light, and a method of manufacturing the same.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: April 9, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Jong Won Chung, Sukho Choi, Sung Heo, Sung Kim, YongChul Kim
  • Patent number: 11943947
    Abstract: A light-emitting device includes: an anode; a cathode; a light-emitting layer between the anode and the cathode; and a hole transport layer between the anode and the light-emitting layer, the hole transport layer containing carbon and a metal oxide in a prescribed, adjusted ratio.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: March 26, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinichi Handa, Noboru Iwata
  • Patent number: 11942573
    Abstract: A deep UV light emitting diode includes a substrate, an n-type semiconductor layer located on the substrate, a mesa disposed on the n-type semiconductor layer, and including an active layer and a p-type semiconductor layer, an n-ohmic contact layer in contact with the n-type semiconductor layer, a p-ohmic contact layer in contact with the p-type semiconductor layer, an n-bump electrically connected to the n-ohmic contact layer, and a p-bump electrically connected to the p-ohmic contact layer. The mesa includes a plurality of vias exposing a first conductivity type semiconductor layer.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 26, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Tae Gyun Kim, Kyu Ho Lee
  • Patent number: 11935605
    Abstract: The present application discloses a method for preparing a semiconductor device including an electronic fuse control circuit. The method includes providing a chip including an electronic fuse control circuit, wherein the electronic fuse control circuit includes a program voltage pad, a fuse element, a latch, a plurality of resistor selection pads, and a plurality of bonding option units. The method further includes providing a substrate including a first voltage bonding pad and a plurality of second voltage bonding pads, disposing the chip on the substrate, bonding the first voltage bonding pad to the program voltage pad, and bonding at least one of the plurality of second voltage bonding pads to at least one of the plurality of resistor selection pads.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: March 19, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Patent number: 11935988
    Abstract: A display device includes a plurality of pixels, each of the plurality of pixels including an emission area, a first electrode and a second electrode that are disposed in the emission area to be spaced apart from each other, and a plurality of light emitting elements that are electrically connected between the first and second electrodes, and a bank disposed between the emission area of each of the plurality of pixels to enclose the emission area. The first electrode includes a first electrode part disposed in the emission area to be adjacent to a first side of the second electrode, a second electrode part disposed in the emission area to be adjacent to a second side of the second electrode, and a third electrode part electrically connecting the first and second electrode parts and disposed in the emission area to be adjacent to a third side of the second electrode.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Sin Chul Kang