Abstract: The present invention relates to a novel anthracene derivative, for an organic light-emitting device, and an organic light-emitting device comprising same, the anthracene derivative enabling excellent device characteristics when used as a light-emitting material.

Abstract: The invention relates to a method comprising providing a substrate with a channel layer, forming a gate stack structure on the channel layer and forming a raised source and a raised drain on the channel layer. The method further comprises depositing in a non-conformal way an oxide layer above the gate stack structure, the raised source and the raised drain. A first void above the raised source and a second void above the raised drain gate are created adjacent to vertical edges of the gate stack structure. The method further comprises etching the oxide layer for a predefined etching time, thereby removing the oxide layer above the raised source and the raised drain, while keeping it at least partly on the channel layer. Contacts are formed to the raised source and the raised drain. The invention also concerns a corresponding computer program product.

Abstract: Representative implementations of devices and techniques provide reinforcement for a carrier or a package. A reinforcement layer is added to a surface of the carrier, often a bottom surface of the carrier that is generally under-utilized except for placement of terminal connections. The reinforcement layer adds structural support to the carrier or package, which can be very thin otherwise. In various embodiments, the addition of the reinforcement layer to the carrier or package reduces warpage of the carrier or package.

Abstract: Provided is a composition comprising a compound selected from Structure 1, as described herein:

Abstract: An organic light emitting diode (OLED) display, including a flexible substrate bent in a first direction, an OLED arranged on the flexible substrate, a first thin film transistor connected to the OLED and including a first channel area extending in a second direction crossing the first direction, and one or more additional thin film transistors connected to the first thin film transistor and including corresponding additional channel areas extending in the second direction.

Abstract: Methods for forming a NW with multiple devices having alternate channel materials and resulting devices are disclosed. Embodiments include forming a first stack of semiconductor layers including a first doped Si layer, a first channel layer, and a second doped Si layer, respectively, on a Si substrate; forming a second stack including a first doped SiGe layer, a second channel layer, and a second doped SiGe layer, respectively, on the first stack; forming a vertical nanowire structure by directional etching, along a three-dimensional plane, the second and first stacks, respectively, down to an upper surface of the Si substrate; forming lower S/D regions and a lower gate-stack surrounding the first stack; forming upper S/D regions and an upper gate-stack surrounding the second stack; and forming contacts to the lower S/D regions, a first gate electrode, an upper S/D region, an upper gate electrode, and the second doped SiGe layer.

Abstract: A method for forming fins on a semiconductor device includes etching trenches into a monocrystalline substrate to form first fins and forming a first dielectric layer at bottoms of the trenches. Second fins of a material having a different composition than the substrate are grown on sidewalls of the trenches. A second dielectric layer is formed over the second fins. The first fins are removed by etching. The second fins are processed to form fin field effect transistor devices.

Abstract: A method for manufacturing a bipolar junction transistor is provided. A layer stack is provided that comprises a semiconductor substrate having a trench isolation; an isolation layer arranged on the semiconductor substrate, wherein the first isolation layer comprises a recess forming an emitter window; lateral spacers arranged on sidewalls of the emitter window; a base layer arranged in the emitter window on the semiconductor substrate; and an emitter layer arranged on the isolation layer, the lateral spacers and the base layer. A sacrificial layer is provided on the emitter layer thereby overfilling a recess formed by the emitter layer due to the emitter window. The sacrificial layer is selectively removed up to the emitter layer while maintaining a part of the sacrificial layer filling the recess of the emitter layer. The emitter layer is selectively removed up to the isolation layer while maintaining the filled recess of the emitter layer.

Abstract: A method for forming fins on a semiconductor device includes etching trenches into a monocrystalline substrate to form first fins and forming a first dielectric layer at bottoms of the trenches. Second fins of a material having a different composition than the substrate are grown on sidewalls of the trenches. A second dielectric layer is formed over the second fins. The first fins are removed by etching. The second fins are processed to form fin field effect transistor devices.

Abstract: A scalable fuse design for individual pixels of a focal plane array of photodiodes comprises a fuse disposed on the upper surface of each photodiode in the array, wherein the fuse is situated proximal to a side of each photodiode. The fuse of each photodiode is electrically coupled to the active region thereof via a first bus and is electrically coupled to an ROIC via a second bus.

Abstract: A flexible display panel and a flexible display apparatus are provided. The flexible display panel comprises a flexible substrate, an organic light-emitting layer disposed on a side of the flexible substrate and having a first side facing the flexible substrate and an opposing side, and a thin-film-encapsulation layer disposed on the opposing side of the organic light-emitting layer and including at least one organic encapsulation layer and at least one inorganic encapsulation layer. The flexible display panel includes at least one bending area. The at least one organic encapsulation layer has a first side facing the flexible substrate and an opposing side. In the at least one bending area, at least one groove is formed on the opposing side of the at least one organic encapsulation layer. A bottom width W of the at least one groove is configured to be W ? n 180 ? ° ? ? ? ? R .

Abstract: A method of manufacturing a semiconductor package includes forming a preliminary package, on a supporting substrate, which includes a connection substrate, a semiconductor chip and a molding pattern on the connection substrate and the semiconductor chip, forming a buffer pattern on the molding pattern, and forming a carrier substrate, on the buffer pattern, which includes a first portion contacting the buffer pattern and a second portion contacting the molding pattern.

Abstract: The invention relates to a method for forming a field effect transistor. The method comprises providing a substrate with a channel layer, forming a gate stack structure on the channel layer, forming first sidewall spacers, forming a raised source and a raised drain on the channel layer and forming second sidewall spacers above the raised source and the raised drain. The method further includes depositing in a an insulating dielectric layer above the gate stack structure, the first sidewall spacers and the second sidewall spacers, planarization of the insulating dielectric layer and selectively etching the second sidewall spacers. Thereby contact cavities are created on the raised source and the raised drain. The method further includes forming a source contact and a drain contact by filling the contact cavities. The invention also concerns a corresponding computer program product.

Abstract: The invention relates to a semiconductor component (1) comprising: a plurality of semiconductor chips (2), each having a semiconductor layer sequence (200) with an active region (20) for generating radiation; a radiation output side (10) that runs parallel to the active regions (20); a mounting side surface (11) which is provided for securing the semiconductor component, and which runs in a transverse or perpendicular direction to the radiation output side; a molded body (4) which is shaped in places on the semiconductor chips, and which at least partially forms the mounting side surface; and a contact structure (50) which is arranged on the molded body, and which connects at least two semiconductor chips of the plurality of semiconductor chips in an electrically conductive manner. The invention also relates to a lighting device (9) and to a method for producing a semiconductor component.

Abstract: An electronic device includes a light source, a light receiver, a first light guide structure, and a second light guide structure. The first light guide structure faces a light emitting surface of the light source and faces a lateral wall of the light receiver. The second light guide structure is disposed over the light receiver and coupled to the first light guide structure. The light receiver and the second light guide structure defines a cavity between the light receiver and the second light guide structure.

Abstract: Semiconductor device interconnect structures having low capacitance and associated systems and methods are disclosed herein. In one embodiment, a method of manufacturing an interconnect structure includes forming an opening in a surface of a semiconductor device and forming an interconnect structure at least within the opening. Forming the interconnect structure includes depositing a first insulator material on both the surface and a sidewall of the opening, selectively removing a first portion of the first insulator material on the surface over a second portion of the first insulator material on the sidewall, depositing a second insulator material on the second portion, and depositing a conductive material on the second insulator material. The method further includes selecting the thickness of the first and second insulators materials based on a threshold level of capacitance between the sidewall and the conductive material.

Abstract: An upper portion of a field electrode trench and a gate trench are simultaneously formed in the main surface of a substrate to approximately the same depth. A first protective layer is formed that completely fills the gate trench and lines the upper field electrode trench. The first protective layer is removed from the bottom of the upper trench and semiconductor material is removed thereby forming a lower portion of the field electrode trench while the gate trench remains completely filled by the first protective layer. An electrically conductive field electrode and a field electrode dielectric are formed in the field electrode trench. At least some of the first protective layer is removed from the gate trench. A conformal gate dielectric layer is formed on the substrate. An electrically conductive gate electrode is formed in the gate trench while the field electrode remains covered by the gate dielectric layer.

Abstract: An optical module structure includes a light source, a light receiver, a dielectric layer, a circuit layer, an encapsulant and a light shielding structure. The light source is embedded in the encapsulant, and a first surface of the light source is exposed from a first surface of the encapsulant. The light receiver is embedded in the encapsulant, and a first surface of the light receiver is exposed from the first surface of the encapsulant. The dielectric layer is disposed on the first surface of the encapsulant. The circuit layer is disposed on the dielectric layer and electrically connected to the light source and the light receiver. The light shielding structure is disposed in the dielectric layer corresponding to a location between the light source and the light receiver.

Abstract: Provided is a method for fabricating a display device. The method for fabricating the display device includes preparing a flexible display panel including a plurality of pixels and a thin film transistor connected to at least one of the plurality of pixels, forming a thin film encapsulation layer over the flexible display panel, and forming a touch screen panel over the thin film encapsulation layer. The touch screen panel is formed at least partly by a transfer process.

Abstract: A three-dimensional (3D) semiconductor memory device and a method for fabricating the same, the device including insulating layers stacked on a substrate; horizontal structures between the insulating layers, the horizontal structures including gate electrodes, respectively; vertical structures penetrating the insulating layers and the horizontal structures, the vertical structures including semiconductor pillars, respectively; and epitaxial patterns, each of the epitaxial patterns being between the substrate and each of the vertical structures, wherein a minimum width of the epitaxial pattern is less than a width of a corresponding one of the vertical structures.