Patents Examined by Daniel Tsui
  • Patent number: 9619391
    Abstract: For on-demand migration of data in a distributed memory storage configuration, an identifier is transformed at a client into a transformed identifier. From a current configuration of a first plurality of servers operating on a server-side at a current time, a current server is identified at the client. From a previous configuration of a second plurality of servers operating on a server-side at a previous time, a previous server is identified at the client. A first request is sent to the current server to perform an operation using the identifier. A second request is sent to the previous server to perform the operation using the identifier. When a first data in response to the first request is invalid and a second data in response to the second request is valid, the second data is migrated to the current server in a migration request from the client to the current server.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Kanak B. Agarwal
  • Patent number: 9612766
    Abstract: Implementations described and claimed herein provide systems and methods for estimating migration progress. In one implementation, a target file system is initialized to which to migrate existing data from a source file system. An initial amount of data to be migrated to the target file system is estimated based on an examination of in-use space at a root of the source file system. Any mount points for nested file systems in the source file system are identified. An amount of data for each of the nested file systems is estimated based on an examination of in-use space at the mount point for the nested file system. An estimated total amount of data to be migrated from the source file system to the target file system is determined based on the initial amount of data to be migrated and the amount of data for each of the nested file systems.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: April 4, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Timothy Haley, Mark Maybee, Priya Krishnan
  • Patent number: 9606733
    Abstract: A data storage device includes a FLASH memory and a controller. The FLASH memory includes a plurality of blocks wherein each of the blocks includes a plurality of pages. The controller is coupled to the FLASH memory and utilized to execute a garbage-collection process on the FLASH memory according to a number of spare blocks in the FLASH memory and a number of inefficient blocks where most of the pages are spare in the FLASH memory. The garbage-collection process is utilized for merging at least two inefficient blocks to release at least one spare block from the inefficient blocks.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: March 28, 2017
    Assignee: Silicon Motion, Inc.
    Inventor: Shen-Ting Chiu
  • Patent number: 9594511
    Abstract: A method for performing a write to a volume x in a cascaded architecture is described. In one embodiment, such a method includes determining whether the volume x has a child volume, wherein each of the volume x and the child volume have a target bit map (TBM) associated therewith. The method then determines whether the TBMs of both the volume x and the child volume are set. If the TBMs are set, the method finds a higher source (HS) volume from which to copy the desired data to the child volume. Finding the HS volume includes comparing ages of mapping relationships upstream from the volume x in order to determine a source of the data. Once the HS volume is found, the method copies the data from the HS volume to the child volume and performs the write to the volume x. A method for performing a read is also disclosed herein.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael T. Benhase, Theresa M. Brown, Lokesh M. Gupta, Carol S. Mellgren
  • Patent number: 9594509
    Abstract: Address-based thresholds for freemained frames are used to determine retention actions. Based, at least in part, on a comparison of a number of freemained frames for an address space against a threshold of freemained frames for the address space, freemained frames can be retained or rejected and/or the threshold can be adjusted.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventor: Steven M. Partlow
  • Patent number: 9588894
    Abstract: A method to merge one or more non-transactional stores and one or more thread-specific transactional stores into one or more cache line templates in a store buffer in a store cache. The method receives a thread-specific non-transactional store address and a first data, maps the store address to a first cache line template, and merges the first data into the first cache line template, according to a store policy. The method further receives a thread-specific transactional store address and a second data, maps the thread-specific store address into a second cache line template, according to a store policy. The method further writes back a copy of a cache line template to a cache and invalidates a third cache line template, which frees the third cache line template from a store address mapping.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Uwe Brandt, Willm Hinrichs, Walter Lipponer, Martin Recktenwald, Hans-Werner Tast
  • Patent number: 9588909
    Abstract: An information processing apparatus includes a storage managing unit configured to manage a storage device by dividing the storage device into a plurality of physical storage regions corresponding to respective modes used by the information processing apparatus, and a storage processing unit configured to cause data generated by the information processing apparatus during operation in a mode to be stored in a physical storage region corresponding to the mode. For example, the storage managing unit stores a policy in the storage device. The policy defines whether to permit the use of data between a plurality of security attributes corresponding to the respective physical storage regions.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Yasutaka Nishimura, Masami Tada, Takahito Tashiro
  • Patent number: 9588693
    Abstract: An example method for performing discard commands on Redundant Array of Independent Disks (RAID) devices may comprise receiving a request to free a range of logical sectors that is mapped to a plurality of storage devices organized as RAID. The method may further comprise identifying a first physical sector number corresponding to a first logical sector having a lowest number greater or equal than a starting logical sector number of the range of logical sectors. The method may further comprise identifying a second physical sector number corresponding to a second logical sector having a lowest number greater or equal than an ending logical sector number of the range of logical sectors. The method may further comprise issuing a single command to all of the plurality of storage devices to free a range of sectors identified by the first physical sector number and the second physical sector number.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: March 7, 2017
    Assignee: Red Hat, Inc.
    Inventors: Mikulá{hacek over (s)} Pato{hacek over (c)}ka, Michael A. Snitzer
  • Patent number: 9588893
    Abstract: A method to merge one or more non-transactional stores and one or more thread-specific transactional stores into one or more cache line templates in a store buffer in a store cache. The method receives a thread-specific non-transactional store address and a first data, maps the store address to a first cache line template, and merges the first data into the first cache line template, according to a store policy. The method further receives a thread-specific transactional store address and a second data, maps the thread-specific store address into a second cache line template, according to a store policy. The method further writes back a copy of a cache line template to a cache and invalidates a third cache line template, which frees the third cache line template from a store address mapping.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Uwe Brandt, Willm Hinrichs, Walter Lipponer, Martin Recktenwald, Hans-Werner Tast
  • Patent number: 9588716
    Abstract: Backup operations for shared volumes are described. A shared volume is identified as used by a virtual machine scheduled for a backup operation by a first distributed system node. A second distributed system node is identified that has a responsibility for sending control signals to the shared volume. An association is saved of the second distributed system node to the shared volume. The responsibility for sending control signals to the shared volume is assigned to the first distributed system node. The backup operation is executed for the shared volume by the first distributed system node. The responsibility for sending control signals to the shared volume is assigned to the second distributed system node.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 7, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Sunil Kumar Yadav, Soumen Acharya, Suman Tokuri, Gajendran Raghunathan
  • Patent number: 9582221
    Abstract: A virtualized computing system for executing a distributed computing application, such as Hadoop, is discussed. The virtualized computing system stores data in a distributed filesystem, such as Hadoop Distributed File System, and processes data using a topology awareness that takes into account the virtualization layer of the virtualized computing system. The virtualized computing system employs locality-related policies, including replica placement policies, replica choosing policies, balancer policies, and task scheduling policies that take advantage of the awareness of the virtualization topology.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: February 28, 2017
    Assignee: VMware, Inc.
    Inventors: Junping Du, Ying He, Yunshan Lu
  • Patent number: 9576629
    Abstract: A memory device includes a memory cell array having a plurality of memory cells, a storage unit suitable for storing a fail address corresponding to a fail memory cell in the memory cell array, an available storage capacity determination unit suitable for generating available capacity information indicating an available storage capacity in the storage unit, and an output circuit suitable for outputting the available capacity information.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: February 21, 2017
    Assignee: SK Hynix Inc.
    Inventor: Choung-Ki Song
  • Patent number: 9569265
    Abstract: Data access optimization features the innovative use of a writer-present flag when acquiring read-locks and write-locks. Setting a writer-present flag indicates that a writer desires to modify a particular data. This serves as an indicator to readers and writers waiting to acquire read-locks or write-locks not to acquire a lock, but rather to continue waiting (i.e., spinning) until the write-present flag is cleared. As opposed to conventional techniques in which readers and writers are not locked out until the writer acquires the write-lock, the writer-present flag locks out other readers and writers once a writer begins waiting for a write-lock (that is, sets a writer-present flag). This feature allows a write-lock method to acquire a write-lock without having to contend with waiting readers and writers trying to obtain read-locks and write-locks, such as when using conventional spinlock implementations.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: February 14, 2017
    Assignee: CHECK POINT SOFTWARE TECHNOLOGIES LTD.
    Inventor: Ajay Chandel
  • Patent number: 9569126
    Abstract: A flash memory control technology with power recovery capability, by which command sequence information is generated for write data that is requested to be written into a flash memory. A random access memory is allocated for temporary storage of the write data and the command sequence information. The write data is uploaded from the random access memory onto a run-time write block between physical blocks of the flash memory with the command sequence information corresponding thereto. During a power recovery process of a data storage device that is equipped with the flash memory, the run-time write block is checked and, according to the command sequence information that has been uploaded onto the run-time write block, the write data in the run-time write block and later in a command sequence than lost data is abandoned.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: February 14, 2017
    Assignee: Silicon Motion, Inc.
    Inventor: Yi-Kang Chang
  • Patent number: 9558118
    Abstract: A memory race recorder (MRR) is provided. The MRR includes a multi-core processor having a relaxed memory consistency model, an extension to the multi-core processor, the extension to store chunks, the chunk having a chunk size (CS) and an instruction count (IC), and a plurality of cores to execute instructions. The plurality of cores executes load/store instructions to/from a store buffer (STB) and a simulated memory to store the value when the value is not in the STB. The oldest value in the STB is transferred to the simulated memory when the IC is equal to zero and the CS is greater than zero. The MRR logs a trace entry comprising the CS, the IC, and a global timestamp, the global timestamp proving a total order across all logged chunks.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 31, 2017
    Assignee: Intel Corporation
    Inventors: Gilles A. Pokam, Cristiano L. Pereira
  • Patent number: 9535619
    Abstract: An information handling system and method provide for receiving a request to remove a selected physical disk from a disk group realizing a virtual disk in a redundant array data storage subsystem, determining whether removal of the selected physical disk is feasible, and, when feasible, removing the selected physical disk from the disk group without deleting the virtual disk realized by the disk group and reconstructing the virtual disk to be realized by the disk group using only the proposed number of physical disks, wherein the proposed number of physical disks is less than an initial number of physical disks of the disk group.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: January 3, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Neeraj Joshi, Sandeep Agarwal, Deepu S. Sreedhar M
  • Patent number: 9529531
    Abstract: Some embodiments of the invention provide novel methods for storing data in a hash-addressed memory and retrieving stored data from the hash-addressed memory. In some embodiments, the method receives a search key and a data tuple. The method then uses a first hash function to generate a first hash value from the search key, and then uses this first hash value to identify an address in the hash-addressed memory. The method also uses a second hash function to generate a second hash value, and then stores this second hash value along with the data tuple in the memory at the address specified by the first hash value. To retrieve data from the hash-addressed memory, the method of some embodiments receives a search key. The method then uses the first hash function to generate a first hash value from the search key, and then uses this first hash value to identify an address in the hash-addressed memory. At the identified address, the hash-addressed memory stores a second hash value and a data tuple.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: December 27, 2016
    Assignee: BAREFOOT NETWORKS, INC.
    Inventors: Patrick Bosshart, Changhoon Kim
  • Patent number: 9529726
    Abstract: In some examples, a memory device is configured to load multiple pages of an internal page size into a cache in response to receiving an activate command and to write multiple pages of the internal page size into a memory array in response to receiving a precharge command. In some implementations, the memory array is arranged to store multiple pages of the internal page size in a single physical row.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: December 27, 2016
    Assignee: Everspin Technologies, Inc.
    Inventors: Syed M. Alam, Thomas Andre
  • Patent number: 9513692
    Abstract: A memory controller operable for selective memory access to areas of memory exhibiting different attributes leverages different memory capabilities that vary access speed, retention time and power consumption, among others. Different areas of memory have different attributes while remaining available to applications as a single contiguous range of addressable memory. The memory controller employs an operating mode that identifies operational priorities for a computing device, such as speed, power conservation, or efficiency. The memory controller identifies an area of memory based on an expected usage of the data stored in the area, for example an access frequency indicating future retrieval. The memory controller therefore selects areas of memory based on the operating mode and the expected usage of data to be stored in the area according to a heuristic that favors areas of memory based on those exhibiting attributes having a high correspondence to the expected usage of the data.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Ruchir Saraswat, Matthias Gries, Nicholas P. Cowley
  • Patent number: 9507673
    Abstract: Techniques for performing an incremental restore from block-based backup are described herein. One method starts by parsing entries in first block allocation table (BAT) associated with first full backup information of parent volume to determine BAT entry corresponding to start of parent volume. Merged BAT associated with resultant image is then generated based on first BAT and incremental BATs respectively associated with one or more incremental backup information. One or more incremental backup information is based on incremental changes to parent volume subsequent to first full backup information being generated. Volume used blocks information is then generated based on merged BAT. Volume used blocks information includes start location of each volume used block. Starting from the entry corresponding to start of parent volume, data in blocks identified by each entry in merged BAT are read and written to target volumes corresponding respectively to each entry in merged BAT.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 29, 2016
    Assignee: EMC Corporation
    Inventors: Ravi Kishore Rangapuram, Kiran Kumar Mv, Ravi Shankar Panem