Abstract: A device, used in particular in telecommunications technology to supply power to parallel-connected, electrical loads has side-by-side arranged potential lines. These are secured inside a connecting housing, with connections for supplying the operating potential. The connections supply plug-in modules for connecting individual loads, which modules are fitted against the connecting housing in longitudinal direction of the potential lines. The potential lines are configured as rigid, parallel bus bars that project on a side from the connecting housing. With the aid of passages that make contact with the bus bars, the plug-in modules are fitted side-by-side onto the bus bars, such that they fit against the connecting housing or against each other, and are frictionally secured.
Abstract: A flexible integrated circuit mounting apparatus and method for mounting a chip on a printed circuit board directed to the reduction of stresses within the mounting or interconnection medium, caused principally by a mismatch of the coefficient of thermal expansion between the chip circuit and the printed circuit board, and thus reduction of the likelihood of interconnection failure between the chip and the particular surface or device to which an interconnection is made.
Abstract: Structures and methods that provide for the vertical alignment of and electrical interconnection of MEMS tiles using metallized elastic spheres and precision pyramid shaped pits etched on the surface of silicon substrates. The methods of producing large area, multi-tile (substrate) structures permit fabrication of phased array antenna transmit/receive subsystems, for example, requiring precision, vertical electrical (DC and RF) interconnects between tiles and frames stacked on top of one another. Metallized, back-to-back, inverted pyramid shaped, vertical via structures are fabricated on high resistivity silicon tiles using micro-electronics mechanical system (MEMS) techniques. Slightly oversize, metallized, elastic spheres are squeezed between two inverted pyramid-shaped indentations to provide electrical conduction and accurate alignment between the substrates.
Abstract: In a printed circuit board, electronic components such as a component having a pair of leading portions, a chip component having a pair of electrodes, and the like, are connected to circuit patterns; and a resist layer covering a copper foil portion formed as a ground pattern is removed in vicinity of the high-impedance side leading portion of the current leading component and the high-impedance side electrode of the chip component to thereby form removed portions so that discharge paths are formed between the copper foil portion exposed through the removed portions and the leading portion and the electrode.
Abstract: A first plurality of metal bumps is formed on a semiconductor wafer containing a plurality of chips, each of the first plurality of bumps being in electrical contact with a contact pad on one of the chips. An encapsulant layer is deposited over the first plurality of metal bumps and then polished to expose a top surface on each of the metal bumps. A second plurality of metal bumps is formed on the exposed top surfaces of the first plurality of plurality of bumps, respectively. The wafer is then sawed to separate the individual chips, yielding semiconductor packages which have the same lateral dimensions as the chips. Alternatively, to facilitate the encapsulation process, the wafer can be sawed into rectangular, multi-chip segments before the encapsulant layer is deposited. After the encapsulant layer has been applied and polished and the second plurality of conductive bumps have been formed, the segments are then separated into individual chips.
Abstract: An electrical apparatus comprises an electrical device including at least a first terminal. A carrier for electrically connecting the electrical device to a printed circuit board having at least a conductive contact includes a bridging terminal disposed between the first terminal and the conductive contact. The bridging terminal is arranged to be selectively displaced between a first position at which the first terminal and the conductive contact are not connected, and a second position at which the first terminal and the conductive contact are electrically connected by the bridging terminal.
Abstract: A method of securing an electronic package to a circuit board includes the step of providing a retainer having a locating cavity defined therein. The method further includes the step of positioning the electronic package within the locating cavity so that the electronic package is fixed in relationship to the retainer. Moreover, the method includes the step of securing the retainer in fixed relationship to the circuit board so as to sandwich the electronic package between the retainer and the circuit board. The securing step is performed after the positioning step. An apparatus for securing an electronic package to a circuit board is also disclosed.
Abstract: In a multilayer printed circuit board having at least two conductive layers, including a power-supply layer with a plurality of power-supply planes having different supply voltages and a ground layer, a circuit pattern for transmitting a signal serving as a radiation noise source is formed on a conductive layer facing the ground layer in order to suppress generation of radiation noise.
Abstract: A multi-element module is constituted by a substrate having thereon a plurality of first electrodes, a plurality of electrical elements each having at least one second electrode and disposed so that its second electrode is aligned with a first electrode in an opposed relationship, and an adhesive member disposed between the substrate and the plurality of electrical elements to ensure electrical connection between the first electrodes and the second electrodes. The adhesive member comprises an adhesive layer contacting and bonding the electrical elements to the substrate, and an anisotropic conductive layer comprising a resin and electroconductive particles dispersed in the resin. The anisotropic conductive film is disposed between the adhesive layer and the substrate so as to insulate adjacent electrodes from each other while electrically connects the first and second electrodes, even when the electrical elements having second electrodes different in thickness.
Abstract: In an integrated circuit, the conducting paths electrically coupling the electronic components can be fabricated to conform to conflicting physical property requirements. After formation of the conducting paths, conducting material can be added to or removed from selected conducting paths. In this manner, the resistance or the capacitance of selected conducting paths can be enhanced relative to the non-selected conducting paths.
Abstract: A method and apparatus is provided for electrically and mechanically interconnecting electronic circuit assemblies or electronic modules. An integrated circuit (300) includes a plurality of leads (302) extending from a surface (305), each of the leads (302) having a seating portion (403) and a stem portion (402). A printed circuit board (400) includes a plurality of plated through holes (401) therein corresponding to the plurality of leads (302) extending from the integrated circuit (300). The steps of the method include positioning the printed circuit board (400) so that a lower surface (404) of the printed circuit board (400) rests on the seating portion (403) of the leads (302) of the integrated circuit (300), and so that the stem portion (302) of each of the leads are positioned within the corresponding plated through holes (401) in the printed circuit board (400).
Abstract: A changeable display element is edgewise mounted on an insulating board and carries to rotate through about 180.degree. to show one color face or the other to a viewer. The board provides a similarly colored face for each face to form a pixel. The element carries a permanent magnet and is driven by a switchable magnetic field provided from the board. Soft iron pads on the board cooperate with the magnet on each position to retain the element against incidental displacement between application of the field. The board may support arrays of such elements.
Abstract: A semiconductor mounting system of the present invention includes a first semiconductor chip in which a first semiconductor integrated circuit is packaged and a second semiconductor chip in which a second semiconductor integrated circuit is packaged. The first semiconductor chip includes a plurality of first pins provided on a first surface and a plurality of second pins provided on a second surface. The second semiconductor chip includes a plurality of third pins provided on a third surface and a plurality of fourth pins provided on a fourth surface. The semiconductor mounting system further includes: a plurality of first lines for electrically connecting the first pins with the third pins; and a plurality of second lines for electrically connecting the second pins with the fourth pins. A length of the first lines is substantially equal to a length of the second lines.
Type:
Grant
Filed:
July 24, 1998
Date of Patent:
December 19, 2000
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: Apparatus for interconnecting logic boards is provided with a backplane, a plurality of logic boards connected to the backplane, and a plurality of interconnecting boards, connected to the backplane, for interconnecting the plurality of logic boards. In the apparatus, the plurality of logic boards are connected to the backplane with the logic boards in vertical position at right angles with the interconnecting boards and a specified distance away from the interconnecting boards.
Abstract: A stress relief substrate having a pair of ball grid arrays (BGAs) is interposed between a PC board and an electrical component. The BGAs are electrically connected through vias in the stress relief substrate to connect component circuitry to the PC board. In one embodiment, the BGAs are offset on a flexible substrate so that there is some open space between the edges of electrically connected solder balls. This allows the substrate to warp during thermal cycling and absorb the stress caused by TCE mismatch. In another embodiment, the BGAs are aligned on a rigid substrate that is formed with holes interposed between the solder balls. This reduces the amount of material that interconnects the solder balls so that the substrate tends to flex rather than transfer the TCE stress to the solder balls.
Abstract: A connector with a staggered contact design is described. The connector comprises a first row of connector pins, the connector pins alternately proximal pins and distal pins. The connector further comprises a second row of connector pins alternately proximal pins and distal pins. The distal pins of the connector carry the signals, while the proximal pins are ground or power signals.
Abstract: An improved way of preparing packaged electronic circuitry using molded plastics, ceramic Thick Film technology, and Polymer Thick Film technology. In this invention at least one of the electronic devices in the package is supported in a plastic molded substrate, and the circuit traces area added to the surface of the electronic device.
Abstract: A SCR (Selective Call Radio) (400) includes a circuit. The circuit in turn includes a component (102) having one or more bondable elements (104-108), and a substrate (110) coupled to the component (102). To substantially improve interconnect reliability, the substrate (110) includes a corresponding one or more bondable pads (108) for interconnecting with the one or more bondable elements (104-108) of the component (102), and one or more slotted openings (202) in the substrate (110) for relieving mechanical stress near one or more interconnects of the substrate (110) and the component (102).
Type:
Grant
Filed:
December 21, 1998
Date of Patent:
December 12, 2000
Assignee:
Motorola, Inc.
Inventors:
Michael Richard Floyd, Thomas A. Oberle, Patrick Joseph Prayne
Abstract: Two semiconductor memory chips are placed onto a flexible wiring and are shaped by simple folding of the flexible wiring about a central elastic line, into a space-efficient stack arrangement whose outer contacts are formed only at one marginal side. To form memory cards, a plurality of such stack arrangements can be placed onto a simply constructed printed board.
Abstract: Secondary backplane boards are secured to a main backplane board to provide interconnection paths in a direction transverse to interconnection paths provided on the main backplane board, so that current manufacturing capabilities of multi-layer backplane boards are not exceeded.
Type:
Grant
Filed:
March 24, 1999
Date of Patent:
November 28, 2000
Assignee:
Lucent Technologies Inc.
Inventors:
Andrew C. Durston, Liang Hwang, Hector F. Rodriguez