Abstract: The contact arrangement is a connector block for detachably fastening an electrical component, particularly an integrated circuit having a plurality of terminal contacts disposed in a ball grid array (BGA), in a column grid array (CGA), in a land grid array (LGA) or of the flip-chip type to a printed circuit board. In a support part, a number of contact pins are disposed in a grid in bores. The contact pins project from the bore on the side facing the printed circuit board and are surface-mounted together with contact areas of the printed circuit board. A free end region of each bore is intended for guiding the substantially dome-shaped terminal contacts. Between the end of a contact pin and a terminal contact there is a space bridged for establishing an electrical connection with a contact element, for example an axially compressible coil spring. By means of several holding-down elements disposed peripherally to the integrated circuit, the integrated circuit is pressed down upon the support part.

Abstract: A method and apparatus interconnecting multiple devices on a circuit board. One disclosed circuit board has a first attach region on a first surface for coupling a first set of pins from a first device to a set of signal lines. A second attach region on a second surface is for coupling a second set of pins from a second device to the set of signal lines. The second attach region is predominantly non-overlapping with respect to the first attach region.

Abstract: In one embodiment of the present invention, an electronic device comprises a circuit board having a first side and a second side and having circuit traces formed only on the first side. The electronic device further includes a voltage regulator providing a regulated voltage via a regulated voltage output terminal and having a regulated voltage return terminal. Additionally, the electronic device includes a microcontroller mounted to the first side of the circuit board and having a plurality of regulated voltage input terminals and corresponding microcontroller voltage return terminals. The electronic device also comprises a bus comprising a first circuit trace coupled to the regulated voltage output terminal and a second circuit trace coupled to the regulated voltage return terminal, the first circuit trace and the second circuit trace running substantially parallel to one another.

Abstract: A backplane circuit board for an electronic chassis includes a bracket and an upper circuit board operatively connected to the bracket. A lower circuit board is also operatively connected to the bracket wherein the upper circuit board is offset from the lower circuit board and the upper circuit board is parallel to the lower circuit board.

Abstract: A circuit design is logically partitioned into a plurality of blocks. As a first hierarchial assembly level, the blocks are fabricated as individual submodules each including at least one electronic component with component connection pads on a top surface, and a first interconnect structure including at least one interconnect layer bonded to the top surfaces, and interconnecting selected ones of the component connection pads. Submodule connection pads are provided on upper surfaces of the submodules. As a second hierarchial assembly level, a second interconnect structure is bonded to the upper surfaces and interconnects selected ones of the submodule connection pads.

Abstract: Disclosed are a printed circuit board and a method for wiring signal lines on the same. Connecting lines for electrically connecting chip select pins of a semiconductor chip, no connect pins and address designate pins, are formed on a PCB. In case of an unstack type, a pad is connected to chip select pin and no connect functioning pin of other semiconductor chip via a first signal line. In case of a stack type, another pad used with a pad is connected to a no connect functioning pin and a chip select pin of the corresponding semiconductor chip having no connection with the first signal line via a second signal line. According to the type of semiconductor chip, e.g. unstack or stack type, a second connecting pad selectively connecting by a first jumper having almost zero resistance value, is disposed between the first and the second signal lines. A first connecting pad is also disposed at the second signal line, the first pad is selectively connected by a second jumper having zero resistance value.

Abstract: A flip-chip mount board includes a circuit board provided with a plurality of conductor patterns to which a plurality of bumps provided on an electronic component can be connected via a connection medium provided on the conductor patterns. The conductor pattern includes at least one wiring pattern and a connection pad, the wiring pattern serves as an interconnection, the connection pad is provided at a position corresponding to one of the bumps, the at least one wiring pattern and the connection pad are provided in an integrated manner, and a width (W1) of the connection pad is formed so as to be greater than a width (W2) of the wiring pattern (W1>W2).

Abstract: A printed circuit board for coupling surface mounted optoelectric semiconductor devices within a computer system is disclosed. The printed circuit board includes at least one substantially planar surface. There are multiple electrically conductive sites located on the substantially planar surface for connection to a surface mounted semiconductor electronic device. The electrically conductive sites are also connected to electrical interconnects embedded within the printed circuit board. In addition, there are multiple optical pathways terminated at the substantially planar surface for coupling a surface mounted semiconductor optoelectric device.

Abstract: The shapes of openings of a solder resist defining exposed portions of electrode pads and the shapes of openings of the solder resist defining the shapes of positioning signs are simultaneously formed by photolithography using the same mask pattern. As a result, the signs for registration can be easily formed on a main board or circuit boards. Also, it is possible to increase the positional accuracy of the signs relative to the positions of the electrode pads.

Abstract: The chip-to-board (or chip-to-MCM) connection assembly and method therefor features a semiconductor chip (31) having a front surface (31f) on which external terminal pads are provided; a board or MCM (32) having a surface (e.g., a recessed surface) at a first side thereof to which the rear surface (31r) of the chip is affixed; and a connection carrier (33), disposed as an overlay, which electrically links the chip and the board or MCM. In this assembly scheme, the connection carrier (e.g., a bump carrier) which is affixed to both the chip and the board or MCM, contains all required signal line tracings (57) to provide the electrical interconnection between the semiconductor chip and the board or MCM. The bump carrier replaces all bond wires (24) and the like and can include support/control circuitry, passive and/or active, associated with, for example, high-speed/high-power IC chips (51).

Abstract: An improved way of preparing packaged electronic circuitry using molded plastics, Thick Film, and Build Up Technology, and achieving shielding of the circuitry and components of the package. In this invention at least one of the electronic devices in the package is supported in a molded pocket in the molded substrate, and using Build Up Technology circuit traces are added to the surface of the substrate and the electronic device, simultaneously creating the circuit traces and making the interconnections with the components at the same time. Shielding, which is optional, can easily be printed or plated over the planar surface of the packaged circuit traces and components.

Abstract: A slotted-rail mounting assembly for mounting an object having at least one flat surface, such as a printed circuit board, to a surface, such as the inner surface of a server or a PC enclosure. An object may be mounted to the surface using two or more slotted rail mounting assemblies. Each slotted rail mounting assembly comprises a slotted rail with slots that fit over raised brackets of a runner mounted to the surface. The slotted rail may be translated parallel to the runner in a central track formed by the runner on one side and guideposts on the other side in order to slide the slotted rail underneath the railed brackets, thus securing the slotted runner to the surface.

Abstract: A holder for holding a leadless circuit element includes opposing flanges which can be bent downwardly for bending the flanges into hands and fingers for holding the leadless circuit element within a plastic mold. In still further accord with the device, the device includes an insert displacement connection integral to a frame for allowing the leadless circuit element to be included in a circuit. Further, the assembly is insert molded in plastic.

Abstract: A multiple substrate mounting frame (104) includes first (132) and second (130) surfaces and a plurality of windows or cavities (106-112). A set of substrates having electrical circuitry (114-120) are attached and electrically connected to the first surface (132) of the mounting frame (104). The second surface (130) can then be electrically interconnected to a mother board (102). A leadless surface mountable assembly for multiple die (100) includes the mounting frame (104) which receives a plurality of substrates (114-120) and electrically interconnects them to each other and/or to a mother board (102). A heat sink (122) can be provided if the die (134, 124) generate too much heat.

Abstract: Electronic apparatus, battery powerable apparatus, and radio frequency communication devices are disclosed. In but one implementation, an electronic apparatus comprises a substrate having a component mounted thereto. An encapsulant mass is received over and adheres to the gasifiable component and to the substrate. An opening is formed through the substrate and extends to the encapsulant mass. In another considered implementation, an electronic apparatus comprises a substrate having a component mounted thereto, with the component comprising a lateral periphery. An encapsulant mass is received over and adheres to the gasifiable component and to the substrate. An opening extends through the substrate from a location proximate the component within a region bounded by the component lateral periphery to externally of the substrate.

Abstract: An electronic control unit having a housing, a substrate, particularly a hybrid, arranged in the housing and having an electronic control circuit. The electronic control unit also includes at least one device plug secured to the housing having contact elements that are electrically conductively connected to the control circuit of the substrate. A second substrate is arranged in the housing, spatially separated from the first substrate. At least one power component disposed in the housing and, electrically connected to the control circuit on the first substrate. One connecting printed circuit trace disposed in housing and conductively connected to the power component. The connecting printed circuit trace are conductively connected to a contact element, conducting power currents, of the device plug. Using the arrangement, in the event of a large number of contact elements in a device plug, the electrical connecting of the contact elements to the substrate can be simplified.

Abstract: A mounting system using a mounting frame permits the support of up to three printed circuit boards in a stacked fashion. Various cut-outs provide ridge segments to support printed circuit boards at a top, bottom and intermediate plane. Locking devices adjacent selected ridge segments engage the printed circuit boards and hold them in assembly with the mounting frame. The individual printed circuit boards can be coupled to each other employing straight pin headers or employing flexible, flat ribbon cable connected to the printed circuit board traces by suitable connectors.

Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

Abstract: A circuit arrangement for interconnecting electronic components such as integrated circuit devices, chip packages and/or circuit boards includes signal, first fixed potential (e.g., power) and second fixed potential (e.g., ground) interconnects arranged into an interconnection layout pattern that offers greater flexibility, performance and cost effectiveness than conventional patterns. In some implementations, the interconnection layout pattern incorporates one or more tiles of interconnects, with each tile defining a plurality of interconnect positions arranged into at least three rows and at least four columns. For each tile, a signal interconnect is disposed at each of the three interconnect positions in each of the first and fourth columns, and one each of a signal interconnect, a first fixed potential interconnect and a second fixed potential interconnect are disposed in each of the second and third columns.

Abstract: An initiator for an inflator of an automotive airbag restraint system includes a housing and a wall dividing the housing into two parts, one for housing a firing element of the initiator, and one for receiving at least one application specific integrated circuit which performs functions of a portion of an electronic control unit. A mounting element is located in the second part of the housing, and at least one application specific integrated circuit is carried by the mounting element. The mounting element and two or more application specific integrated circuits may be provided as a package, in which at least two application specific integrated circuits are mounted in a stacked condition to form an application specific integrated circuit stack. The application specific integrated circuits are configured such that predetermined electrical circuit locations of adjacent ones of the application specific integrated circuits to be interconnected are aligned.