Abstract: A power source, a primary inductor, a load capacitance, and one or more tuned branch resonators and switching devices are coupled to generate pulses which represent a superposition of sinusoidal waveforms. The primary inductor is connected between the power source and the load. At the start of each cycle the load is coupled to ground and each tuned-branch resonators is reinitialized to re-energize the circuits and to stabilize the waveform when the frequencies of the sinusoidal waveforms are non-periodic.

Abstract: The present disclosure relates to circuits and methods for improving the performance of a polar modulator by maintaining the input to a phase modulator.

Abstract: A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the voltage controlled oscillator based on an output clock of the voltage controlled oscillator.

Abstract: A refresh period signal generator with a digital temperature information generation function includes a temperature information generating part configured to generate temperature information by using a first period signal and a second period signal, a refresh period signal generating part configured to output a refresh period signal by selecting one signal having a shorter period between the first period signal and the second period signal, and an operation timing control part operating the temperature information generating part and the refresh period signal generating part at a predetermined timing.

Abstract: A circuit arrangement for detecting voltage changes, comprising supply terminals configured to apply a first potential and a second potential, a first oscillator and a second oscillator, which are operated with the first potential and the second potential, a voltage dependence of the frequency of the first oscillator differing from a voltage dependence of the frequency of the second oscillator, a first evaluation circuit configured to evaluate the frequency of the first oscillator and a second evaluation circuit configured to evaluate the frequency of the second oscillator, and a comparison circuit configured to compare a value based on the evaluated frequencies of the first oscillator and of the second oscillator with a predetermined threshold value, and to output a voltage change signal indicating an impermissible voltage change between the first potential and the second potential depending on the result of the comparison.

Abstract: A system and method for providing temperature compensation in a oscillator component (such as a crystal oscillator component) that includes a closely-located temperature sensing device. The crystal oscillator component in example systems and methods is exposed to a temperature profile during a calibration procedure. Temperature and frequency data are collected and applied to coefficient generating function according to a temperature compensation model to generate a set of coefficients that are used in the temperature compensation model in an application device. The generated coefficients are stored in a coefficient memory accessible to an application device during operation.

Abstract: An ASK demodulator for use in an RFID transponder having a limiter circuit associated with the antenna circuit and converting the ASK antenna field strength modulation into an ASK limiter current modulation by limiting the antenna voltage to a fixed value and thereby causing the limiter current to be substantially proportional to the ASK antenna field strength, and a current discriminator circuit that discriminates the ASK limiter current modulation. By converting the field strength modulation into a proportional limiter current and discriminating that limiter current, a linear relationship and a stable demodulator sensitivity are achieved. The current discrimination can be made accurately under low-voltage conditions.

Abstract: A relaxation oscillator compensates for system delay. The relaxation oscillator includes first and second input signal units that generates first and second capacitor voltages, a delay compensation unit that receives a reference voltage and the first and second capacitor voltages and that generates a compensation voltage. In certain embodiments, a voltage generating unit applies the reference voltage to the delay compensation unit, and a latch unit stores first and second comparison signals compared by the first and second input signal units and transmits a clock signal and a inverted clock signal to the first and second input signal units. The first and second input signal units compare the first and second capacitor voltages with a compensation voltage transmitted from the delay compensation unit.

Abstract: A modulation-signal generating circuit includes a temperature monitoring unit that detects a casing temperature of the circuit, a voltage control oscillator including two variable impedance circuits that independently control oscillation frequency based on an input control voltage, a frequency-correction-voltage generating unit that outputs a voltage for compensating for a temperature drift of an oscillation frequency according to the casing temperature detected by the temperature monitoring unit, to one of the variable impedance circuits, and an FM-modulation-voltage generating unit that outputs a modulation voltage containing a constant DC component not depending on temperature and a predetermined AC component, to the other variable impedance circuit, under a temperature drift compensation condition of the frequency-correction-voltage generating unit.

Abstract: A method and apparatus to generate a pulse width modulated signal from a sampled digital signal by chaotic modulation. The method includes generating predetermined chaotic intervals having random interval values using a chaotic interval generator, and generating the pulse width modulated signal from a reference signal and the sampled digital signal during each of the chaotic intervals. Thus, electromagnetic interference (EMI) that affects an audio amplifier can be remarkably reduced.

Abstract: An oscillator circuit includes a combination of two frequency-determining elements, designed as single-port surface wave resonators with interdigital converters, and one active electronic circuit. The two single-port surface wave resonators are connected to each other, avoiding inductive components. In the case of a combination in a parallel circuit, the connection is designed as a combination oscillating at high-frequency anti-resonance, and in the case of a combination in a series circuit, the combination is designed as a combination oscillating at high-frequency resonance.

Abstract: A circuit includes a resonant tunneling device having first and second terminals, and biased to exhibit a negative resistance between the terminals, the terminals being coupled at spaced locations to a further section made of a material which has a plasma resonance tuned to a selected frequency. A different circuit includes a resonant tunneling structure with plural layers, including an outer layer coupled to a further layer made of a material which has a plasma resonance tuned to a selected frequency. Two circuit sections are respectively coupled to the resonant tunneling structure at spaced locations thereon. A bias is applied across the tunneling structure and further layer, and causes the tunneling structure to exhibit a negative resistance.

Abstract: A clock synthesis circuit includes a delta sigma modulator that receives a divide ratio and generates an integer portion and a digital quantization error (a fractional portion). A fractional-N divider divides a received signal according to a divide control value corresponding to the integer portion and generates a divided signal. A phase interpolator adjusts a phase of the divided signal according to the digital quantization error to thereby reduce noise associated with the fractional-N divider.

Abstract: A method and a circuit for detecting a radio-frequency signal, including at least one first MOS transistor with a channel of a first type, having its gate coupled to an input terminal capable of receiving said signal; a circuit for biasing the first transistor, capable of biasing it to a level lower than its threshold voltage; and a circuit for determining the average value of the current in the first transistor.

Abstract: A method and apparatus for tuning the operational frequency of an electrical generator coupled to a time-varying load is described. One illustrative embodiment rapidly calculates an error (reflection coefficient magnitude) at the current operational frequency of the electrical generator; adjusts the frequency of the electrical generator by an initial step size so; rapidly calculates a second error; and if the magnitude of the second error is smaller than the magnitude of the first error, then the step size is increased and the frequency is adjusted by the increased step size.

Abstract: A method and apparatus is described herein for pulse shift modulation of output waveforms for reducing crosstalk on interconnects. Based on input pulses/bits, an output waveform is selectively delayed by a shift value to ensure transitions in a first direction occur in a first half of a period and transitions in a second direction occur in a second half of the period. When the same pulse shift modulation is implemented on surrounding traces, certain worst-case crosstalk scenarios are reduced; thus reducing crosstalk and increasing performance in power consumption and speed of data transfer.

Abstract: A vector signal generator with direct RF signal synthesis is disclosed. The vector signal generator comprises an RF signal synthesizer, a switch, and a memory. The RF signal synthesizer is configured for converting baseband IQ signals into a modulated digital RF signal. The RF signal synthesizer is connected to an I input, a Q input, a clock input, a control input, and an output, where the clock input is a clock input of the vector signal generator, the control input is a control input of the vector signal generator, and the output is an RF signal output of the vector signal generator. The switch is configured for selecting a source of IQ signals and is connected to an external I input, an external Q input, a stored signal I input, a stored signal Q input, the control input, an I output, and a Q output. The external I input and external Q input are external IQ inputs to the vector signal generator and the I output and the Q output are connected to the I input and the Q input of the RF signal synthesizer.

Abstract: Pulse-width modulation (PWM) finds wide use in many applications including motor control, communication systems, music synthesizers, power supplies, class-D and digital amplifiers, among others. The Fourier series expansion of each period of a pulse waveform includes an additive term that is a function of the pulse width in that period. As the pulse width is varied, this additive term varies, which can be problematic in many applications. In an embodiment, a single-pulse per period pulse width modulated waveform comprising a zero d.c. term in each period regardless of pulse width is generated. In various realizations these waveforms may be generated by electronic circuitry without the use of capacitive coupling or may be generated by algorithms. Further aspects include “through-zero” pulse width modulation and zero-centered asymmetric triangle waveforms and use in instrumentation for measurement of a phase angle of an exogenous system or phenomena.

Abstract: A signal generator, a signal generation method, and a communication system using the same are provided. The signal generator includes a plurality of nonlinear elements which are connected in a ring; and a signal distributor which is arranged in the ring to form a closed loop, feeds part of a signal to one of the plurality of the nonlinear elements, and outputs signal generated by one of the plurality of nonlinear elements. The method includes arranging a plurality of nonlinear elements connected in a ring; inputting a signal to one of the nonlinear elements; amplifying the signal; receiving the amplified signal and generating a harmonic component of a frequency; clipping the signal; and feeding part of the signal back to one of the nonlinear elements and outputting a remainder of the signal. The system includes a chaotic signal generator; a signal distributor; a modulator; and a transmission circuit.

Abstract: A frequency phase locked loop (FPLL) includes a first feedback loop coupled to a second feedback loop. The first feedback loop is configured to correct a phase offset of an output signal of the FPLL. The second feedback loop is configured to correct a frequency offset of the output signal of the FPLL.